[PATCH v4 0/3] AUXADC: Mediatek auxadc driver

[PATCH v4 0/3] AUXADC: Mediatek auxadc driver

[Zhiyong Tao]

This series includes three patches:
1.Change the device tree binding documentation.
2.Add auxadc driver based on linux iio.
3.Add auxadc nodes in the mediatek MT2701 dtsi file.

Changes in patch v4:
1).Change the file name 'mt65xx_auxdc.txt' to 'mt6577_auxdc.txt'.
2).Remove 'break' after 'return' in 'mt6577_auxadc_read_raw'.
3).Use 'mt2701' instead of 'auxadc' in dts commit message.
4).Change 'auxadc@' to 'adc@' in mt2701.dtsi.

Changes in patch v3:
1).Add '#' before 'io-channel-cells' and change 'auxadc@' to 'adc@' in auxadc binding document.
2).Fix CONFIG_MEDIATEK_MT65XX_AUXADC sequence as alphabetical order.
3).Change the prefix 'MT65XX' to 'MT6577' to match auxadc driver name.
4).Remove the delays stored in 'mt6577_auxadc_device' and use the defined delay directly.
5).Use '-ETIMEDOUT' instead of '-EINVAL'.
6).Return value directly in 'mt6577_auxadc_read_raw'.
7).Add power off and unprepare clock if 'iio_device_register' failed.
8).Change 'Registers' to 'Register'.

Changes in patch v2:
1).Change the file name mt65xx_auxadc.c to mt6577_auxadc.c.
2).Add 'depends on ARCH_MEDIATEK || COMPILE_TEST and HAS_IOMEM' for MEDIATEK_MT65XX_AUXADC config.
3).Add check case for return value of 'readl_poll_timeout'.
4).Remove returning 1 and 0 for SCALE and OFFSET. use channel type 'IIO_CHAN_INFO_PROCESSED' instead of 'IIO_CHAN_INFO_RAW'.
5).Remove 'IIO_CHAN_INFO_OFFSET' and 'IIO_CHAN_INFO_SCALE' in 'MT65XX_AUXADC_CHANNEL' channel type.
6).Add check case when auxadc power on failure. if auxadc power on failure, clk_disable_unprepare should be executed.
7).Put 'platform_set_drvdata' before 'iio_device_register'.
8).Fix coding style and spelling error.

Zhiyong Tao (3):
  dt-bindings: auxadc: Add binding document for Mediatek auxadc.
  iio: adc: mt2701: Add Mediatek auxadc driver for mt2701.
  arm: dts: mt2701: Add auxadc node.

 .../devicetree/bindings/iio/adc/mt6577_auxadc.txt  |   27 ++
 .../devicetree/bindings/soc/mediatek/auxadc.txt    |   21 --
 arch/arm/boot/dts/mt2701.dtsi                      |    9 +
 drivers/iio/adc/Kconfig                            |   13 +
 drivers/iio/adc/Makefile                           |    1 +
 drivers/iio/adc/mt6577_auxadc.c                    |  294 ++++++++++++++++++++
 6 files changed, 344 insertions(+), 21 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
 delete mode 100644 Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
 create mode 100644 drivers/iio/adc/mt6577_auxadc.c

[PATCH v4 1/3] dt-bindings: auxadc: Add binding document for Mediatek auxadc.

[Zhiyong Tao]

The commit adds the device tree binding documentation for the mediatek
auxadc found on Mediatek MT2701.
Thermal gets auxadc sample data by iio device.
So the commit changes auxadc device tree binding documentation from
/soc/mediatek/auxadc.txt to /iio/adc/mt6577_auxadc.txt.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
---
 .../devicetree/bindings/iio/adc/mt6577_auxadc.txt  |   27 ++++++++++++++++++++
 .../devicetree/bindings/soc/mediatek/auxadc.txt    |   21 ---------------
 2 files changed, 27 insertions(+), 21 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
 delete mode 100644 Documentation/devicetree/bindings/soc/mediatek/auxadc.txt

diff --git a/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
new file mode 100644
index 0000000..bc23792
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
@@ -0,0 +1,27 @@
+* Mediatek AUXADC - Analog to Digital Converter on Mediatek mobile soc (mt65xx/mt81xx/mt27xx)
+===============
+
+The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
+in some Mediatek SoCs which among other things measures the temperatures
+in the SoC. It can be used directly with register accesses, but it is also
+used by thermal controller which reads the temperatures from the AUXADC
+directly via its own bus interface. See
+Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
+for the Thermal Controller which holds a phandle to the AUXADC.
+
+Required properties:
+  - compatible: "mediatek,mt2701-auxadc" or "mediatek,mt8173-auxadc"
+  - reg: Address range of the AUXADC unit.
+  - clocks: Should contain a clock specifier for each entry in clock-names
+  - clock-names: Should contain "main".
+  - #io-channel-cells: Should be 1, see ../iio-bindings.txt
+
+Example:
+
+auxadc: adc@11001000 {
+	compatible = "mediatek,mt2701-auxadc";
+	reg = <0 0x11001000 0 0x1000>;
+	clocks = <&pericfg CLK_PERI_AUXADC>;
+	clock-names = "main";
+	#io-channel-cells = <1>;
+};
diff --git a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt b/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
deleted file mode 100644
index bdb7829..0000000
--- a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-MediaTek AUXADC
-===============
-
-The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
-in some Mediatek SoCs which among other things measures the temperatures
-in the SoC. It can be used directly with register accesses, but it is also
-used by thermal controller which reads the temperatures from the AUXADC
-directly via its own bus interface. See
-Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
-for the Thermal Controller which holds a phandle to the AUXADC.
-
-Required properties:
-- compatible: Must be "mediatek,mt8173-auxadc"
-- reg: Address range of the AUXADC unit
-
-Example:
-
-auxadc: auxadc@11001000 {
-	compatible = "mediatek,mt8173-auxadc";
-	reg = <0 0x11001000 0 0x1000>;
-};
-- 
1.7.9.5

Re: [PATCH v4 1/3] dt-bindings: auxadc: Add binding document for Mediatek auxadc.

[zhiyong tao]

On Mon, 2016-07-11 at 14:39 +0800, Zhiyong Tao wrote:
> The commit adds the device tree binding documentation for the mediatek
> auxadc found on Mediatek MT2701.
> Thermal gets auxadc sample data by iio device.
> So the commit changes auxadc device tree binding documentation from
> /soc/mediatek/auxadc.txt to /iio/adc/mt6577_auxadc.txt.
> 
> Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
> ---

I forgot that I should use the command 'git format-patch -M' to submit
this patch. The follow information is the patch after executing the
above command. If the patch needs to be resent, please help to notify
me. I will resend the patch quickly.
The follow information:

 .../auxadc.txt => iio/adc/mt6577_auxadc.txt}       |   16
+++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)
 rename Documentation/devicetree/bindings/{soc/mediatek/auxadc.txt =>
iio/adc/mt6577_auxadc.txt} (50%)

diff --git a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
similarity index 50%
rename from Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
rename to Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
index bdb7829..bc23792 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
@@ -1,4 +1,4 @@
-MediaTek AUXADC
+* Mediatek AUXADC - Analog to Digital Converter on Mediatek mobile soc
(mt65xx/mt81xx/mt27xx)
 ===============

 The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
@@ -10,12 +10,18 @@
Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
 for the Thermal Controller which holds a phandle to the AUXADC.

 Required properties:
-- compatible: Must be "mediatek,mt8173-auxadc"
-- reg: Address range of the AUXADC unit
+  - compatible: "mediatek,mt2701-auxadc" or "mediatek,mt8173-auxadc"
+  - reg: Address range of the AUXADC unit.
+  - clocks: Should contain a clock specifier for each entry in
clock-names
+  - clock-names: Should contain "main".
+  - #io-channel-cells: Should be 1, see ../iio-bindings.txt

 Example:

-auxadc: auxadc@11001000 {
-       compatible = "mediatek,mt8173-auxadc";
+auxadc: adc@11001000 {
+       compatible = "mediatek,mt2701-auxadc";
        reg = <0 0x11001000 0 0x1000>;
+       clocks = <&pericfg CLK_PERI_AUXADC>;
+       clock-names = "main";
+       #io-channel-cells = <1>;
 };
-- 
1.7.9.5


>  .../devicetree/bindings/iio/adc/mt6577_auxadc.txt  |   27 ++++++++++++++++++++
>  .../devicetree/bindings/soc/mediatek/auxadc.txt    |   21 ---------------
>  2 files changed, 27 insertions(+), 21 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
>  delete mode 100644 Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
> new file mode 100644
> index 0000000..bc23792
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
> @@ -0,0 +1,27 @@
> +* Mediatek AUXADC - Analog to Digital Converter on Mediatek mobile soc (mt65xx/mt81xx/mt27xx)
> +===============
> +
> +The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
> +in some Mediatek SoCs which among other things measures the temperatures
> +in the SoC. It can be used directly with register accesses, but it is also
> +used by thermal controller which reads the temperatures from the AUXADC
> +directly via its own bus interface. See
> +Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> +for the Thermal Controller which holds a phandle to the AUXADC.
> +
> +Required properties:
> +  - compatible: "mediatek,mt2701-auxadc" or "mediatek,mt8173-auxadc"
> +  - reg: Address range of the AUXADC unit.
> +  - clocks: Should contain a clock specifier for each entry in clock-names
> +  - clock-names: Should contain "main".
> +  - #io-channel-cells: Should be 1, see ../iio-bindings.txt
> +
> +Example:
> +
> +auxadc: adc@11001000 {
> +	compatible = "mediatek,mt2701-auxadc";
> +	reg = <0 0x11001000 0 0x1000>;
> +	clocks = <&pericfg CLK_PERI_AUXADC>;
> +	clock-names = "main";
> +	#io-channel-cells = <1>;
> +};
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt b/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
> deleted file mode 100644
> index bdb7829..0000000
> --- a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
> +++ /dev/null
> @@ -1,21 +0,0 @@
> -MediaTek AUXADC
> -===============
> -
> -The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
> -in some Mediatek SoCs which among other things measures the temperatures
> -in the SoC. It can be used directly with register accesses, but it is also
> -used by thermal controller which reads the temperatures from the AUXADC
> -directly via its own bus interface. See
> -Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> -for the Thermal Controller which holds a phandle to the AUXADC.
> -
> -Required properties:
> -- compatible: Must be "mediatek,mt8173-auxadc"
> -- reg: Address range of the AUXADC unit
> -
> -Example:
> -
> -auxadc: auxadc@11001000 {
> -	compatible = "mediatek,mt8173-auxadc";
> -	reg = <0 0x11001000 0 0x1000>;
> -};

Re: [PATCH v4 1/3] dt-bindings: auxadc: Add binding document for Mediatek auxadc.

[Rob Herring]

On Tue, Jul 12, 2016 at 10:43:16AM +0800, zhiyong tao wrote:
> On Mon, 2016-07-11 at 14:39 +0800, Zhiyong Tao wrote:
> > The commit adds the device tree binding documentation for the mediatek
> > auxadc found on Mediatek MT2701.
> > Thermal gets auxadc sample data by iio device.
> > So the commit changes auxadc device tree binding documentation from
> > /soc/mediatek/auxadc.txt to /iio/adc/mt6577_auxadc.txt.
> > 
> > Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
> > ---
> 
> I forgot that I should use the command 'git format-patch -M' to submit
> this patch. The follow information is the patch after executing the
> above command. If the patch needs to be resent, please help to notify
> me. I will resend the patch quickly.
> The follow information:
> 
>  .../auxadc.txt => iio/adc/mt6577_auxadc.txt}       |   16
> +++++++++++-----
>  1 file changed, 11 insertions(+), 5 deletions(-)
>  rename Documentation/devicetree/bindings/{soc/mediatek/auxadc.txt =>
> iio/adc/mt6577_auxadc.txt} (50%)
> 
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
> b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
> similarity index 50%
> rename from Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
> rename to Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
> index bdb7829..bc23792 100644
> --- a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt
> +++ b/Documentation/devicetree/bindings/iio/adc/mt6577_auxadc.txt
> @@ -1,4 +1,4 @@
> -MediaTek AUXADC
> +* Mediatek AUXADC - Analog to Digital Converter on Mediatek mobile soc
> (mt65xx/mt81xx/mt27xx)
>  ===============
> 
>  The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
> @@ -10,12 +10,18 @@
> Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>  for the Thermal Controller which holds a phandle to the AUXADC.
> 
>  Required properties:
> -- compatible: Must be "mediatek,mt8173-auxadc"
> -- reg: Address range of the AUXADC unit
> +  - compatible: "mediatek,mt2701-auxadc" or "mediatek,mt8173-auxadc"

It's preferred to list one per line, but this is fine unless you resend.

Acked-by: Rob Herring <robh@kernel.org>

[PATCH v4 2/3] iio: adc: mt2701: Add Mediatek auxadc driver for mt2701.

[Zhiyong Tao]

Add Mediatek auxadc driver based on iio.
It will register a device in iio and support iio.
So thermal can read auxadc channel to sample data by iio device.
It is tested successfully on mt2701 platform.
Mt8173 and mt6577 platforms are not tested.
But the expectation is compatible.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
---
 drivers/iio/adc/Kconfig         |   13 ++
 drivers/iio/adc/Makefile        |    1 +
 drivers/iio/adc/mt6577_auxadc.c |  294 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 308 insertions(+)
 create mode 100644 drivers/iio/adc/mt6577_auxadc.c

diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 25378c5..14929fc 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -305,6 +305,19 @@ config MCP3422
 	  This driver can also be built as a module. If so, the module will be
 	  called mcp3422.
 
+config MEDIATEK_MT6577_AUXADC
+        tristate "MediaTek AUXADC driver"
+        depends on ARCH_MEDIATEK || COMPILE_TEST
+        depends on HAS_IOMEM
+        help
+          Say yes here to enable support for MediaTek mt65xx AUXADC.
+
+          The driver supports immediate mode operation to read from one of sixteen
+          channels (external or internal).
+
+          This driver can also be built as a module. If so, the module will be
+          called mt6577_auxadc.
+
 config MEN_Z188_ADC
 	tristate "MEN 16z188 ADC IP Core support"
 	depends on MCB
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index 38638d4..8306347 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_MAX1027) += max1027.o
 obj-$(CONFIG_MAX1363) += max1363.o
 obj-$(CONFIG_MCP320X) += mcp320x.o
 obj-$(CONFIG_MCP3422) += mcp3422.o
+obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o
 obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
 obj-$(CONFIG_MXS_LRADC) += mxs-lradc.o
 obj-$(CONFIG_NAU7802) += nau7802.o
diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c
new file mode 100644
index 0000000..c7cc901
--- /dev/null
+++ b/drivers/iio/adc/mt6577_auxadc.c
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/iopoll.h>
+#include <linux/io.h>
+#include <linux/iio/iio.h>
+
+/* Register definitions */
+#define MT6577_AUXADC_CON0                    0x00
+#define MT6577_AUXADC_CON1                    0x04
+#define MT6577_AUXADC_CON2                    0x10
+#define MT6577_AUXADC_STA                     BIT(0)
+
+#define MT6577_AUXADC_DAT0                    0x14
+#define MT6577_AUXADC_RDY0                    BIT(12)
+
+#define MT6577_AUXADC_MISC                    0x94
+#define MT6577_AUXADC_PDN_EN                  BIT(14)
+
+#define MT6577_AUXADC_DAT_MASK                0xfff
+#define MT6577_AUXADC_SLEEP_US                1000
+#define MT6577_AUXADC_TIMEOUT_US              10000
+#define MT6577_AUXADC_POWER_READY_MS          1
+#define MT6577_AUXADC_SAMPLE_READY_US         25
+
+struct mt6577_auxadc_device {
+	void __iomem *reg_base;
+	struct clk *adc_clk;
+	struct mutex lock;
+};
+
+#define MT6577_AUXADC_CHANNEL(idx) {				    \
+		.type = IIO_VOLTAGE,				    \
+		.indexed = 1,					    \
+		.channel = (idx),				    \
+		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
+}
+
+static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = {
+	MT6577_AUXADC_CHANNEL(0),
+	MT6577_AUXADC_CHANNEL(1),
+	MT6577_AUXADC_CHANNEL(2),
+	MT6577_AUXADC_CHANNEL(3),
+	MT6577_AUXADC_CHANNEL(4),
+	MT6577_AUXADC_CHANNEL(5),
+	MT6577_AUXADC_CHANNEL(6),
+	MT6577_AUXADC_CHANNEL(7),
+	MT6577_AUXADC_CHANNEL(8),
+	MT6577_AUXADC_CHANNEL(9),
+	MT6577_AUXADC_CHANNEL(10),
+	MT6577_AUXADC_CHANNEL(11),
+	MT6577_AUXADC_CHANNEL(12),
+	MT6577_AUXADC_CHANNEL(13),
+	MT6577_AUXADC_CHANNEL(14),
+	MT6577_AUXADC_CHANNEL(15),
+};
+
+static int mt6577_auxadc_read(struct iio_dev *indio_dev,
+			      struct iio_chan_spec const *chan)
+{
+	u32 rawdata, val;
+	void __iomem *reg_channel;
+	int ret;
+	struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev);
+
+	reg_channel = adc_dev->reg_base + MT6577_AUXADC_DAT0 +
+		      chan->channel * 0x04;
+
+	mutex_lock(&adc_dev->lock);
+
+	val = readl(adc_dev->reg_base + MT6577_AUXADC_CON1);
+	val &= ~(1 << chan->channel);
+	writel(val, adc_dev->reg_base + MT6577_AUXADC_CON1);
+
+	/* read channel and make sure old ready bit == 0 */
+	ret = readl_poll_timeout(reg_channel, val,
+				 ((val & MT6577_AUXADC_RDY0) == 0),
+				 MT6577_AUXADC_SLEEP_US,
+				 MT6577_AUXADC_TIMEOUT_US);
+	if (ret < 0) {
+		dev_err(indio_dev->dev.parent,
+			"wait for channel[%d] ready bit clear time out\n",
+			chan->channel);
+
+		mutex_unlock(&adc_dev->lock);
+
+		return -ETIMEDOUT;
+	}
+
+	/* set bit to trigger sample */
+	val = readl(adc_dev->reg_base + MT6577_AUXADC_CON1);
+	val |= 1 << chan->channel;
+	writel(val, adc_dev->reg_base + MT6577_AUXADC_CON1);
+
+	/* we must delay here for hardware sample channel data */
+	udelay(MT6577_AUXADC_SAMPLE_READY_US);
+
+	/* check MTK_AUXADC_CON2 if auxadc is idle */
+	ret = readl_poll_timeout(adc_dev->reg_base + MT6577_AUXADC_CON2, val,
+				 ((val & MT6577_AUXADC_STA) == 0),
+				 MT6577_AUXADC_SLEEP_US,
+				 MT6577_AUXADC_TIMEOUT_US);
+	if (ret < 0) {
+		dev_err(indio_dev->dev.parent,
+			"wait for auxadc idle time out\n");
+
+		mutex_unlock(&adc_dev->lock);
+
+		return -ETIMEDOUT;
+	}
+
+	/* read channel and make sure ready bit == 1 */
+	ret = readl_poll_timeout(reg_channel, val,
+				 ((val & MT6577_AUXADC_RDY0) != 0),
+				 MT6577_AUXADC_SLEEP_US,
+				 MT6577_AUXADC_TIMEOUT_US);
+	if (ret < 0) {
+		dev_err(indio_dev->dev.parent,
+			"wait for channel[%d] data ready time out\n",
+			chan->channel);
+
+		mutex_unlock(&adc_dev->lock);
+
+		return -ETIMEDOUT;
+	}
+
+	/* read data */
+	rawdata = readl(reg_channel) & MT6577_AUXADC_DAT_MASK;
+
+	mutex_unlock(&adc_dev->lock);
+
+	return rawdata;
+}
+
+static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev,
+				  struct iio_chan_spec const *chan,
+				  int *val,
+				  int *val2,
+				  long info)
+{
+	switch (info) {
+	case IIO_CHAN_INFO_PROCESSED:
+		*val = mt6577_auxadc_read(indio_dev, chan);
+		if (*val < 0) {
+			dev_err(indio_dev->dev.parent,
+				"failed to sample data on channel[%d]\n",
+				chan->channel);
+			return *val;
+		}
+		return IIO_VAL_INT;
+
+	default:
+		return -EINVAL;
+	}
+}
+
+static const struct iio_info mt6577_auxadc_info = {
+	.driver_module = THIS_MODULE,
+	.read_raw = &mt6577_auxadc_read_raw,
+};
+
+static int mt6577_auxadc_probe(struct platform_device *pdev)
+{
+	struct mt6577_auxadc_device *adc_dev;
+	unsigned long adc_clk_rate;
+	struct resource *res;
+	struct iio_dev *indio_dev;
+	int ret;
+	u32 val;
+
+	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev));
+	if (!indio_dev)
+		return -ENOMEM;
+
+	adc_dev = iio_priv(indio_dev);
+	indio_dev->dev.parent = &pdev->dev;
+	indio_dev->name = dev_name(&pdev->dev);
+	indio_dev->info = &mt6577_auxadc_info;
+	indio_dev->modes = INDIO_DIRECT_MODE;
+	indio_dev->channels = mt6577_auxadc_iio_channels;
+	indio_dev->num_channels = ARRAY_SIZE(mt6577_auxadc_iio_channels);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	adc_dev->reg_base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(adc_dev->reg_base)) {
+		dev_err(&pdev->dev, "failed to get auxadc base address.\n");
+		return PTR_ERR(adc_dev->reg_base);
+	}
+
+	adc_dev->adc_clk = devm_clk_get(&pdev->dev, "main");
+	if (IS_ERR(adc_dev->adc_clk)) {
+		dev_err(&pdev->dev, "failed to get auxadc clock\n");
+		return PTR_ERR(adc_dev->adc_clk);
+	}
+
+	ret = clk_prepare_enable(adc_dev->adc_clk);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to enable auxadc clock\n");
+		return ret;
+	}
+
+	adc_clk_rate = clk_get_rate(adc_dev->adc_clk);
+	if (!adc_clk_rate) {
+		dev_err(&pdev->dev, "null clock rate!\n");
+		goto err_disable_clk;
+	}
+
+	mutex_init(&adc_dev->lock);
+
+	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
+	val |= MT6577_AUXADC_PDN_EN;
+	writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
+	mdelay(MT6577_AUXADC_POWER_READY_MS);
+
+	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
+	if ((val & MT6577_AUXADC_PDN_EN) == 0) {
+		dev_err(&pdev->dev, "failed to enable auxadc power!\n");
+		goto err_disable_clk;
+	}
+
+	platform_set_drvdata(pdev, indio_dev);
+
+	ret = iio_device_register(indio_dev);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to register iio device!\n");
+		val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
+		val &= ~MT6577_AUXADC_PDN_EN;
+		writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
+		goto err_disable_clk;
+	}
+
+	return 0;
+
+err_disable_clk:
+	clk_disable_unprepare(adc_dev->adc_clk);
+	return -EINVAL;
+}
+
+static int mt6577_auxadc_remove(struct platform_device *pdev)
+{
+	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
+	struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev);
+	u32 val;
+
+	iio_device_unregister(indio_dev);
+
+	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
+	val &= ~MT6577_AUXADC_PDN_EN;
+	writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
+
+	clk_disable_unprepare(adc_dev->adc_clk);
+
+	return 0;
+}
+
+static const struct of_device_id mt6577_auxadc_of_match[] = {
+	{ .compatible = "mediatek,mt2701-auxadc", },
+	{ .compatible = "mediatek,mt8173-auxadc", },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, mt6577_auxadc_of_match);
+
+static struct platform_driver mt6577_auxadc_driver = {
+	.driver = {
+		.name   = "mt6577-auxadc",
+		.of_match_table = mt6577_auxadc_of_match,
+	},
+	.probe	= mt6577_auxadc_probe,
+	.remove	= mt6577_auxadc_remove,
+};
+module_platform_driver(mt6577_auxadc_driver);
+
+MODULE_AUTHOR("Zhiyong Tao <zhiyong.tao@mediatek.com>");
+MODULE_DESCRIPTION("MTK AUXADC Device Driver");
+MODULE_LICENSE("GPL v2");
-- 
1.7.9.5

Re: [PATCH v4 2/3] iio: adc: mt2701: Add Mediatek auxadc driver for mt2701.

[Jonathan Cameron]

On 11/07/16 07:39, Zhiyong Tao wrote:
> Add Mediatek auxadc driver based on iio.
> It will register a device in iio and support iio.
> So thermal can read auxadc channel to sample data by iio device.
> It is tested successfully on mt2701 platform.
> Mt8173 and mt6577 platforms are not tested.
> But the expectation is compatible.
> 
> Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Looks good to me.  Couple of really minor points / questions inline...

Just one thing to confirm... (you probably already answered this!)
What are the units of the voltage channels?

Jonathan
> ---
>  drivers/iio/adc/Kconfig         |   13 ++
>  drivers/iio/adc/Makefile        |    1 +
>  drivers/iio/adc/mt6577_auxadc.c |  294 +++++++++++++++++++++++++++++++++++++++
>  3 files changed, 308 insertions(+)
>  create mode 100644 drivers/iio/adc/mt6577_auxadc.c
> 
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 25378c5..14929fc 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -305,6 +305,19 @@ config MCP3422
>  	  This driver can also be built as a module. If so, the module will be
>  	  called mcp3422.
>  
> +config MEDIATEK_MT6577_AUXADC
> +        tristate "MediaTek AUXADC driver"
> +        depends on ARCH_MEDIATEK || COMPILE_TEST
> +        depends on HAS_IOMEM
> +        help
> +          Say yes here to enable support for MediaTek mt65xx AUXADC.
> +
> +          The driver supports immediate mode operation to read from one of sixteen
> +          channels (external or internal).
> +
> +          This driver can also be built as a module. If so, the module will be
> +          called mt6577_auxadc.
> +
>  config MEN_Z188_ADC
>  	tristate "MEN 16z188 ADC IP Core support"
>  	depends on MCB
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 38638d4..8306347 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -30,6 +30,7 @@ obj-$(CONFIG_MAX1027) += max1027.o
>  obj-$(CONFIG_MAX1363) += max1363.o
>  obj-$(CONFIG_MCP320X) += mcp320x.o
>  obj-$(CONFIG_MCP3422) += mcp3422.o
> +obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o
>  obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
>  obj-$(CONFIG_MXS_LRADC) += mxs-lradc.o
>  obj-$(CONFIG_NAU7802) += nau7802.o
> diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c
> new file mode 100644
> index 0000000..c7cc901
> --- /dev/null
> +++ b/drivers/iio/adc/mt6577_auxadc.c
> @@ -0,0 +1,294 @@
> +/*
> + * Copyright (c) 2016 MediaTek Inc.
> + * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/iopoll.h>
> +#include <linux/io.h>
> +#include <linux/iio/iio.h>
> +
> +/* Register definitions */
> +#define MT6577_AUXADC_CON0                    0x00
> +#define MT6577_AUXADC_CON1                    0x04
> +#define MT6577_AUXADC_CON2                    0x10
> +#define MT6577_AUXADC_STA                     BIT(0)
> +
> +#define MT6577_AUXADC_DAT0                    0x14
> +#define MT6577_AUXADC_RDY0                    BIT(12)
> +
> +#define MT6577_AUXADC_MISC                    0x94
> +#define MT6577_AUXADC_PDN_EN                  BIT(14)
> +
> +#define MT6577_AUXADC_DAT_MASK                0xfff
> +#define MT6577_AUXADC_SLEEP_US                1000
> +#define MT6577_AUXADC_TIMEOUT_US              10000
> +#define MT6577_AUXADC_POWER_READY_MS          1
> +#define MT6577_AUXADC_SAMPLE_READY_US         25
> +
> +struct mt6577_auxadc_device {
> +	void __iomem *reg_base;
> +	struct clk *adc_clk;
> +	struct mutex lock;
> +};
> +
> +#define MT6577_AUXADC_CHANNEL(idx) {				    \
> +		.type = IIO_VOLTAGE,				    \
> +		.indexed = 1,					    \
> +		.channel = (idx),				    \
> +		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
> +}
> +
> +static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = {
> +	MT6577_AUXADC_CHANNEL(0),
> +	MT6577_AUXADC_CHANNEL(1),
> +	MT6577_AUXADC_CHANNEL(2),
> +	MT6577_AUXADC_CHANNEL(3),
> +	MT6577_AUXADC_CHANNEL(4),
> +	MT6577_AUXADC_CHANNEL(5),
> +	MT6577_AUXADC_CHANNEL(6),
> +	MT6577_AUXADC_CHANNEL(7),
> +	MT6577_AUXADC_CHANNEL(8),
> +	MT6577_AUXADC_CHANNEL(9),
> +	MT6577_AUXADC_CHANNEL(10),
> +	MT6577_AUXADC_CHANNEL(11),
> +	MT6577_AUXADC_CHANNEL(12),
> +	MT6577_AUXADC_CHANNEL(13),
> +	MT6577_AUXADC_CHANNEL(14),
> +	MT6577_AUXADC_CHANNEL(15),
> +};
> +
> +static int mt6577_auxadc_read(struct iio_dev *indio_dev,
> +			      struct iio_chan_spec const *chan)
> +{
> +	u32 rawdata, val;
> +	void __iomem *reg_channel;
> +	int ret;
> +	struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev);
> +
> +	reg_channel = adc_dev->reg_base + MT6577_AUXADC_DAT0 +
> +		      chan->channel * 0x04;
> +
> +	mutex_lock(&adc_dev->lock);
> +
> +	val = readl(adc_dev->reg_base + MT6577_AUXADC_CON1);
> +	val &= ~(1 << chan->channel);
> +	writel(val, adc_dev->reg_base + MT6577_AUXADC_CON1);
> +
> +	/* read channel and make sure old ready bit == 0 */
> +	ret = readl_poll_timeout(reg_channel, val,
> +				 ((val & MT6577_AUXADC_RDY0) == 0),
> +				 MT6577_AUXADC_SLEEP_US,
> +				 MT6577_AUXADC_TIMEOUT_US);
> +	if (ret < 0) {
> +		dev_err(indio_dev->dev.parent,
> +			"wait for channel[%d] ready bit clear time out\n",
> +			chan->channel);
> +
> +		mutex_unlock(&adc_dev->lock);
> +
> +		return -ETIMEDOUT;
> +	}
> +
> +	/* set bit to trigger sample */
> +	val = readl(adc_dev->reg_base + MT6577_AUXADC_CON1);
> +	val |= 1 << chan->channel;
> +	writel(val, adc_dev->reg_base + MT6577_AUXADC_CON1);
> +
> +	/* we must delay here for hardware sample channel data */
> +	udelay(MT6577_AUXADC_SAMPLE_READY_US);
> +
> +	/* check MTK_AUXADC_CON2 if auxadc is idle */
> +	ret = readl_poll_timeout(adc_dev->reg_base + MT6577_AUXADC_CON2, val,
> +				 ((val & MT6577_AUXADC_STA) == 0),
> +				 MT6577_AUXADC_SLEEP_US,
> +				 MT6577_AUXADC_TIMEOUT_US);
> +	if (ret < 0) {
> +		dev_err(indio_dev->dev.parent,
> +			"wait for auxadc idle time out\n");
> +
> +		mutex_unlock(&adc_dev->lock);
> +
> +		return -ETIMEDOUT;
> +	}
> +
> +	/* read channel and make sure ready bit == 1 */
> +	ret = readl_poll_timeout(reg_channel, val,
> +				 ((val & MT6577_AUXADC_RDY0) != 0),
> +				 MT6577_AUXADC_SLEEP_US,
> +				 MT6577_AUXADC_TIMEOUT_US);
> +	if (ret < 0) {
> +		dev_err(indio_dev->dev.parent,
> +			"wait for channel[%d] data ready time out\n",
> +			chan->channel);
> +
> +		mutex_unlock(&adc_dev->lock);
> +
> +		return -ETIMEDOUT;
> +	}
> +
> +	/* read data */
> +	rawdata = readl(reg_channel) & MT6577_AUXADC_DAT_MASK;
> +
> +	mutex_unlock(&adc_dev->lock);
> +
> +	return rawdata;
> +}
> +
> +static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev,
> +				  struct iio_chan_spec const *chan,
> +				  int *val,
> +				  int *val2,
> +				  long info)
> +{
> +	switch (info) {
> +	case IIO_CHAN_INFO_PROCESSED:
> +		*val = mt6577_auxadc_read(indio_dev, chan);
> +		if (*val < 0) {
> +			dev_err(indio_dev->dev.parent,
> +				"failed to sample data on channel[%d]\n",
> +				chan->channel);
> +			return *val;
> +		}
> +		return IIO_VAL_INT;
> +
> +	default:
> +		return -EINVAL;
> +	}
> +}
> +
> +static const struct iio_info mt6577_auxadc_info = {
> +	.driver_module = THIS_MODULE,
> +	.read_raw = &mt6577_auxadc_read_raw,
> +};
> +
> +static int mt6577_auxadc_probe(struct platform_device *pdev)
> +{
> +	struct mt6577_auxadc_device *adc_dev;
> +	unsigned long adc_clk_rate;
> +	struct resource *res;
> +	struct iio_dev *indio_dev;
> +	int ret;
> +	u32 val;
> +
> +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	adc_dev = iio_priv(indio_dev);
> +	indio_dev->dev.parent = &pdev->dev;
> +	indio_dev->name = dev_name(&pdev->dev);
> +	indio_dev->info = &mt6577_auxadc_info;
> +	indio_dev->modes = INDIO_DIRECT_MODE;
> +	indio_dev->channels = mt6577_auxadc_iio_channels;
> +	indio_dev->num_channels = ARRAY_SIZE(mt6577_auxadc_iio_channels);
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	adc_dev->reg_base = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(adc_dev->reg_base)) {
> +		dev_err(&pdev->dev, "failed to get auxadc base address.\n");
> +		return PTR_ERR(adc_dev->reg_base);
> +	}
> +
> +	adc_dev->adc_clk = devm_clk_get(&pdev->dev, "main");
> +	if (IS_ERR(adc_dev->adc_clk)) {
> +		dev_err(&pdev->dev, "failed to get auxadc clock\n");
> +		return PTR_ERR(adc_dev->adc_clk);
> +	}
> +
> +	ret = clk_prepare_enable(adc_dev->adc_clk);
> +	if (ret) {
> +		dev_err(&pdev->dev, "failed to enable auxadc clock\n");
> +		return ret;
> +	}
> +
> +	adc_clk_rate = clk_get_rate(adc_dev->adc_clk);
> +	if (!adc_clk_rate) {
> +		dev_err(&pdev->dev, "null clock rate!\n");
> +		goto err_disable_clk;
> +	}
> +
> +	mutex_init(&adc_dev->lock);
> +
> +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> +	val |= MT6577_AUXADC_PDN_EN;
> +	writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> +	mdelay(MT6577_AUXADC_POWER_READY_MS);
> +
> +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> +	if ((val & MT6577_AUXADC_PDN_EN) == 0) {
That's a high level of paranoia... Any reason to believe this might fail?
> +		dev_err(&pdev->dev, "failed to enable auxadc power!\n");
> +		goto err_disable_clk;
> +	}
> +
> +	platform_set_drvdata(pdev, indio_dev);
> +
> +	ret = iio_device_register(indio_dev);
> +	if (ret < 0) {
I'd have slightly preferred that this error unwind block was also
moved to on a goto.  Makes it easier to review as the error block then
matches remove (with expected differences!)  Really small point however.

> +		dev_err(&pdev->dev, "failed to register iio device!\n");
> +		val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> +		val &= ~MT6577_AUXADC_PDN_EN;
> +		writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> +		goto err_disable_clk;
> +	}
> +
> +	return 0;
> +
> +err_disable_clk:
> +	clk_disable_unprepare(adc_dev->adc_clk);
> +	return -EINVAL;
> +}
> +
> +static int mt6577_auxadc_remove(struct platform_device *pdev)
> +{
> +	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
> +	struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev);
> +	u32 val;
> +
> +	iio_device_unregister(indio_dev);
> +
> +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> +	val &= ~MT6577_AUXADC_PDN_EN;
> +	writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> +
> +	clk_disable_unprepare(adc_dev->adc_clk);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id mt6577_auxadc_of_match[] = {
> +	{ .compatible = "mediatek,mt2701-auxadc", },
> +	{ .compatible = "mediatek,mt8173-auxadc", },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, mt6577_auxadc_of_match);
> +
> +static struct platform_driver mt6577_auxadc_driver = {
> +	.driver = {
> +		.name   = "mt6577-auxadc",
> +		.of_match_table = mt6577_auxadc_of_match,
> +	},
> +	.probe	= mt6577_auxadc_probe,
> +	.remove	= mt6577_auxadc_remove,
> +};
> +module_platform_driver(mt6577_auxadc_driver);
> +
> +MODULE_AUTHOR("Zhiyong Tao <zhiyong.tao@mediatek.com>");
> +MODULE_DESCRIPTION("MTK AUXADC Device Driver");
> +MODULE_LICENSE("GPL v2");
> 

Re: [PATCH v4 2/3] iio: adc: mt2701: Add Mediatek auxadc driver for mt2701.

[zhiyong tao]

On Mon, 2016-07-18 at 18:12 +0100, Jonathan Cameron wrote:
> On 11/07/16 07:39, Zhiyong Tao wrote:
> > Add Mediatek auxadc driver based on iio.
> > It will register a device in iio and support iio.
> > So thermal can read auxadc channel to sample data by iio device.
> > It is tested successfully on mt2701 platform.
> > Mt8173 and mt6577 platforms are not tested.
> > But the expectation is compatible.
> > 
> > Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
> Looks good to me.  Couple of really minor points / questions inline...
> 
> Just one thing to confirm... (you probably already answered this!)
> What are the units of the voltage channels?
> 
> Jonathan

The units of the voltage channels are mv. 

> > ---
> >  drivers/iio/adc/Kconfig         |   13 ++
> >  drivers/iio/adc/Makefile        |    1 +
> >  drivers/iio/adc/mt6577_auxadc.c |  294 +++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 308 insertions(+)
> >  create mode 100644 drivers/iio/adc/mt6577_auxadc.c
> > 
> > diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> > index 25378c5..14929fc 100644
> > --- a/drivers/iio/adc/Kconfig
> > +++ b/drivers/iio/adc/Kconfig
> > @@ -305,6 +305,19 @@ config MCP3422
> >  	  This driver can also be built as a module. If so, the module will be
> >  	  called mcp3422.
> >  
> > +config MEDIATEK_MT6577_AUXADC
> > +        tristate "MediaTek AUXADC driver"
> > +        depends on ARCH_MEDIATEK || COMPILE_TEST
> > +        depends on HAS_IOMEM
> > +        help
> > +          Say yes here to enable support for MediaTek mt65xx AUXADC.
> > +
> > +          The driver supports immediate mode operation to read from one of sixteen
> > +          channels (external or internal).
> > +
> > +          This driver can also be built as a module. If so, the module will be
> > +          called mt6577_auxadc.
> > +
> >  config MEN_Z188_ADC
> >  	tristate "MEN 16z188 ADC IP Core support"
> >  	depends on MCB
> > diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> > index 38638d4..8306347 100644
> > --- a/drivers/iio/adc/Makefile
> > +++ b/drivers/iio/adc/Makefile
> > @@ -30,6 +30,7 @@ obj-$(CONFIG_MAX1027) += max1027.o
> >  obj-$(CONFIG_MAX1363) += max1363.o
> >  obj-$(CONFIG_MCP320X) += mcp320x.o
> >  obj-$(CONFIG_MCP3422) += mcp3422.o
> > +obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o
> >  obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
> >  obj-$(CONFIG_MXS_LRADC) += mxs-lradc.o
> >  obj-$(CONFIG_NAU7802) += nau7802.o
> > diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c
> > new file mode 100644
> > index 0000000..c7cc901
> > --- /dev/null
> > +++ b/drivers/iio/adc/mt6577_auxadc.c
> > @@ -0,0 +1,294 @@
> > +/*
> > + * Copyright (c) 2016 MediaTek Inc.
> > + * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/delay.h>
> > +#include <linux/err.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_device.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/iopoll.h>
> > +#include <linux/io.h>
> > +#include <linux/iio/iio.h>
> > +
> > +/* Register definitions */
> > +#define MT6577_AUXADC_CON0                    0x00
> > +#define MT6577_AUXADC_CON1                    0x04
> > +#define MT6577_AUXADC_CON2                    0x10
> > +#define MT6577_AUXADC_STA                     BIT(0)
> > +
> > +#define MT6577_AUXADC_DAT0                    0x14
> > +#define MT6577_AUXADC_RDY0                    BIT(12)
> > +
> > +#define MT6577_AUXADC_MISC                    0x94
> > +#define MT6577_AUXADC_PDN_EN                  BIT(14)
> > +
> > +#define MT6577_AUXADC_DAT_MASK                0xfff
> > +#define MT6577_AUXADC_SLEEP_US                1000
> > +#define MT6577_AUXADC_TIMEOUT_US              10000
> > +#define MT6577_AUXADC_POWER_READY_MS          1
> > +#define MT6577_AUXADC_SAMPLE_READY_US         25
> > +
> > +struct mt6577_auxadc_device {
> > +	void __iomem *reg_base;
> > +	struct clk *adc_clk;
> > +	struct mutex lock;
> > +};
> > +
> > +#define MT6577_AUXADC_CHANNEL(idx) {				    \
> > +		.type = IIO_VOLTAGE,				    \
> > +		.indexed = 1,					    \
> > +		.channel = (idx),				    \
> > +		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
> > +}
> > +
> > +static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = {
> > +	MT6577_AUXADC_CHANNEL(0),
> > +	MT6577_AUXADC_CHANNEL(1),
> > +	MT6577_AUXADC_CHANNEL(2),
> > +	MT6577_AUXADC_CHANNEL(3),
> > +	MT6577_AUXADC_CHANNEL(4),
> > +	MT6577_AUXADC_CHANNEL(5),
> > +	MT6577_AUXADC_CHANNEL(6),
> > +	MT6577_AUXADC_CHANNEL(7),
> > +	MT6577_AUXADC_CHANNEL(8),
> > +	MT6577_AUXADC_CHANNEL(9),
> > +	MT6577_AUXADC_CHANNEL(10),
> > +	MT6577_AUXADC_CHANNEL(11),
> > +	MT6577_AUXADC_CHANNEL(12),
> > +	MT6577_AUXADC_CHANNEL(13),
> > +	MT6577_AUXADC_CHANNEL(14),
> > +	MT6577_AUXADC_CHANNEL(15),
> > +};
> > +
> > +static int mt6577_auxadc_read(struct iio_dev *indio_dev,
> > +			      struct iio_chan_spec const *chan)
> > +{
> > +	u32 rawdata, val;
> > +	void __iomem *reg_channel;
> > +	int ret;
> > +	struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev);
> > +
> > +	reg_channel = adc_dev->reg_base + MT6577_AUXADC_DAT0 +
> > +		      chan->channel * 0x04;
> > +
> > +	mutex_lock(&adc_dev->lock);
> > +
> > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_CON1);
> > +	val &= ~(1 << chan->channel);
> > +	writel(val, adc_dev->reg_base + MT6577_AUXADC_CON1);
> > +
> > +	/* read channel and make sure old ready bit == 0 */
> > +	ret = readl_poll_timeout(reg_channel, val,
> > +				 ((val & MT6577_AUXADC_RDY0) == 0),
> > +				 MT6577_AUXADC_SLEEP_US,
> > +				 MT6577_AUXADC_TIMEOUT_US);
> > +	if (ret < 0) {
> > +		dev_err(indio_dev->dev.parent,
> > +			"wait for channel[%d] ready bit clear time out\n",
> > +			chan->channel);
> > +
> > +		mutex_unlock(&adc_dev->lock);
> > +
> > +		return -ETIMEDOUT;
> > +	}
> > +
> > +	/* set bit to trigger sample */
> > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_CON1);
> > +	val |= 1 << chan->channel;
> > +	writel(val, adc_dev->reg_base + MT6577_AUXADC_CON1);
> > +
> > +	/* we must delay here for hardware sample channel data */
> > +	udelay(MT6577_AUXADC_SAMPLE_READY_US);
> > +
> > +	/* check MTK_AUXADC_CON2 if auxadc is idle */
> > +	ret = readl_poll_timeout(adc_dev->reg_base + MT6577_AUXADC_CON2, val,
> > +				 ((val & MT6577_AUXADC_STA) == 0),
> > +				 MT6577_AUXADC_SLEEP_US,
> > +				 MT6577_AUXADC_TIMEOUT_US);
> > +	if (ret < 0) {
> > +		dev_err(indio_dev->dev.parent,
> > +			"wait for auxadc idle time out\n");
> > +
> > +		mutex_unlock(&adc_dev->lock);
> > +
> > +		return -ETIMEDOUT;
> > +	}
> > +
> > +	/* read channel and make sure ready bit == 1 */
> > +	ret = readl_poll_timeout(reg_channel, val,
> > +				 ((val & MT6577_AUXADC_RDY0) != 0),
> > +				 MT6577_AUXADC_SLEEP_US,
> > +				 MT6577_AUXADC_TIMEOUT_US);
> > +	if (ret < 0) {
> > +		dev_err(indio_dev->dev.parent,
> > +			"wait for channel[%d] data ready time out\n",
> > +			chan->channel);
> > +
> > +		mutex_unlock(&adc_dev->lock);
> > +
> > +		return -ETIMEDOUT;
> > +	}
> > +
> > +	/* read data */
> > +	rawdata = readl(reg_channel) & MT6577_AUXADC_DAT_MASK;
> > +
> > +	mutex_unlock(&adc_dev->lock);
> > +
> > +	return rawdata;
> > +}
> > +
> > +static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev,
> > +				  struct iio_chan_spec const *chan,
> > +				  int *val,
> > +				  int *val2,
> > +				  long info)
> > +{
> > +	switch (info) {
> > +	case IIO_CHAN_INFO_PROCESSED:
> > +		*val = mt6577_auxadc_read(indio_dev, chan);
> > +		if (*val < 0) {
> > +			dev_err(indio_dev->dev.parent,
> > +				"failed to sample data on channel[%d]\n",
> > +				chan->channel);
> > +			return *val;
> > +		}
> > +		return IIO_VAL_INT;
> > +
> > +	default:
> > +		return -EINVAL;
> > +	}
> > +}
> > +
> > +static const struct iio_info mt6577_auxadc_info = {
> > +	.driver_module = THIS_MODULE,
> > +	.read_raw = &mt6577_auxadc_read_raw,
> > +};
> > +
> > +static int mt6577_auxadc_probe(struct platform_device *pdev)
> > +{
> > +	struct mt6577_auxadc_device *adc_dev;
> > +	unsigned long adc_clk_rate;
> > +	struct resource *res;
> > +	struct iio_dev *indio_dev;
> > +	int ret;
> > +	u32 val;
> > +
> > +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev));
> > +	if (!indio_dev)
> > +		return -ENOMEM;
> > +
> > +	adc_dev = iio_priv(indio_dev);
> > +	indio_dev->dev.parent = &pdev->dev;
> > +	indio_dev->name = dev_name(&pdev->dev);
> > +	indio_dev->info = &mt6577_auxadc_info;
> > +	indio_dev->modes = INDIO_DIRECT_MODE;
> > +	indio_dev->channels = mt6577_auxadc_iio_channels;
> > +	indio_dev->num_channels = ARRAY_SIZE(mt6577_auxadc_iio_channels);
> > +
> > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	adc_dev->reg_base = devm_ioremap_resource(&pdev->dev, res);
> > +	if (IS_ERR(adc_dev->reg_base)) {
> > +		dev_err(&pdev->dev, "failed to get auxadc base address.\n");
> > +		return PTR_ERR(adc_dev->reg_base);
> > +	}
> > +
> > +	adc_dev->adc_clk = devm_clk_get(&pdev->dev, "main");
> > +	if (IS_ERR(adc_dev->adc_clk)) {
> > +		dev_err(&pdev->dev, "failed to get auxadc clock\n");
> > +		return PTR_ERR(adc_dev->adc_clk);
> > +	}
> > +
> > +	ret = clk_prepare_enable(adc_dev->adc_clk);
> > +	if (ret) {
> > +		dev_err(&pdev->dev, "failed to enable auxadc clock\n");
> > +		return ret;
> > +	}
> > +
> > +	adc_clk_rate = clk_get_rate(adc_dev->adc_clk);
> > +	if (!adc_clk_rate) {
> > +		dev_err(&pdev->dev, "null clock rate!\n");
> > +		goto err_disable_clk;
> > +	}
> > +
> > +	mutex_init(&adc_dev->lock);
> > +
> > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> > +	val |= MT6577_AUXADC_PDN_EN;
> > +	writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> > +	mdelay(MT6577_AUXADC_POWER_READY_MS);
> > +
> > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> > +	if ((val & MT6577_AUXADC_PDN_EN) == 0) {
> That's a high level of paranoia... Any reason to believe this might fail?

Someone reviews the code and gives a suggestion to power off chenck.
If auxadc clk is off in the case, we can not write MT6577_AUXADC_PDN_EN
in MT6577_AUXADC_MISC. So it may cause to enable auxadc power failed.

> > +		dev_err(&pdev->dev, "failed to enable auxadc power!\n");
> > +		goto err_disable_clk;
> > +	}
> > +
> > +	platform_set_drvdata(pdev, indio_dev);
> > +
> > +	ret = iio_device_register(indio_dev);
> > +	if (ret < 0) {
> I'd have slightly preferred that this error unwind block was also
> moved to on a goto.  Makes it easier to review as the error block then
> matches remove (with expected differences!)  Really small point however.

I will update this in next version.

> 
> > +		dev_err(&pdev->dev, "failed to register iio device!\n");
> > +		val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> > +		val &= ~MT6577_AUXADC_PDN_EN;
> > +		writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> > +		goto err_disable_clk;
> > +	}
> > +
> > +	return 0;
> > +
> > +err_disable_clk:
> > +	clk_disable_unprepare(adc_dev->adc_clk);
> > +	return -EINVAL;
> > +}
> > +
> > +static int mt6577_auxadc_remove(struct platform_device *pdev)
> > +{
> > +	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
> > +	struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev);
> > +	u32 val;
> > +
> > +	iio_device_unregister(indio_dev);
> > +
> > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> > +	val &= ~MT6577_AUXADC_PDN_EN;
> > +	writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> > +
> > +	clk_disable_unprepare(adc_dev->adc_clk);
> > +
> > +	return 0;
> > +}
> > +
> > +static const struct of_device_id mt6577_auxadc_of_match[] = {
> > +	{ .compatible = "mediatek,mt2701-auxadc", },
> > +	{ .compatible = "mediatek,mt8173-auxadc", },
> > +	{ }
> > +};
> > +MODULE_DEVICE_TABLE(of, mt6577_auxadc_of_match);
> > +
> > +static struct platform_driver mt6577_auxadc_driver = {
> > +	.driver = {
> > +		.name   = "mt6577-auxadc",
> > +		.of_match_table = mt6577_auxadc_of_match,
> > +	},
> > +	.probe	= mt6577_auxadc_probe,
> > +	.remove	= mt6577_auxadc_remove,
> > +};
> > +module_platform_driver(mt6577_auxadc_driver);
> > +
> > +MODULE_AUTHOR("Zhiyong Tao <zhiyong.tao@mediatek.com>");
> > +MODULE_DESCRIPTION("MTK AUXADC Device Driver");
> > +MODULE_LICENSE("GPL v2");
> > 
> 

Re: [PATCH v4 2/3] iio: adc: mt2701: Add Mediatek auxadc driver for mt2701.

[zhiyong tao]

On Wed, 2016-07-20 at 14:02 +0800, zhiyong tao wrote:
> On Mon, 2016-07-18 at 18:12 +0100, Jonathan Cameron wrote:
> > On 11/07/16 07:39, Zhiyong Tao wrote:
> > > Add Mediatek auxadc driver based on iio.
> > > It will register a device in iio and support iio.
> > > So thermal can read auxadc channel to sample data by iio device.
> > > It is tested successfully on mt2701 platform.
> > > Mt8173 and mt6577 platforms are not tested.
> > > But the expectation is compatible.
> > > 
> > > Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
> > Looks good to me.  Couple of really minor points / questions inline...
> > 
> > Just one thing to confirm... (you probably already answered this!)
> > What are the units of the voltage channels?
> > 
> > Jonathan
> 
> The units of the voltage channels are mv. 
> 
> > > ---
> > >  drivers/iio/adc/Kconfig         |   13 ++
> > >  drivers/iio/adc/Makefile        |    1 +
> > >  drivers/iio/adc/mt6577_auxadc.c |  294 +++++++++++++++++++++++++++++++++++++++
> > >  3 files changed, 308 insertions(+)
> > >  create mode 100644 drivers/iio/adc/mt6577_auxadc.c
> > > 
> > > diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> > > index 25378c5..14929fc 100644
> > > --- a/drivers/iio/adc/Kconfig
> > > +++ b/drivers/iio/adc/Kconfig
> > > @@ -305,6 +305,19 @@ config MCP3422
> > >  	  This driver can also be built as a module. If so, the module will be
> > >  	  called mcp3422.
> > >  
> > > +config MEDIATEK_MT6577_AUXADC
> > > +        tristate "MediaTek AUXADC driver"
> > > +        depends on ARCH_MEDIATEK || COMPILE_TEST
> > > +        depends on HAS_IOMEM
> > > +        help
> > > +          Say yes here to enable support for MediaTek mt65xx AUXADC.
> > > +
> > > +          The driver supports immediate mode operation to read from one of sixteen
> > > +          channels (external or internal).
> > > +
> > > +          This driver can also be built as a module. If so, the module will be
> > > +          called mt6577_auxadc.
> > > +
> > >  config MEN_Z188_ADC
> > >  	tristate "MEN 16z188 ADC IP Core support"
> > >  	depends on MCB
> > > diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> > > index 38638d4..8306347 100644
> > > --- a/drivers/iio/adc/Makefile
> > > +++ b/drivers/iio/adc/Makefile
> > > @@ -30,6 +30,7 @@ obj-$(CONFIG_MAX1027) += max1027.o
> > >  obj-$(CONFIG_MAX1363) += max1363.o
> > >  obj-$(CONFIG_MCP320X) += mcp320x.o
> > >  obj-$(CONFIG_MCP3422) += mcp3422.o
> > > +obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o
> > >  obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
> > >  obj-$(CONFIG_MXS_LRADC) += mxs-lradc.o
> > >  obj-$(CONFIG_NAU7802) += nau7802.o
> > > diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c
> > > new file mode 100644
> > > index 0000000..c7cc901
> > > --- /dev/null
> > > +++ b/drivers/iio/adc/mt6577_auxadc.c
> > > @@ -0,0 +1,294 @@
> > > +/*
> > > + * Copyright (c) 2016 MediaTek Inc.
> > > + * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License version 2 as
> > > + * published by the Free Software Foundation.
> > > + *
> > > + * This program is distributed in the hope that it will be useful,
> > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > > + * GNU General Public License for more details.
> > > + */
> > > +
> > > +#include <linux/clk.h>
> > > +#include <linux/delay.h>
> > > +#include <linux/err.h>
> > > +#include <linux/kernel.h>
> > > +#include <linux/module.h>
> > > +#include <linux/of.h>
> > > +#include <linux/of_device.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/iopoll.h>
> > > +#include <linux/io.h>
> > > +#include <linux/iio/iio.h>
> > > +
> > > +/* Register definitions */
> > > +#define MT6577_AUXADC_CON0                    0x00
> > > +#define MT6577_AUXADC_CON1                    0x04
> > > +#define MT6577_AUXADC_CON2                    0x10
> > > +#define MT6577_AUXADC_STA                     BIT(0)
> > > +
> > > +#define MT6577_AUXADC_DAT0                    0x14
> > > +#define MT6577_AUXADC_RDY0                    BIT(12)
> > > +
> > > +#define MT6577_AUXADC_MISC                    0x94
> > > +#define MT6577_AUXADC_PDN_EN                  BIT(14)
> > > +
> > > +#define MT6577_AUXADC_DAT_MASK                0xfff
> > > +#define MT6577_AUXADC_SLEEP_US                1000
> > > +#define MT6577_AUXADC_TIMEOUT_US              10000
> > > +#define MT6577_AUXADC_POWER_READY_MS          1
> > > +#define MT6577_AUXADC_SAMPLE_READY_US         25
> > > +
> > > +struct mt6577_auxadc_device {
> > > +	void __iomem *reg_base;
> > > +	struct clk *adc_clk;
> > > +	struct mutex lock;
> > > +};
> > > +
> > > +#define MT6577_AUXADC_CHANNEL(idx) {				    \
> > > +		.type = IIO_VOLTAGE,				    \
> > > +		.indexed = 1,					    \
> > > +		.channel = (idx),				    \
> > > +		.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
> > > +}
> > > +
> > > +static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = {
> > > +	MT6577_AUXADC_CHANNEL(0),
> > > +	MT6577_AUXADC_CHANNEL(1),
> > > +	MT6577_AUXADC_CHANNEL(2),
> > > +	MT6577_AUXADC_CHANNEL(3),
> > > +	MT6577_AUXADC_CHANNEL(4),
> > > +	MT6577_AUXADC_CHANNEL(5),
> > > +	MT6577_AUXADC_CHANNEL(6),
> > > +	MT6577_AUXADC_CHANNEL(7),
> > > +	MT6577_AUXADC_CHANNEL(8),
> > > +	MT6577_AUXADC_CHANNEL(9),
> > > +	MT6577_AUXADC_CHANNEL(10),
> > > +	MT6577_AUXADC_CHANNEL(11),
> > > +	MT6577_AUXADC_CHANNEL(12),
> > > +	MT6577_AUXADC_CHANNEL(13),
> > > +	MT6577_AUXADC_CHANNEL(14),
> > > +	MT6577_AUXADC_CHANNEL(15),
> > > +};
> > > +
> > > +static int mt6577_auxadc_read(struct iio_dev *indio_dev,
> > > +			      struct iio_chan_spec const *chan)
> > > +{
> > > +	u32 rawdata, val;
> > > +	void __iomem *reg_channel;
> > > +	int ret;
> > > +	struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev);
> > > +
> > > +	reg_channel = adc_dev->reg_base + MT6577_AUXADC_DAT0 +
> > > +		      chan->channel * 0x04;
> > > +
> > > +	mutex_lock(&adc_dev->lock);
> > > +
> > > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_CON1);
> > > +	val &= ~(1 << chan->channel);
> > > +	writel(val, adc_dev->reg_base + MT6577_AUXADC_CON1);
> > > +
> > > +	/* read channel and make sure old ready bit == 0 */
> > > +	ret = readl_poll_timeout(reg_channel, val,
> > > +				 ((val & MT6577_AUXADC_RDY0) == 0),
> > > +				 MT6577_AUXADC_SLEEP_US,
> > > +				 MT6577_AUXADC_TIMEOUT_US);
> > > +	if (ret < 0) {
> > > +		dev_err(indio_dev->dev.parent,
> > > +			"wait for channel[%d] ready bit clear time out\n",
> > > +			chan->channel);
> > > +
> > > +		mutex_unlock(&adc_dev->lock);
> > > +
> > > +		return -ETIMEDOUT;
> > > +	}
> > > +
> > > +	/* set bit to trigger sample */
> > > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_CON1);
> > > +	val |= 1 << chan->channel;
> > > +	writel(val, adc_dev->reg_base + MT6577_AUXADC_CON1);
> > > +
> > > +	/* we must delay here for hardware sample channel data */
> > > +	udelay(MT6577_AUXADC_SAMPLE_READY_US);
> > > +
> > > +	/* check MTK_AUXADC_CON2 if auxadc is idle */
> > > +	ret = readl_poll_timeout(adc_dev->reg_base + MT6577_AUXADC_CON2, val,
> > > +				 ((val & MT6577_AUXADC_STA) == 0),
> > > +				 MT6577_AUXADC_SLEEP_US,
> > > +				 MT6577_AUXADC_TIMEOUT_US);
> > > +	if (ret < 0) {
> > > +		dev_err(indio_dev->dev.parent,
> > > +			"wait for auxadc idle time out\n");
> > > +
> > > +		mutex_unlock(&adc_dev->lock);
> > > +
> > > +		return -ETIMEDOUT;
> > > +	}
> > > +
> > > +	/* read channel and make sure ready bit == 1 */
> > > +	ret = readl_poll_timeout(reg_channel, val,
> > > +				 ((val & MT6577_AUXADC_RDY0) != 0),
> > > +				 MT6577_AUXADC_SLEEP_US,
> > > +				 MT6577_AUXADC_TIMEOUT_US);
> > > +	if (ret < 0) {
> > > +		dev_err(indio_dev->dev.parent,
> > > +			"wait for channel[%d] data ready time out\n",
> > > +			chan->channel);
> > > +
> > > +		mutex_unlock(&adc_dev->lock);
> > > +
> > > +		return -ETIMEDOUT;
> > > +	}
> > > +
> > > +	/* read data */
> > > +	rawdata = readl(reg_channel) & MT6577_AUXADC_DAT_MASK;
> > > +
> > > +	mutex_unlock(&adc_dev->lock);
> > > +
> > > +	return rawdata;
> > > +}
> > > +
> > > +static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev,
> > > +				  struct iio_chan_spec const *chan,
> > > +				  int *val,
> > > +				  int *val2,
> > > +				  long info)
> > > +{
> > > +	switch (info) {
> > > +	case IIO_CHAN_INFO_PROCESSED:
> > > +		*val = mt6577_auxadc_read(indio_dev, chan);
> > > +		if (*val < 0) {
> > > +			dev_err(indio_dev->dev.parent,
> > > +				"failed to sample data on channel[%d]\n",
> > > +				chan->channel);
> > > +			return *val;
> > > +		}
> > > +		return IIO_VAL_INT;
> > > +
> > > +	default:
> > > +		return -EINVAL;
> > > +	}
> > > +}
> > > +
> > > +static const struct iio_info mt6577_auxadc_info = {
> > > +	.driver_module = THIS_MODULE,
> > > +	.read_raw = &mt6577_auxadc_read_raw,
> > > +};
> > > +
> > > +static int mt6577_auxadc_probe(struct platform_device *pdev)
> > > +{
> > > +	struct mt6577_auxadc_device *adc_dev;
> > > +	unsigned long adc_clk_rate;
> > > +	struct resource *res;
> > > +	struct iio_dev *indio_dev;
> > > +	int ret;
> > > +	u32 val;
> > > +
> > > +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev));
> > > +	if (!indio_dev)
> > > +		return -ENOMEM;
> > > +
> > > +	adc_dev = iio_priv(indio_dev);
> > > +	indio_dev->dev.parent = &pdev->dev;
> > > +	indio_dev->name = dev_name(&pdev->dev);
> > > +	indio_dev->info = &mt6577_auxadc_info;
> > > +	indio_dev->modes = INDIO_DIRECT_MODE;
> > > +	indio_dev->channels = mt6577_auxadc_iio_channels;
> > > +	indio_dev->num_channels = ARRAY_SIZE(mt6577_auxadc_iio_channels);
> > > +
> > > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > > +	adc_dev->reg_base = devm_ioremap_resource(&pdev->dev, res);
> > > +	if (IS_ERR(adc_dev->reg_base)) {
> > > +		dev_err(&pdev->dev, "failed to get auxadc base address.\n");
> > > +		return PTR_ERR(adc_dev->reg_base);
> > > +	}
> > > +
> > > +	adc_dev->adc_clk = devm_clk_get(&pdev->dev, "main");
> > > +	if (IS_ERR(adc_dev->adc_clk)) {
> > > +		dev_err(&pdev->dev, "failed to get auxadc clock\n");
> > > +		return PTR_ERR(adc_dev->adc_clk);
> > > +	}
> > > +
> > > +	ret = clk_prepare_enable(adc_dev->adc_clk);
> > > +	if (ret) {
> > > +		dev_err(&pdev->dev, "failed to enable auxadc clock\n");
> > > +		return ret;
> > > +	}
> > > +
> > > +	adc_clk_rate = clk_get_rate(adc_dev->adc_clk);
> > > +	if (!adc_clk_rate) {
> > > +		dev_err(&pdev->dev, "null clock rate!\n");
> > > +		goto err_disable_clk;
> > > +	}
> > > +
> > > +	mutex_init(&adc_dev->lock);
> > > +
> > > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> > > +	val |= MT6577_AUXADC_PDN_EN;
> > > +	writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> > > +	mdelay(MT6577_AUXADC_POWER_READY_MS);
> > > +
> > > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> > > +	if ((val & MT6577_AUXADC_PDN_EN) == 0) {
> > That's a high level of paranoia... Any reason to believe this might fail?
> 
> Someone reviews the code and gives a suggestion to power off chenck.
> If auxadc clk is off in the case, we can not write MT6577_AUXADC_PDN_EN
> in MT6577_AUXADC_MISC. So it may cause to enable auxadc power failed.
> 

sorry, I have searched the previous versions.
I found that I  misunderstand the intention.
The power on failed checked will be removed in the next version.

> > > +		dev_err(&pdev->dev, "failed to enable auxadc power!\n");
> > > +		goto err_disable_clk;
> > > +	}
> > > +
> > > +	platform_set_drvdata(pdev, indio_dev);
> > > +
> > > +	ret = iio_device_register(indio_dev);
> > > +	if (ret < 0) {
> > I'd have slightly preferred that this error unwind block was also
> > moved to on a goto.  Makes it easier to review as the error block then
> > matches remove (with expected differences!)  Really small point however.
> 
> I will update this in next version.
> 
> > 
> > > +		dev_err(&pdev->dev, "failed to register iio device!\n");
> > > +		val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> > > +		val &= ~MT6577_AUXADC_PDN_EN;
> > > +		writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> > > +		goto err_disable_clk;
> > > +	}
> > > +
> > > +	return 0;
> > > +
> > > +err_disable_clk:
> > > +	clk_disable_unprepare(adc_dev->adc_clk);
> > > +	return -EINVAL;
> > > +}
> > > +
> > > +static int mt6577_auxadc_remove(struct platform_device *pdev)
> > > +{
> > > +	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
> > > +	struct mt6577_auxadc_device *adc_dev = iio_priv(indio_dev);
> > > +	u32 val;
> > > +
> > > +	iio_device_unregister(indio_dev);
> > > +
> > > +	val = readl(adc_dev->reg_base + MT6577_AUXADC_MISC);
> > > +	val &= ~MT6577_AUXADC_PDN_EN;
> > > +	writel(val, adc_dev->reg_base + MT6577_AUXADC_MISC);
> > > +
> > > +	clk_disable_unprepare(adc_dev->adc_clk);
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static const struct of_device_id mt6577_auxadc_of_match[] = {
> > > +	{ .compatible = "mediatek,mt2701-auxadc", },
> > > +	{ .compatible = "mediatek,mt8173-auxadc", },
> > > +	{ }
> > > +};
> > > +MODULE_DEVICE_TABLE(of, mt6577_auxadc_of_match);
> > > +
> > > +static struct platform_driver mt6577_auxadc_driver = {
> > > +	.driver = {
> > > +		.name   = "mt6577-auxadc",
> > > +		.of_match_table = mt6577_auxadc_of_match,
> > > +	},
> > > +	.probe	= mt6577_auxadc_probe,
> > > +	.remove	= mt6577_auxadc_remove,
> > > +};
> > > +module_platform_driver(mt6577_auxadc_driver);
> > > +
> > > +MODULE_AUTHOR("Zhiyong Tao <zhiyong.tao@mediatek.com>");
> > > +MODULE_DESCRIPTION("MTK AUXADC Device Driver");
> > > +MODULE_LICENSE("GPL v2");
> > > 
> > 
> 

[PATCH v4 3/3] arm: dts: mt2701: Add auxadc node.

[Zhiyong Tao]

The commit adds auxadc nodes to the Mediatek MT2701 dtsi file.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
---
 arch/arm/boot/dts/mt2701.dtsi |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 42d5a37..c0a2644 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -187,6 +187,15 @@
 		      <0 0x10216000 0 0x2000>;
 	};
 
+	auxadc: adc@11001000 {
+		compatible = "mediatek,mt2701-auxadc";
+		reg = <0 0x11001000 0 0x1000>;
+		clocks = <&pericfg CLK_PERI_AUXADC>;
+		clock-names = "main";
+		#io-channel-cells = <1>;
+		status = "disabled";
+	};
+
 	uart0: serial@11002000 {
 		compatible = "mediatek,mt2701-uart",
 			     "mediatek,mt6577-uart";
-- 
1.7.9.5