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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, will.deacon@arm.com,
	catalin.marinas@arm.com, marc.zyngier@arm.com,
	mark.rutland@arm.com, james.morse@arm.com,
	ard.biesheuvel@linaro.org, andre.przywara@arm.com,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v3 4/9] arm64: alternative: Disallow patching instructions using literals
Date: Mon,  5 Sep 2016 10:58:24 +0100	[thread overview]
Message-ID: <1473069509-2317-5-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1473069509-2317-1-git-send-email-suzuki.poulose@arm.com>

The alternative code patching doesn't check if the replaced instruction
uses a pc relative literal. This could cause silent corruption in the
instruction stream as the instruction will be executed from a different
address than what it was compiled for. Catch all such cases.

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Suggested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 arch/arm64/kernel/alternative.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c
index 4434dab..992918d 100644
--- a/arch/arm64/kernel/alternative.c
+++ b/arch/arm64/kernel/alternative.c
@@ -79,6 +79,12 @@ static u32 get_alt_insn(struct alt_instr *alt, u32 *insnptr, u32 *altinsnptr)
 			offset = target - (unsigned long)insnptr;
 			insn = aarch64_set_branch_offset(insn, offset);
 		}
+	} else if (aarch64_insn_uses_literal(insn)) {
+		/*
+		 * Disallow patching unhandled instructions using PC relative
+		 * literal addresses
+		 */
+		BUG();
 	}
 
 	return insn;
-- 
2.7.4

  parent reply	other threads:[~2016-09-05  9:59 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-05  9:58 [PATCH v3 0/9] arm64: Work around for mismatched cache line size Suzuki K Poulose
2016-09-05  9:58 ` [PATCH v3 1/9] arm64: Set the safe value for L1 icache policy Suzuki K Poulose
2016-09-05  9:58 ` [PATCH v3 2/9] arm64: Use consistent naming for errata handling Suzuki K Poulose
2016-09-07 10:36   ` Andre Przywara
2016-09-05  9:58 ` [PATCH v3 3/9] arm64: Rearrange CPU errata workaround checks Suzuki K Poulose
2016-09-05  9:58 ` Suzuki K Poulose [this message]
2016-09-05  9:58 ` [PATCH v3 5/9] arm64: insn: Add helpers for adrp offsets Suzuki K Poulose
2016-09-05  9:58 ` [PATCH v3 6/9] arm64: alternative: Add support for patching adrp instructions Suzuki K Poulose
2016-09-05  9:58 ` [PATCH v3 7/9] arm64: Introduce raw_{d,i}cache_line_size Suzuki K Poulose
2016-09-05  9:58 ` [PATCH v3 8/9] arm64: Refactor sysinstr exception handling Suzuki K Poulose
2016-09-07  8:44   ` Will Deacon
2016-09-07 11:29   ` Andre Przywara
2016-09-05  9:58 ` [PATCH v3 9/9] arm64: Work around systems with mismatched cache line sizes Suzuki K Poulose
2016-09-05 10:10   ` Ard Biesheuvel
2016-09-05 10:24     ` Suzuki K Poulose

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