[PATCH 0/7] ARM: amlogic: Add spifc support to Amlogic's GXBB family

[PATCH 0/7] ARM: amlogic: Add spifc support to Amlogic's GXBB family

[Jerome Brunet]

This patch series adds the necessary pins, clocks and device tree nodes to
enable the spifc controller on the GXBB family. I had to add the nand pins
in pintctrl as the pinmux setting left by u-boot was conflicting with the
spifc pinmux during my test on the P200.

Jerome Brunet (4):
  pinctrl: amlogic: gxbb: add spifc pins
  pinctrl: amlogic: gxbb: add nand pins
  clk: gxbb: expose spifc clock
  ARM64: dts: amlogic: add pins for spifc

Neil Armstrong (3):
  spi: meson: Add GXBB compatible
  dt-bindings: spi-meson: Add GXBB Compatible string
  ARM64: dts: meson-gxbb: Add SPIFC node

 .../devicetree/bindings/spi/spi-meson.txt          |  2 +-
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        | 19 +++++++++++
 drivers/clk/meson/gxbb.h                           |  2 +-
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c         | 37 ++++++++++++++++++++++
 drivers/spi/spi-meson-spifc.c                      |  1 +
 include/dt-bindings/clock/gxbb-clkc.h              |  1 +
 6 files changed, 60 insertions(+), 2 deletions(-)

-- 
2.7.4

[PATCH 1/7] pinctrl: amlogic: gxbb: add spifc pins

[Jerome Brunet]

Add EE domains pins for the SPI flash controller

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index cb4d6ad..802ad83 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -156,6 +156,11 @@ static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
 static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
 static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
 
+static const unsigned int spifc_d_pins[]	= { PIN(BOOT_11, EE_OFF) };
+static const unsigned int spifc_q_pins[]	= { PIN(BOOT_12, EE_OFF) };
+static const unsigned int spifc_c_pins[]	= { PIN(BOOT_13, EE_OFF) };
+static const unsigned int spifc_cs_pins[]	= { PIN(BOOT_15, EE_OFF) };
+
 static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };
 static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };
 static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };
@@ -393,6 +398,10 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
 	GROUP(emmc_clk,		4,	18),
 	GROUP(emmc_cmd,		4,	19),
 	GROUP(emmc_ds,		4,	31),
+	GROUP(spifc_d,		5,	1),
+	GROUP(spifc_q,		5,	3),
+	GROUP(spifc_c,		5,	2),
+	GROUP(spifc_cs,		5,	0),
 
 	/* Bank CARD */
 	GROUP(sdcard_d1,	2,	14),
@@ -475,6 +484,10 @@ static const char * const emmc_groups[] = {
 	"emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",
 };
 
+static const char * const spifc_groups[] = {
+	"spifc_d", "spifc_q", "spifc_c", "spifc_cs",
+};
+
 static const char * const sdcard_groups[] = {
 	"sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3",
 	"sdcard_cmd", "sdcard_clk",
@@ -524,6 +537,7 @@ static const char * const i2c_slave_ao_groups[] = {
 static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
+	FUNCTION(spifc),
 	FUNCTION(sdcard),
 	FUNCTION(uart_a),
 	FUNCTION(uart_b),
-- 
2.7.4

[PATCH 2/7] pinctrl: amlogic: gxbb: add nand pins

[Jerome Brunet]

Add EE domains pins for the NAND flash controller.
Even tough we have no driver for the NAND flash controller yet, we need
to have these pins in pinctrl as the actual pin are shared with the spifc
controller. The bootloader on the S905-P200 setup pinmux for the NAND
controller so we need the kernel to properly deactivate this if necessary.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 802ad83..08e6cdd 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -168,6 +168,15 @@ static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) };
 static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) };
 static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) };
 
+static const unsigned int nand_ce0_pins[]	= { PIN(BOOT_8, EE_OFF) };
+static const unsigned int nand_ce1_pins[]	= { PIN(BOOT_9, EE_OFF) };
+static const unsigned int nand_rb0_pins[]	= { PIN(BOOT_10, EE_OFF) };
+static const unsigned int nand_ale_pins[]	= { PIN(BOOT_11, EE_OFF) };
+static const unsigned int nand_cle_pins[]	= { PIN(BOOT_12, EE_OFF) };
+static const unsigned int nand_wen_clk_pins[]	= { PIN(BOOT_13, EE_OFF) };
+static const unsigned int nand_ren_wr_pins[]	= { PIN(BOOT_14, EE_OFF) };
+static const unsigned int nand_dqs_pins[]	= { PIN(BOOT_15, EE_OFF) };
+
 static const unsigned int uart_tx_a_pins[]	= { PIN(GPIOX_12, EE_OFF) };
 static const unsigned int uart_rx_a_pins[]	= { PIN(GPIOX_13, EE_OFF) };
 static const unsigned int uart_cts_a_pins[]	= { PIN(GPIOX_14, EE_OFF) };
@@ -402,6 +411,14 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
 	GROUP(spifc_q,		5,	3),
 	GROUP(spifc_c,		5,	2),
 	GROUP(spifc_cs,		5,	0),
+	GROUP(nand_ce0,		4,	26),
+	GROUP(nand_ce1,		4,	27),
+	GROUP(nand_rb0,		4,	25),
+	GROUP(nand_ale,		4,	24),
+	GROUP(nand_cle,		4,	23),
+	GROUP(nand_wen_clk,	4,	22),
+	GROUP(nand_ren_wr,	4,	21),
+	GROUP(nand_dqs,		4,	20),
 
 	/* Bank CARD */
 	GROUP(sdcard_d1,	2,	14),
@@ -493,6 +510,11 @@ static const char * const sdcard_groups[] = {
 	"sdcard_cmd", "sdcard_clk",
 };
 
+static const char * const nand_groups[] = {
+	"nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle",
+	"nand_wen_clk", "nand_ren_wr", "nand_dqs",
+};
+
 static const char * const uart_a_groups[] = {
 	"uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
 };
@@ -539,6 +561,7 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
 	FUNCTION(emmc),
 	FUNCTION(spifc),
 	FUNCTION(sdcard),
+	FUNCTION(nand),
 	FUNCTION(uart_a),
 	FUNCTION(uart_b),
 	FUNCTION(uart_c),
-- 
2.7.4

[PATCH 3/7] clk: gxbb: expose spifc clock

[Jerome Brunet]

SPI clock is needed for the spifc driver, expose to DT
(and comment out in the clk driver)

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/gxbb.h              | 2 +-
 include/dt-bindings/clock/gxbb-clkc.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index a2adf34..5abe266 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
@@ -202,7 +202,7 @@
 #define CLKID_ABUF		  31
 #define CLKID_HIU_IFACE		  32
 #define CLKID_ASSIST_MISC	  33
-#define CLKID_SPI		  34
+/* CLKID_SPI */
 #define CLKID_I2S_SPDIF		  35
 #define CLKID_ETH		  36
 #define CLKID_DEMUX		  37
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index f889d80..dcf3776 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -7,6 +7,7 @@
 
 #define CLKID_CPUCLK		1
 #define CLKID_CLK81		12
+#define CLKID_SPI		34
 #define CLKID_ETH		36
 
 #endif /* __GXBB_CLKC_H */
-- 
2.7.4

[PATCH 4/7] spi: meson: Add GXBB compatible

[Jerome Brunet]

From: Neil Armstrong <narmstrong@baylibre.com>

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/spi/spi-meson-spifc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/spi-meson-spifc.c b/drivers/spi/spi-meson-spifc.c
index 2465259..616566e 100644
--- a/drivers/spi/spi-meson-spifc.c
+++ b/drivers/spi/spi-meson-spifc.c
@@ -442,6 +442,7 @@ static const struct dev_pm_ops meson_spifc_pm_ops = {
 
 static const struct of_device_id meson_spifc_dt_match[] = {
 	{ .compatible = "amlogic,meson6-spifc", },
+	{ .compatible = "amlogic,meson-gxbb-spifc", },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, meson_spifc_dt_match);
-- 
2.7.4

[PATCH 5/7] dt-bindings: spi-meson: Add GXBB Compatible string

[Jerome Brunet]

From: Neil Armstrong <narmstrong@baylibre.com>

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 Documentation/devicetree/bindings/spi/spi-meson.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-meson.txt b/Documentation/devicetree/bindings/spi/spi-meson.txt
index bb52a86..dc6d031 100644
--- a/Documentation/devicetree/bindings/spi/spi-meson.txt
+++ b/Documentation/devicetree/bindings/spi/spi-meson.txt
@@ -7,7 +7,7 @@ NOR memories, without DMA support and a 64-byte unified transmit /
 receive buffer.
 
 Required properties:
- - compatible: should be "amlogic,meson6-spifc"
+ - compatible: should be "amlogic,meson6-spifc" or "amlogic,meson-gxbb-spifc"
  - reg: physical base address and length of the controller registers
  - clocks: phandle of the input clock for the baud rate generator
  - #address-cells: should be 1
-- 
2.7.4

[PATCH 6/7] ARM64: dts: amlogic: add pins for spifc

[Jerome Brunet]

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 762f368..b35fc94 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -333,6 +333,16 @@
 					};
 				};
 
+				spifc_pins: spifc {
+					mux {
+						groups = "spifc_d",
+						       "spifc_q",
+						       "spifc_c",
+						       "spifc_cs";
+						function = "spifc";
+					};
+				};
+
 				sdcard_pins: sdcard {
 					mux {
 						groups = "sdcard_d0",
-- 
2.7.4

[PATCH 7/7] ARM64: dts: meson-gxbb: Add SPIFC node

[Jerome Brunet]

From: Neil Armstrong <narmstrong@baylibre.com>

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index b35fc94..3d12044 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -193,6 +193,15 @@
 				reg = <0x0 0x098d0 0x0 0x10>;
 				clocks = <&xtal>;
 			};
+
+			spifc: spi@8c80 {
+				compatible = "amlogic,meson-gxbb-spifc";
+				reg = <0x0 0x08c80 0x0 0x80>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_SPI>;
+				status = "disabled";
+			};
 		};
 
 		gic: interrupt-controller@c4301000 {
-- 
2.7.4

Re: [PATCH 4/7] spi: meson: Add GXBB compatible

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 457 bytes --]

On Wed, Sep 07, 2016 at 05:13:40PM +0200, Jerome Brunet wrote:
> From: Neil Armstrong <narmstrong@baylibre.com>
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---

I can't do anything with this, you've not provided a signoff.  Please
resend with a signoff - see SubmittingPatches for details on what this
means and why it's important.

I also only have patches 4 and 5 of this series and no cover letter,
what is going on there?

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 455 bytes --]

Re: [PATCH 3/7] clk: gxbb: expose spifc clock

[Stephen Boyd]

On 09/07, Jerome Brunet wrote:
> SPI clock is needed for the spifc driver, expose to DT
> (and comment out in the clk driver)
> 
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---

Acked-by: Stephen Boyd <sboyd@codeaurora.org>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH 4/7] spi: meson: Add GXBB compatible

[Neil Armstrong]

On 09/07/2016 08:58 PM, Mark Brown wrote:
> On Wed, Sep 07, 2016 at 05:13:40PM +0200, Jerome Brunet wrote:
>> From: Neil Armstrong <narmstrong@baylibre.com>
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
> 
> I can't do anything with this, you've not provided a signoff.  Please
> resend with a signoff - see SubmittingPatches for details on what this
> means and why it's important.
> 
> I also only have patches 4 and 5 of this series and no cover letter,
> what is going on there?
> 

Hi Mark,

Submitting patchsets for multiple subsystems is not straightforward, the cover-letter should also have been sent to linux-spi ML, lesson learned !

Jerome left my signoff because the patches were left untouched from my branch.
Nevertheless, I will submit these patches 4 & 5 in a separate SPI serie, please ignore them in this patchset.

Thanks,
Neil

Re: [PATCH 1/7] pinctrl: amlogic: gxbb: add spifc pins

[Kevin Hilman]

Jerome Brunet <jbrunet@baylibre.com> writes:

> Add EE domains pins for the SPI flash controller
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> index cb4d6ad..802ad83 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> @@ -156,6 +156,11 @@ static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
>  static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
>  static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
>  
> +static const unsigned int spifc_d_pins[]	= { PIN(BOOT_11, EE_OFF) };
> +static const unsigned int spifc_q_pins[]	= { PIN(BOOT_12, EE_OFF) };
> +static const unsigned int spifc_c_pins[]	= { PIN(BOOT_13, EE_OFF) };
> +static const unsigned int spifc_cs_pins[]	= { PIN(BOOT_15, EE_OFF) };

In the datasheet, these are called nor_* instead of spifc_*.  I'm trying
to keep the names here aligned with the names in the datasheet.  Please
rename to nor_*.

Thanks,

Kevin

Re: [PATCH 2/7] pinctrl: amlogic: gxbb: add nand pins

[Kevin Hilman]

Jerome Brunet <jbrunet@baylibre.com> writes:

> Add EE domains pins for the NAND flash controller.
> Even tough we have no driver for the NAND flash controller yet, we need
> to have these pins in pinctrl as the actual pin are shared with the spifc
> controller. The bootloader on the S905-P200 setup pinmux for the NAND
> controller so we need the kernel to properly deactivate this if necessary.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

Acked-by: Kevin Hilman <khilman@baylibre.com>

Re: [PATCH 3/7] clk: gxbb: expose spifc clock

[Kevin Hilman]

Stephen Boyd <sboyd@codeaurora.org> writes:

> On 09/07, Jerome Brunet wrote:
>> SPI clock is needed for the spifc driver, expose to DT
>> (and comment out in the clk driver)
>> 
>> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
>> ---
>
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>

Applied,

Kevin

Applied "spi: meson: Add GXBB compatible" to the spi tree

[Mark Brown]

The patch

   spi: meson: Add GXBB compatible

has been applied to the spi tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 2f58ea64bd8931bd7709732fe0a96e0bfb44a00b Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 8 Sep 2016 09:53:26 +0200
Subject: [PATCH] spi: meson: Add GXBB compatible

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 drivers/spi/spi-meson-spifc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/spi-meson-spifc.c b/drivers/spi/spi-meson-spifc.c
index 2465259f6241..616566e793c6 100644
--- a/drivers/spi/spi-meson-spifc.c
+++ b/drivers/spi/spi-meson-spifc.c
@@ -442,6 +442,7 @@ static const struct dev_pm_ops meson_spifc_pm_ops = {
 
 static const struct of_device_id meson_spifc_dt_match[] = {
 	{ .compatible = "amlogic,meson6-spifc", },
+	{ .compatible = "amlogic,meson-gxbb-spifc", },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, meson_spifc_dt_match);
-- 
2.8.1

Applied "spi: meson: Add GXBB Compatible string" to the spi tree

[Mark Brown]

The patch

   spi: meson: Add GXBB Compatible string

has been applied to the spi tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 164c5cd5ffabfa7a060999f8184927017287c39b Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 8 Sep 2016 09:53:25 +0200
Subject: [PATCH] spi: meson: Add GXBB Compatible string

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 Documentation/devicetree/bindings/spi/spi-meson.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-meson.txt b/Documentation/devicetree/bindings/spi/spi-meson.txt
index bb52a86f3365..dc6d0313324a 100644
--- a/Documentation/devicetree/bindings/spi/spi-meson.txt
+++ b/Documentation/devicetree/bindings/spi/spi-meson.txt
@@ -7,7 +7,7 @@ NOR memories, without DMA support and a 64-byte unified transmit /
 receive buffer.
 
 Required properties:
- - compatible: should be "amlogic,meson6-spifc"
+ - compatible: should be "amlogic,meson6-spifc" or "amlogic,meson-gxbb-spifc"
  - reg: physical base address and length of the controller registers
  - clocks: phandle of the input clock for the baud rate generator
  - #address-cells: should be 1
-- 
2.8.1