* [PATCH 1/3] ls1043ardb: add qe node to ls1043ardb
@ 2016-09-28 3:40 Zhao Qiang
2016-09-28 3:40 ` [PATCH 2/3] ls1043ardb: add ds26522 node to dts Zhao Qiang
2016-09-28 3:40 ` [PATCH 3/3] bindings: add compatible "fsl,ls1043-ucc-hdlc" to bindings Zhao Qiang
0 siblings, 2 replies; 4+ messages in thread
From: Zhao Qiang @ 2016-09-28 3:40 UTC (permalink / raw)
To: robh+dt
Cc: mark.rutland, catalin.marinas, will.deacon, xiaobo.xie,
linux-kernel, devicetree, linux-arm-kernel, Zhao Qiang
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 16 ++++++
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 66 +++++++++++++++++++++++
2 files changed, 82 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index 4084631..4fc60e7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -124,6 +124,22 @@
};
};
+&uqe {
+ ucc_hdlc: ucc@2000 {
+ compatible = "fsl,ls1043-ucc-hdlc", "fsl,ucc-hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot-mask = <0xfffffffe>;
+ fsl,rx-timeslot-mask = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+};
+
&duart0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index e669fbd..f6b6775 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -388,6 +388,72 @@
#interrupt-cells = <2>;
};
+ uqe: uqe@2400000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "qe";
+ compatible = "fsl,qe", "simple-bus";
+ ranges = <0x0 0x0 0x2400000 0x40000>;
+ reg = <0x0 0x2400000 0x0 0x480>;
+ brg-frequency = <100000000>;
+ bus-frequency = <200000000>;
+
+ fsl,qe-num-riscs = <1>;
+ fsl,qe-num-snums = <28>;
+
+ qeic: qeic@80 {
+ compatible = "fsl,qe-ic";
+ reg = <0x80 0x80>;
+ #address-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupts = <0 77 0x04 0 77 0x04>;
+ };
+
+ si1: si@700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,ls1043-qe-si",
+ "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ls1043-qe-siram",
+ "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc@2000 {
+ cell-index = <1>;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
+ };
+
+ ucc@2200 {
+ cell-index = <3>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
+ };
+
+ muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
+ ranges = <0x0 0x10000 0x6000>;
+
+ data-only@0 {
+ compatible = "fsl,qe-muram-data",
+ "fsl,cpm-muram-data";
+ reg = <0x0 0x6000>;
+ };
+ };
+ };
+
lpuart0: serial@2950000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x2950000 0x0 0x1000>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/3] ls1043ardb: add ds26522 node to dts
2016-09-28 3:40 [PATCH 1/3] ls1043ardb: add qe node to ls1043ardb Zhao Qiang
@ 2016-09-28 3:40 ` Zhao Qiang
2016-09-28 3:40 ` [PATCH 3/3] bindings: add compatible "fsl,ls1043-ucc-hdlc" to bindings Zhao Qiang
1 sibling, 0 replies; 4+ messages in thread
From: Zhao Qiang @ 2016-09-28 3:40 UTC (permalink / raw)
To: robh+dt
Cc: mark.rutland, catalin.marinas, will.deacon, xiaobo.xie,
linux-kernel, devicetree, linux-arm-kernel, Zhao Qiang
add ds26522 node to fsl-ls1043a-rdb.dts
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index 4fc60e7..206a8f5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -122,6 +122,22 @@
reg = <0>;
spi-max-frequency = <1000000>; /* input clock */
};
+
+ slic@2 {
+ compatible = "maxim,ds26522";
+ reg = <2>;
+ spi-max-frequency = <2000000>;
+ fsl,spi-cs-sck-delay = <100>;
+ fsl,spi-sck-cs-delay = <50>;
+ };
+
+ slic@3 {
+ compatible = "maxim,ds26522";
+ reg = <3>;
+ spi-max-frequency = <2000000>;
+ fsl,spi-cs-sck-delay = <100>;
+ fsl,spi-sck-cs-delay = <50>;
+ };
};
&uqe {
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 3/3] bindings: add compatible "fsl,ls1043-ucc-hdlc" to bindings
2016-09-28 3:40 [PATCH 1/3] ls1043ardb: add qe node to ls1043ardb Zhao Qiang
2016-09-28 3:40 ` [PATCH 2/3] ls1043ardb: add ds26522 node to dts Zhao Qiang
@ 2016-09-28 3:40 ` Zhao Qiang
2016-10-09 1:28 ` [PATCH 3/3] bindings: add compatible "fsl, ls1043-ucc-hdlc" " Rob Herring
1 sibling, 1 reply; 4+ messages in thread
From: Zhao Qiang @ 2016-09-28 3:40 UTC (permalink / raw)
To: robh+dt
Cc: mark.rutland, catalin.marinas, will.deacon, xiaobo.xie,
linux-kernel, devicetree, linux-arm-kernel, Zhao Qiang
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
index 03c7416..325e3e2 100644
--- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
@@ -45,7 +45,7 @@ Example:
* HDLC
Currently defined compatibles:
-- fsl,ucc-hdlc
+- "fsl,ucc-hdlc", "fsl,ls1043-ucc-hdlc"
Properties for fsl,ucc-hdlc:
- rx-clock-name
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 3/3] bindings: add compatible "fsl, ls1043-ucc-hdlc" to bindings
2016-09-28 3:40 ` [PATCH 3/3] bindings: add compatible "fsl,ls1043-ucc-hdlc" to bindings Zhao Qiang
@ 2016-10-09 1:28 ` Rob Herring
0 siblings, 0 replies; 4+ messages in thread
From: Rob Herring @ 2016-10-09 1:28 UTC (permalink / raw)
To: Zhao Qiang
Cc: mark.rutland, devicetree, catalin.marinas, will.deacon,
xiaobo.xie, linux-kernel, linux-arm-kernel
On Wed, Sep 28, 2016 at 11:40:38AM +0800, Zhao Qiang wrote:
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---
> Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> index 03c7416..325e3e2 100644
> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> @@ -45,7 +45,7 @@ Example:
> * HDLC
>
> Currently defined compatibles:
> -- fsl,ucc-hdlc
> +- "fsl,ucc-hdlc", "fsl,ls1043-ucc-hdlc"
What's the relationship of these 2 compatibles? Both should be specified
for LS1043 or ...? The former only applies to certain SoCs? Rework this
text to answer these questions.
Rob
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-10-09 1:30 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2016-09-28 3:40 [PATCH 1/3] ls1043ardb: add qe node to ls1043ardb Zhao Qiang
2016-09-28 3:40 ` [PATCH 2/3] ls1043ardb: add ds26522 node to dts Zhao Qiang
2016-09-28 3:40 ` [PATCH 3/3] bindings: add compatible "fsl,ls1043-ucc-hdlc" to bindings Zhao Qiang
2016-10-09 1:28 ` [PATCH 3/3] bindings: add compatible "fsl, ls1043-ucc-hdlc" " Rob Herring
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