[PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes

[PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes

[John Garry]

This patchset resolves some hip06 SAS device tree issues.

John Garry (3):
  arm64: dts: hisi: fix hip06 sas am-max-trans quirk
  arm64: dts: hisi: disable sas0 and sas2 for d03
  arm64: dts: hisi: add refclk node to hip06 dts files for SAS

 arch/arm64/boot/dts/hisilicon/hip06-d03.dts |  8 --------
 arch/arm64/boot/dts/hisilicon/hip06.dtsi    | 11 ++++++++++-
 2 files changed, 10 insertions(+), 9 deletions(-)

-- 
1.9.1

[PATCH 1/3] arm64: dts: hisi: fix hip06 sas am-max-trans quirk

[John Garry]

The string for the am max transmissions quirk property
is not correct -> fix it.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
---
 arch/arm64/boot/dts/hisilicon/hip06.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index b548763..5330abb 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -590,7 +590,7 @@
 			reg = <0 0xa2000000 0 0x10000>;
 			sas-addr = [50 01 88 20 16 00 00 00];
 			hisilicon,sas-syscon = <&pcie_subctl>;
-			am-max-trans;
+			hip06-sas-v2-quirk-amt;
 			ctrl-reset-reg = <0xa18>;
 			ctrl-reset-sts-reg = <0x5a0c>;
 			ctrl-clock-ena-reg = <0x318>;
-- 
1.9.1

[PATCH 2/3] arm64: dts: hisi: disable sas0 and sas2 for d03

[John Garry]

The SAS nodes sas0 and sas2 are not available on d03, so
disable them.

Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Xu Wei <xuwei5@hisilicon.com>
---
 arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hip06-d03.dts b/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
index f54b283..7c4114a 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip06-d03.dts
@@ -41,18 +41,10 @@
 	status = "ok";
 };
 
-&sas0 {
-	status = "ok";
-};
-
 &sas1 {
 	status = "ok";
 };
 
-&sas2 {
-	status = "ok";
-};
-
 &usb_ohci {
 	status = "ok";
 };
-- 
1.9.1

[PATCH 3/3] arm64: dts: hisi: add refclk node to hip06 dts files for SAS

[John Garry]

We will only maintain 1 dts for D03 and there are 50MHz
and 66MHz versions of D03: so we expect UEFI to update
refclk rate in the fdt at boot time.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
---
 arch/arm64/boot/dts/hisilicon/hip06.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 5330abb..7b40dce 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -318,6 +318,12 @@
 		#size-cells = <2>;
 		ranges;
 
+		refclk: refclk {
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+			#clock-cells = <0>;
+		};
+
 		usb_ohci: ohci@a7030000 {
 			compatible = "generic-ohci";
 			reg = <0x0 0xa7030000 0x0 0x10000>;
@@ -552,6 +558,7 @@
 			ctrl-reset-reg = <0xa60>;
 			ctrl-reset-sts-reg = <0x5a30>;
 			ctrl-clock-ena-reg = <0x338>;
+			clocks = <&refclk 0>;
 			queue-count = <16>;
 			phy-count = <8>;
 			dma-coherent;
@@ -594,6 +601,7 @@
 			ctrl-reset-reg = <0xa18>;
 			ctrl-reset-sts-reg = <0x5a0c>;
 			ctrl-clock-ena-reg = <0x318>;
+			clocks = <&refclk 0>;
 			queue-count = <16>;
 			phy-count = <8>;
 			dma-coherent;
@@ -635,6 +643,7 @@
 			ctrl-reset-reg = <0xae0>;
 			ctrl-reset-sts-reg = <0x5a70>;
 			ctrl-clock-ena-reg = <0x3a8>;
+			clocks = <&refclk 0>;
 			queue-count = <16>;
 			phy-count = <9>;
 			dma-coherent;
-- 
1.9.1

Re: [PATCH 0/3] arm64: dts: hisi: hip06 SAS device tree fixes

[Wei Xu]

Hi John,

On 2016/11/7 16:44, John Garry wrote:
> This patchset resolves some hip06 SAS device tree issues.
>

Series applied to the hisilicon soc tree.
Thanks!

Best Regards,
Wei

> John Garry (3):
>   arm64: dts: hisi: fix hip06 sas am-max-trans quirk
>   arm64: dts: hisi: disable sas0 and sas2 for d03
>   arm64: dts: hisi: add refclk node to hip06 dts files for SAS
> 
>  arch/arm64/boot/dts/hisilicon/hip06-d03.dts |  8 --------
>  arch/arm64/boot/dts/hisilicon/hip06.dtsi    | 11 ++++++++++-
>  2 files changed, 10 insertions(+), 9 deletions(-)
>