[PATCH V2 0/4] soc/tegra: pmc: Add support for IO pad configuration and sub-driver

[PATCH V2 0/4] soc/tegra: pmc: Add support for IO pad configuration and sub-driver

[Laxman Dewangan]

Tegra SoC support the configutaion of IO pads to multi-level voltage
and low power state. The conifguration is done via pictrl framework
and the io pad driver in pinctrl frameowrk uses the APIs from pmc to
access PMC registers.

his series add the API to get the IO pad power status and register
the pmc child devices like IO pad drvier.

The patches were send earlier part of different series but applied
partially in the Thierry's t186 branch
	https://github.com/thierryreding/linux/tree/tegra186.

Resending the patches as the new start to avoid any confusion.
This need to be applied in
	https://github.com/thierryreding/linux/tree/tegra186

---
Changes from V1:
- make the IO pad votlage configurations to the atomic context as 4th patch of
  series.

Laxman Dewangan (4):
  soc/tegra: pmc: Remove legacy Tegra I/O rail API
  soc/tegra: pmc: Add interface to get IO pad power status
  soc/tegra: pmc: Register PMC child devices as platform device
  soc/tegra: pmc: Make configuration of IO pads in atomic context

 drivers/soc/tegra/pmc.c | 88 +++++++++++++++++++++++++++++++++++++++++++++++--
 include/soc/tegra/pmc.h | 14 +++-----
 2 files changed, 91 insertions(+), 11 deletions(-)

-- 
2.1.4

[PATCH V2 1/4] soc/tegra: pmc: Remove legacy Tegra I/O rail API

[Laxman Dewangan]

Remove tegra_io_rail_power_on() and tegra_io_rail_power_off()
from header as client has been moved to new APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

---
Changes from V1:
 None
---
 include/soc/tegra/pmc.h | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h
index 52780a77..9c314a6 100644
--- a/include/soc/tegra/pmc.h
+++ b/include/soc/tegra/pmc.h
@@ -203,16 +203,6 @@ static inline int tegra_io_pad_get_voltage(enum tegra_io_pad id)
 {
 	return -ENOSYS;
 }
-
-static inline int tegra_io_rail_power_on(unsigned int id)
-{
-	return -ENOSYS;
-}
-
-static inline int tegra_io_rail_power_off(unsigned int id)
-{
-	return -ENOSYS;
-}
 #endif /* CONFIG_ARCH_TEGRA */
 
 #endif /* __SOC_TEGRA_PMC_H__ */
-- 
2.1.4

[PATCH V2 2/4] soc/tegra: pmc: Add interface to get IO pad power status

[Laxman Dewangan]

Add API to get the IO pad power status of the Tegra IO pads.
This will help client driver to get the current power status
of IO pads for handling IO pad power.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

---
Changes from V1:
 None
---
 drivers/soc/tegra/pmc.c | 22 ++++++++++++++++++++++
 include/soc/tegra/pmc.h |  6 ++++++
 2 files changed, 28 insertions(+)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index bb3715f..44546bd 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -1063,6 +1063,28 @@ int tegra_io_pad_power_disable(enum tegra_io_pad id)
 }
 EXPORT_SYMBOL(tegra_io_pad_power_disable);
 
+int tegra_io_pad_power_get_status(enum tegra_io_pad id)
+{
+	const struct tegra_io_pad_soc *pad;
+	unsigned long status;
+	u32 value;
+	int bit;
+
+	pad = tegra_io_pad_find(pmc, id);
+	if (!pad)
+		return -ENOENT;
+
+	if (pad->dpd == UINT_MAX)
+		return -ENOTSUPP;
+
+	status = (pad->dpd < 32) ? IO_DPD_STATUS : IO_DPD2_STATUS;
+	bit = pad->dpd % 32;
+	value = tegra_pmc_readl(status);
+
+	return !!(value & BIT(bit));
+}
+EXPORT_SYMBOL(tegra_io_pad_power_get_status);
+
 int tegra_io_pad_set_voltage(enum tegra_io_pad id,
 			     enum tegra_io_pad_voltage voltage)
 {
diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h
index 9c314a6..18cf172 100644
--- a/include/soc/tegra/pmc.h
+++ b/include/soc/tegra/pmc.h
@@ -152,6 +152,7 @@ int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk,
 
 int tegra_io_pad_power_enable(enum tegra_io_pad id);
 int tegra_io_pad_power_disable(enum tegra_io_pad id);
+int tegra_io_pad_power_get_status(enum tegra_io_pad id);
 int tegra_io_pad_set_voltage(enum tegra_io_pad id,
 			     enum tegra_io_pad_voltage voltage);
 int tegra_io_pad_get_voltage(enum tegra_io_pad id);
@@ -193,6 +194,11 @@ static inline int tegra_io_pad_power_disable(enum tegra_io_pad id)
 	return -ENOSYS;
 }
 
+static inline int tegra_io_pad_power_get_status(enum tegra_io_pad id)
+{
+	return -ENOSYS;
+}
+
 static inline int tegra_io_pad_set_voltage(enum tegra_io_pad id,
 					   enum tegra_io_pad_voltage voltage)
 {
-- 
2.1.4

[PATCH V2 3/4] soc/tegra: pmc: Register PMC child devices as platform device

[Laxman Dewangan]

Power Management Controller(PMC) of Tegra does the multiple chip
power management related functionality for internal and IO interfacing.
Some of the functionalities are power gating of IP blocks, IO pads
voltage and power state configuration, system power state configurations,
wakeup controls etc.

Different functionalities of the PMC are provided through different
framework like IO pads control can be provided through pinctrl framework,
IO power control is via misc driver etc. All sub functionalities are
represented as PMC child devices.

Register the PMC child devices as platform device and fill the child
devices table for Tegra124 and Tegra210.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

---
Changes from V1:
 None
---
 drivers/soc/tegra/pmc.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 44546bd..916a94b 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -145,6 +145,9 @@ struct tegra_pmc_soc {
 
 	const struct tegra_io_pad_soc *io_pads;
 	unsigned int num_io_pads;
+
+	const char **sub_devs_name;
+	unsigned int num_sub_devs;
 };
 
 /**
@@ -169,6 +172,7 @@ struct tegra_pmc_soc {
  * @lp0_vec_size: size of the LP0 warm boot code
  * @powergates_available: Bitmap of available power gates
  * @powergates_lock: mutex for power gate register access
+ * @plat_subdevs: Platform device for PMC child devices.
  */
 struct tegra_pmc {
 	struct device *dev;
@@ -195,6 +199,7 @@ struct tegra_pmc {
 	DECLARE_BITMAP(powergates_available, TEGRA_POWERGATE_MAX);
 
 	struct mutex powergates_lock;
+	struct platform_device **plat_subdevs;
 };
 
 static struct tegra_pmc *pmc = &(struct tegra_pmc) {
@@ -1375,6 +1380,43 @@ static void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc)
 	of_node_put(np);
 }
 
+static int tegra_pmc_init_sub_devs(struct tegra_pmc *pmc)
+{
+	int ret, i;
+
+	if (!pmc->soc->num_sub_devs)
+		return 0;
+
+	pmc->plat_subdevs = devm_kzalloc(pmc->dev, pmc->soc->num_sub_devs *
+					 sizeof(**pmc->plat_subdevs),
+					 GFP_KERNEL);
+	if (!pmc->plat_subdevs)
+		return -ENOMEM;
+
+	for (i = 0; i < pmc->soc->num_sub_devs; ++i) {
+		pmc->plat_subdevs[i] = platform_device_register_data(pmc->dev,
+						pmc->soc->sub_devs_name[i],
+						0, NULL, 0);
+		if (IS_ERR(pmc->plat_subdevs[i])) {
+			ret = PTR_ERR(pmc->plat_subdevs[i]);
+			dev_err(pmc->dev,
+				"Failed to register platform device for %s: %d\n",
+				pmc->soc->sub_devs_name[i], ret);
+			goto pdev_cleanups;
+		}
+	}
+
+	return 0;
+
+pdev_cleanups:
+	while (--i >= 0) {
+		platform_device_unregister(pmc->plat_subdevs[i]);
+		pmc->plat_subdevs[i] = NULL;
+	}
+
+	return ret;
+}
+
 static int tegra_pmc_probe(struct platform_device *pdev)
 {
 	void __iomem *base;
@@ -1426,6 +1468,11 @@ static int tegra_pmc_probe(struct platform_device *pdev)
 		return err;
 	}
 
+	err = tegra_pmc_init_sub_devs(pmc);
+	if (err < 0)
+		dev_warn(pmc->dev, "Failed to register PMC sub devices: %d\n",
+			 err);
+
 	mutex_lock(&pmc->powergates_lock);
 	iounmap(pmc->base);
 	pmc->base = base;
@@ -1608,6 +1655,10 @@ static const struct tegra_io_pad_soc tegra124_io_pads[] = {
 	{ .id = TEGRA_IO_PAD_USB_BIAS, .dpd = 12, .voltage = UINT_MAX },
 };
 
+static const char *tegra124_sub_devs_name[] = {
+	"pinctrl-t124-io-pad",
+};
+
 static const struct tegra_pmc_soc tegra124_pmc_soc = {
 	.num_powergates = ARRAY_SIZE(tegra124_powergates),
 	.powergates = tegra124_powergates,
@@ -1617,6 +1668,8 @@ static const struct tegra_pmc_soc tegra124_pmc_soc = {
 	.has_gpu_clamps = true,
 	.num_io_pads = ARRAY_SIZE(tegra124_io_pads),
 	.io_pads = tegra124_io_pads,
+	.sub_devs_name = tegra124_sub_devs_name,
+	.num_sub_devs = ARRAY_SIZE(tegra124_sub_devs_name),
 };
 
 static const char * const tegra210_powergates[] = {
@@ -1694,6 +1747,10 @@ static const struct tegra_io_pad_soc tegra210_io_pads[] = {
 	{ .id = TEGRA_IO_PAD_USB_BIAS, .dpd = 12, .voltage = UINT_MAX },
 };
 
+static const char *tegra210_sub_devs_name[] = {
+	"pinctrl-t210-io-pad",
+};
+
 static const struct tegra_pmc_soc tegra210_pmc_soc = {
 	.num_powergates = ARRAY_SIZE(tegra210_powergates),
 	.powergates = tegra210_powergates,
@@ -1703,6 +1760,8 @@ static const struct tegra_pmc_soc tegra210_pmc_soc = {
 	.has_gpu_clamps = true,
 	.num_io_pads = ARRAY_SIZE(tegra210_io_pads),
 	.io_pads = tegra210_io_pads,
+	.sub_devs_name = tegra210_sub_devs_name,
+	.num_sub_devs = ARRAY_SIZE(tegra210_sub_devs_name),
 };
 
 static const struct of_device_id tegra_pmc_match[] = {
-- 
2.1.4

[PATCH V2 4/4] soc/tegra: pmc: Make configuration of IO pads in atomic context

[Laxman Dewangan]

The IO pad voltage configuration can be done in the regulator
notifier callback which is atomic in nature.

Replace the mutex with spin lock for the locking mechanism.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>

---
Changes from V1:
 New in series based on pinctrl driver requirement.
---
 drivers/soc/tegra/pmc.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 916a94b..52cd218 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -172,6 +172,7 @@ struct tegra_pmc_soc {
  * @lp0_vec_size: size of the LP0 warm boot code
  * @powergates_available: Bitmap of available power gates
  * @powergates_lock: mutex for power gate register access
+ * @io_pad_lock: Spinlock for IO pad voltage register access
  * @plat_subdevs: Platform device for PMC child devices.
  */
 struct tegra_pmc {
@@ -199,6 +200,7 @@ struct tegra_pmc {
 	DECLARE_BITMAP(powergates_available, TEGRA_POWERGATE_MAX);
 
 	struct mutex powergates_lock;
+	struct spinlock io_pad_lock;
 	struct platform_device **plat_subdevs;
 };
 
@@ -1103,7 +1105,7 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id,
 	if (pad->voltage == UINT_MAX)
 		return -ENOTSUPP;
 
-	mutex_lock(&pmc->powergates_lock);
+	spin_lock(&pmc->io_pad_lock);
 
 	/* write-enable PMC_PWR_DET_VALUE[pad->voltage] */
 	value = tegra_pmc_readl(PMC_PWR_DET);
@@ -1120,7 +1122,7 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id,
 
 	tegra_pmc_writel(value, PMC_PWR_DET_VALUE);
 
-	mutex_unlock(&pmc->powergates_lock);
+	spin_unlock(&pmc->io_pad_lock);
 
 	usleep_range(100, 250);
 
@@ -1800,6 +1802,7 @@ static int __init tegra_pmc_early_init(void)
 	u32 value;
 
 	mutex_init(&pmc->powergates_lock);
+	spin_lock_init(&pmc->io_pad_lock);
 
 	np = of_find_matching_node_and_match(NULL, tegra_pmc_match, &match);
 	if (!np) {
-- 
2.1.4

Re: [PATCH V2 0/4] soc/tegra: pmc: Add support for IO pad configuration and sub-driver

[Laxman Dewangan]

Thierry,

On Wednesday 09 November 2016 06:39 PM, Laxman Dewangan wrote:
> Tegra SoC support the configutaion of IO pads to multi-level voltage
> and low power state. The conifguration is done via pictrl framework
> and the io pad driver in pinctrl frameowrk uses the APIs from pmc to
> access PMC registers.
>
> his series add the API to get the IO pad power status and register
> the pmc child devices like IO pad drvier.
>
> The patches were send earlier part of different series but applied
> partially in the Thierry's t186 branch
> 	https://github.com/thierryreding/linux/tree/tegra186.
>
> Resending the patches as the new start to avoid any confusion.
> This need to be applied in
> 	https://github.com/thierryreding/linux/tree/tegra186
>

Any comment on this?
I saw that your patches are available from t186 branch to linux-next.

Do I need to re-send the patches on top of linux-next?