* [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest
@ 2016-11-11 9:25 He Chen
2016-11-11 9:25 ` [PATCH v6 1/3] x86/cpuid: Cleanup cpuid_regs definitions He Chen
` (3 more replies)
0 siblings, 4 replies; 18+ messages in thread
From: He Chen @ 2016-11-11 9:25 UTC (permalink / raw)
To: kvm
Cc: linux-kernel, x86, Paolo Bonzini, Radim Krčmář,
Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang,
Piotr Luc, Borislav Petkov
This patch series is going to add two new AVX512 features to KVM guest.
Since these two features are defined as scattered features in kernel,
some extra modification in kernel is included.
BTW. sorry for sending patch so frequently, and really appreciate your
kindly review.
---
Changes in v6:
* refine commit messages.
Changes in v5:
* divide the whole patchset into 3 parts.
* refine commit messages.
Changes in v4:
* divide patch into 2 parts, including modification in scattered.c and
support new AVX512 instructions for KVM.
* coding style.
* refine commit message.
Changes in v3:
* add a helper in scattered.c to get scattered leaf.
Changes in v2:
* add new macros for new AVX512 scattered features.
* add a cpuid_count_edx function to processor.h
He Chen (3):
x86/cpuid: Cleanup cpuid_regs definitions
x86/cpuid: Add a helper in scattered.c to return cpuid
x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS subfeatures support
arch/x86/events/intel/pt.c | 45 ++++++++++++++-----------------
arch/x86/include/asm/processor.h | 14 ++++++++++
arch/x86/kernel/cpu/scattered.c | 57 ++++++++++++++++++++++++++--------------
arch/x86/kernel/cpuid.c | 4 ---
arch/x86/kvm/cpuid.c | 14 +++++++++-
5 files changed, 84 insertions(+), 50 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH v6 1/3] x86/cpuid: Cleanup cpuid_regs definitions 2016-11-11 9:25 [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest He Chen @ 2016-11-11 9:25 ` He Chen 2016-11-16 10:19 ` [tip:x86/cpufeature] " tip-bot for He Chen 2016-11-11 9:25 ` [PATCH v6 2/3] x86/cpuid: Add a helper in scattered.c to return cpuid He Chen ` (2 subsequent siblings) 3 siblings, 1 reply; 18+ messages in thread From: He Chen @ 2016-11-11 9:25 UTC (permalink / raw) To: kvm Cc: linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc, Borislav Petkov make cpuid_regs more clear and avoid potential name clash. Signed-off-by: He Chen <he.chen@linux.intel.com> --- arch/x86/events/intel/pt.c | 45 +++++++++++++++++----------------------- arch/x86/include/asm/processor.h | 11 ++++++++++ arch/x86/kernel/cpu/scattered.c | 28 ++++++++++--------------- arch/x86/kernel/cpuid.c | 4 ---- 4 files changed, 41 insertions(+), 47 deletions(-) diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index c5047b8..1c1b9fe 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -36,13 +36,6 @@ static DEFINE_PER_CPU(struct pt, pt_ctx); static struct pt_pmu pt_pmu; -enum cpuid_regs { - CR_EAX = 0, - CR_ECX, - CR_EDX, - CR_EBX -}; - /* * Capabilities of Intel PT hardware, such as number of address bits or * supported output schemes, are cached and exported to userspace as "caps" @@ -64,21 +57,21 @@ static struct pt_cap_desc { u8 reg; u32 mask; } pt_caps[] = { - PT_CAP(max_subleaf, 0, CR_EAX, 0xffffffff), - PT_CAP(cr3_filtering, 0, CR_EBX, BIT(0)), - PT_CAP(psb_cyc, 0, CR_EBX, BIT(1)), - PT_CAP(ip_filtering, 0, CR_EBX, BIT(2)), - PT_CAP(mtc, 0, CR_EBX, BIT(3)), - PT_CAP(ptwrite, 0, CR_EBX, BIT(4)), - PT_CAP(power_event_trace, 0, CR_EBX, BIT(5)), - PT_CAP(topa_output, 0, CR_ECX, BIT(0)), - PT_CAP(topa_multiple_entries, 0, CR_ECX, BIT(1)), - PT_CAP(single_range_output, 0, CR_ECX, BIT(2)), - PT_CAP(payloads_lip, 0, CR_ECX, BIT(31)), - PT_CAP(num_address_ranges, 1, CR_EAX, 0x3), - PT_CAP(mtc_periods, 1, CR_EAX, 0xffff0000), - PT_CAP(cycle_thresholds, 1, CR_EBX, 0xffff), - PT_CAP(psb_periods, 1, CR_EBX, 0xffff0000), + PT_CAP(max_subleaf, 0, CPUID_EAX, 0xffffffff), + PT_CAP(cr3_filtering, 0, CPUID_EBX, BIT(0)), + PT_CAP(psb_cyc, 0, CPUID_EBX, BIT(1)), + PT_CAP(ip_filtering, 0, CPUID_EBX, BIT(2)), + PT_CAP(mtc, 0, CPUID_EBX, BIT(3)), + PT_CAP(ptwrite, 0, CPUID_EBX, BIT(4)), + PT_CAP(power_event_trace, 0, CPUID_EBX, BIT(5)), + PT_CAP(topa_output, 0, CPUID_ECX, BIT(0)), + PT_CAP(topa_multiple_entries, 0, CPUID_ECX, BIT(1)), + PT_CAP(single_range_output, 0, CPUID_ECX, BIT(2)), + PT_CAP(payloads_lip, 0, CPUID_ECX, BIT(31)), + PT_CAP(num_address_ranges, 1, CPUID_EAX, 0x3), + PT_CAP(mtc_periods, 1, CPUID_EAX, 0xffff0000), + PT_CAP(cycle_thresholds, 1, CPUID_EBX, 0xffff), + PT_CAP(psb_periods, 1, CPUID_EBX, 0xffff0000), }; static u32 pt_cap_get(enum pt_capabilities cap) @@ -213,10 +206,10 @@ static int __init pt_pmu_hw_init(void) for (i = 0; i < PT_CPUID_LEAVES; i++) { cpuid_count(20, i, - &pt_pmu.caps[CR_EAX + i*PT_CPUID_REGS_NUM], - &pt_pmu.caps[CR_EBX + i*PT_CPUID_REGS_NUM], - &pt_pmu.caps[CR_ECX + i*PT_CPUID_REGS_NUM], - &pt_pmu.caps[CR_EDX + i*PT_CPUID_REGS_NUM]); + &pt_pmu.caps[CPUID_EAX + i*PT_CPUID_REGS_NUM], + &pt_pmu.caps[CPUID_EBX + i*PT_CPUID_REGS_NUM], + &pt_pmu.caps[CPUID_ECX + i*PT_CPUID_REGS_NUM], + &pt_pmu.caps[CPUID_EDX + i*PT_CPUID_REGS_NUM]); } ret = -ENOMEM; diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 984a7bf..8f6ac5b 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -137,6 +137,17 @@ struct cpuinfo_x86 { u32 microcode; }; +struct cpuid_regs { + u32 eax, ebx, ecx, edx; +}; + +enum cpuid_regs_idx { + CPUID_EAX = 0, + CPUID_EBX, + CPUID_ECX, + CPUID_EDX, +}; + #define X86_VENDOR_INTEL 0 #define X86_VENDOR_CYRIX 1 #define X86_VENDOR_AMD 2 diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 1db8dc4..dbb470e 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -17,13 +17,6 @@ struct cpuid_bit { u32 sub_leaf; }; -enum cpuid_regs { - CR_EAX = 0, - CR_ECX, - CR_EDX, - CR_EBX -}; - void init_scattered_cpuid_features(struct cpuinfo_x86 *c) { u32 max_level; @@ -31,14 +24,14 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) const struct cpuid_bit *cb; static const struct cpuid_bit cpuid_bits[] = { - { X86_FEATURE_INTEL_PT, CR_EBX,25, 0x00000007, 0 }, - { X86_FEATURE_AVX512_4VNNIW, CR_EDX, 2, 0x00000007, 0 }, - { X86_FEATURE_AVX512_4FMAPS, CR_EDX, 3, 0x00000007, 0 }, - { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 }, - { X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 }, - { X86_FEATURE_HW_PSTATE, CR_EDX, 7, 0x80000007, 0 }, - { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007, 0 }, - { X86_FEATURE_PROC_FEEDBACK, CR_EDX,11, 0x80000007, 0 }, + { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 }, + { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, + { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, + { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, + { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, + { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { 0, 0, 0, 0, 0 } }; @@ -50,8 +43,9 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) max_level > (cb->level | 0xffff)) continue; - cpuid_count(cb->level, cb->sub_leaf, ®s[CR_EAX], - ®s[CR_EBX], ®s[CR_ECX], ®s[CR_EDX]); + cpuid_count(cb->level, cb->sub_leaf, ®s[CPUID_EAX], + ®s[CPUID_EBX], ®s[CPUID_ECX], + ®s[CPUID_EDX]); if (regs[cb->reg] & (1 << cb->bit)) set_cpu_cap(c, cb->feature); diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index 2836de3..9095c80 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c @@ -46,10 +46,6 @@ static struct class *cpuid_class; -struct cpuid_regs { - u32 eax, ebx, ecx, edx; -}; - static void cpuid_smp_cpuid(void *cmd_block) { struct cpuid_regs *cmd = (struct cpuid_regs *)cmd_block; -- 2.7.4 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [tip:x86/cpufeature] x86/cpuid: Cleanup cpuid_regs definitions 2016-11-11 9:25 ` [PATCH v6 1/3] x86/cpuid: Cleanup cpuid_regs definitions He Chen @ 2016-11-16 10:19 ` tip-bot for He Chen 0 siblings, 0 replies; 18+ messages in thread From: tip-bot for He Chen @ 2016-11-16 10:19 UTC (permalink / raw) To: linux-tip-commits Cc: rkrcmar, bp, luwei.kang, tglx, linux-kernel, Piotr.Luc, pbonzini, mingo, he.chen, hpa Commit-ID: 47f10a36003eaf493125a5e6687dd1ff775bfd8c Gitweb: http://git.kernel.org/tip/47f10a36003eaf493125a5e6687dd1ff775bfd8c Author: He Chen <he.chen@linux.intel.com> AuthorDate: Fri, 11 Nov 2016 17:25:34 +0800 Committer: Thomas Gleixner <tglx@linutronix.de> CommitDate: Wed, 16 Nov 2016 11:13:09 +0100 x86/cpuid: Cleanup cpuid_regs definitions cpuid_regs is defined multiple times as structure and enum. Rename the enum and move all of it to processor.h so we don't end up with more instances. Rename the misnomed register enumeration from CR_* to the obvious CPUID_*. [ tglx: Rewrote changelog ] Signed-off-by: He Chen <he.chen@linux.intel.com> Reviewed-by: Borislav Petkov <bp@alien8.de> Cc: Luwei Kang <luwei.kang@intel.com> Cc: kvm@vger.kernel.org Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Piotr Luc <Piotr.Luc@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Link: http://lkml.kernel.org/r/1478856336-9388-2-git-send-email-he.chen@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- arch/x86/events/intel/pt.c | 45 +++++++++++++++++----------------------- arch/x86/include/asm/processor.h | 11 ++++++++++ arch/x86/kernel/cpu/scattered.c | 28 ++++++++++--------------- arch/x86/kernel/cpuid.c | 4 ---- 4 files changed, 41 insertions(+), 47 deletions(-) diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index c5047b8..1c1b9fe 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -36,13 +36,6 @@ static DEFINE_PER_CPU(struct pt, pt_ctx); static struct pt_pmu pt_pmu; -enum cpuid_regs { - CR_EAX = 0, - CR_ECX, - CR_EDX, - CR_EBX -}; - /* * Capabilities of Intel PT hardware, such as number of address bits or * supported output schemes, are cached and exported to userspace as "caps" @@ -64,21 +57,21 @@ static struct pt_cap_desc { u8 reg; u32 mask; } pt_caps[] = { - PT_CAP(max_subleaf, 0, CR_EAX, 0xffffffff), - PT_CAP(cr3_filtering, 0, CR_EBX, BIT(0)), - PT_CAP(psb_cyc, 0, CR_EBX, BIT(1)), - PT_CAP(ip_filtering, 0, CR_EBX, BIT(2)), - PT_CAP(mtc, 0, CR_EBX, BIT(3)), - PT_CAP(ptwrite, 0, CR_EBX, BIT(4)), - PT_CAP(power_event_trace, 0, CR_EBX, BIT(5)), - PT_CAP(topa_output, 0, CR_ECX, BIT(0)), - PT_CAP(topa_multiple_entries, 0, CR_ECX, BIT(1)), - PT_CAP(single_range_output, 0, CR_ECX, BIT(2)), - PT_CAP(payloads_lip, 0, CR_ECX, BIT(31)), - PT_CAP(num_address_ranges, 1, CR_EAX, 0x3), - PT_CAP(mtc_periods, 1, CR_EAX, 0xffff0000), - PT_CAP(cycle_thresholds, 1, CR_EBX, 0xffff), - PT_CAP(psb_periods, 1, CR_EBX, 0xffff0000), + PT_CAP(max_subleaf, 0, CPUID_EAX, 0xffffffff), + PT_CAP(cr3_filtering, 0, CPUID_EBX, BIT(0)), + PT_CAP(psb_cyc, 0, CPUID_EBX, BIT(1)), + PT_CAP(ip_filtering, 0, CPUID_EBX, BIT(2)), + PT_CAP(mtc, 0, CPUID_EBX, BIT(3)), + PT_CAP(ptwrite, 0, CPUID_EBX, BIT(4)), + PT_CAP(power_event_trace, 0, CPUID_EBX, BIT(5)), + PT_CAP(topa_output, 0, CPUID_ECX, BIT(0)), + PT_CAP(topa_multiple_entries, 0, CPUID_ECX, BIT(1)), + PT_CAP(single_range_output, 0, CPUID_ECX, BIT(2)), + PT_CAP(payloads_lip, 0, CPUID_ECX, BIT(31)), + PT_CAP(num_address_ranges, 1, CPUID_EAX, 0x3), + PT_CAP(mtc_periods, 1, CPUID_EAX, 0xffff0000), + PT_CAP(cycle_thresholds, 1, CPUID_EBX, 0xffff), + PT_CAP(psb_periods, 1, CPUID_EBX, 0xffff0000), }; static u32 pt_cap_get(enum pt_capabilities cap) @@ -213,10 +206,10 @@ static int __init pt_pmu_hw_init(void) for (i = 0; i < PT_CPUID_LEAVES; i++) { cpuid_count(20, i, - &pt_pmu.caps[CR_EAX + i*PT_CPUID_REGS_NUM], - &pt_pmu.caps[CR_EBX + i*PT_CPUID_REGS_NUM], - &pt_pmu.caps[CR_ECX + i*PT_CPUID_REGS_NUM], - &pt_pmu.caps[CR_EDX + i*PT_CPUID_REGS_NUM]); + &pt_pmu.caps[CPUID_EAX + i*PT_CPUID_REGS_NUM], + &pt_pmu.caps[CPUID_EBX + i*PT_CPUID_REGS_NUM], + &pt_pmu.caps[CPUID_ECX + i*PT_CPUID_REGS_NUM], + &pt_pmu.caps[CPUID_EDX + i*PT_CPUID_REGS_NUM]); } ret = -ENOMEM; diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 984a7bf..8f6ac5b 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -137,6 +137,17 @@ struct cpuinfo_x86 { u32 microcode; }; +struct cpuid_regs { + u32 eax, ebx, ecx, edx; +}; + +enum cpuid_regs_idx { + CPUID_EAX = 0, + CPUID_EBX, + CPUID_ECX, + CPUID_EDX, +}; + #define X86_VENDOR_INTEL 0 #define X86_VENDOR_CYRIX 1 #define X86_VENDOR_AMD 2 diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 1db8dc4..dbb470e 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -17,13 +17,6 @@ struct cpuid_bit { u32 sub_leaf; }; -enum cpuid_regs { - CR_EAX = 0, - CR_ECX, - CR_EDX, - CR_EBX -}; - void init_scattered_cpuid_features(struct cpuinfo_x86 *c) { u32 max_level; @@ -31,14 +24,14 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) const struct cpuid_bit *cb; static const struct cpuid_bit cpuid_bits[] = { - { X86_FEATURE_INTEL_PT, CR_EBX,25, 0x00000007, 0 }, - { X86_FEATURE_AVX512_4VNNIW, CR_EDX, 2, 0x00000007, 0 }, - { X86_FEATURE_AVX512_4FMAPS, CR_EDX, 3, 0x00000007, 0 }, - { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 }, - { X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 }, - { X86_FEATURE_HW_PSTATE, CR_EDX, 7, 0x80000007, 0 }, - { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007, 0 }, - { X86_FEATURE_PROC_FEEDBACK, CR_EDX,11, 0x80000007, 0 }, + { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 }, + { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, + { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, + { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, + { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, + { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, { 0, 0, 0, 0, 0 } }; @@ -50,8 +43,9 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) max_level > (cb->level | 0xffff)) continue; - cpuid_count(cb->level, cb->sub_leaf, ®s[CR_EAX], - ®s[CR_EBX], ®s[CR_ECX], ®s[CR_EDX]); + cpuid_count(cb->level, cb->sub_leaf, ®s[CPUID_EAX], + ®s[CPUID_EBX], ®s[CPUID_ECX], + ®s[CPUID_EDX]); if (regs[cb->reg] & (1 << cb->bit)) set_cpu_cap(c, cb->feature); diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index 2836de3..9095c80 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c @@ -46,10 +46,6 @@ static struct class *cpuid_class; -struct cpuid_regs { - u32 eax, ebx, ecx, edx; -}; - static void cpuid_smp_cpuid(void *cmd_block) { struct cpuid_regs *cmd = (struct cpuid_regs *)cmd_block; ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v6 2/3] x86/cpuid: Add a helper in scattered.c to return cpuid 2016-11-11 9:25 [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest He Chen 2016-11-11 9:25 ` [PATCH v6 1/3] x86/cpuid: Cleanup cpuid_regs definitions He Chen @ 2016-11-11 9:25 ` He Chen 2016-11-16 10:19 ` [tip:x86/cpufeature] x86/cpuid: Provide get_scattered_cpuid_leaf() tip-bot for He Chen 2016-11-11 9:25 ` [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support He Chen 2016-11-16 10:16 ` [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest Thomas Gleixner 3 siblings, 1 reply; 18+ messages in thread From: He Chen @ 2016-11-11 9:25 UTC (permalink / raw) To: kvm Cc: linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc, Borislav Petkov Some sparse CPUID leafs are gathered in a fake leaf to save size of x86_capability array in current code, but sometimes, kernel or other modules (e.g. KVM CPUID enumeration) may need actual hardware leaf information. This patch adds a helper get_scattered_cpuid_leaf() to rebuild actual CPUID leaf, and it can be called outside by modules. Reviewed-by: Borislav Petkov <bp@suse.de> Signed-off-by: He Chen <he.chen@linux.intel.com> --- arch/x86/include/asm/processor.h | 3 +++ arch/x86/kernel/cpu/scattered.c | 49 ++++++++++++++++++++++++++++++---------- 2 files changed, 40 insertions(+), 12 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 8f6ac5b..e7f8c62 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -189,6 +189,9 @@ extern void identify_secondary_cpu(struct cpuinfo_x86 *); extern void print_cpu_info(struct cpuinfo_x86 *); void print_cpu_msr(struct cpuinfo_x86 *); extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c); +extern u32 get_scattered_cpuid_leaf(unsigned int level, + unsigned int sub_leaf, + enum cpuid_regs_idx reg); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); extern void init_amd_cacheinfo(struct cpuinfo_x86 *c); diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index dbb470e..d1316f9 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -17,24 +17,25 @@ struct cpuid_bit { u32 sub_leaf; }; +/* Please keep the leaf sorted by cpuid_bit.level for faster search. */ +static const struct cpuid_bit cpuid_bits[] = { + { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, + { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, + { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 }, + { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, + { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, + { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, + { 0, 0, 0, 0, 0 } +}; + void init_scattered_cpuid_features(struct cpuinfo_x86 *c) { u32 max_level; u32 regs[4]; const struct cpuid_bit *cb; - static const struct cpuid_bit cpuid_bits[] = { - { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 }, - { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 }, - { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 }, - { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, - { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, - { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, - { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, - { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, - { 0, 0, 0, 0, 0 } - }; - for (cb = cpuid_bits; cb->feature; cb++) { /* Verify that the level is valid */ @@ -51,3 +52,27 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) set_cpu_cap(c, cb->feature); } } + +u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf, + enum cpuid_regs_idx reg) +{ + const struct cpuid_bit *cb; + u32 cpuid_val = 0; + + for (cb = cpuid_bits; cb->feature; cb++) { + + if (level > cb->level) + continue; + + if (level < cb->level) + break; + + if (reg == cb->reg && sub_leaf == cb->sub_leaf) { + if (cpu_has(&boot_cpu_data, cb->feature)) + cpuid_val |= BIT(cb->bit); + } + } + + return cpuid_val; +} +EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf); -- 2.7.4 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [tip:x86/cpufeature] x86/cpuid: Provide get_scattered_cpuid_leaf() 2016-11-11 9:25 ` [PATCH v6 2/3] x86/cpuid: Add a helper in scattered.c to return cpuid He Chen @ 2016-11-16 10:19 ` tip-bot for He Chen 0 siblings, 0 replies; 18+ messages in thread From: tip-bot for He Chen @ 2016-11-16 10:19 UTC (permalink / raw) To: linux-tip-commits Cc: pbonzini, linux-kernel, tglx, bp, rkrcmar, mingo, hpa, luwei.kang, he.chen, Piotr.Luc, bp Commit-ID: 47bdf3378d62a627cfb8a54e1180c08d67078b61 Gitweb: http://git.kernel.org/tip/47bdf3378d62a627cfb8a54e1180c08d67078b61 Author: He Chen <he.chen@linux.intel.com> AuthorDate: Fri, 11 Nov 2016 17:25:35 +0800 Committer: Thomas Gleixner <tglx@linutronix.de> CommitDate: Wed, 16 Nov 2016 11:13:09 +0100 x86/cpuid: Provide get_scattered_cpuid_leaf() Sparse populated CPUID leafs are collected in a software provided leaf to avoid bloat of the x86_capability array, but there is no way to rebuild the real leafs (e.g. for KVM CPUID enumeration) other than rereading the CPUID leaf from the CPU. While this is possible it is problematic as it does not take software disabled features into account. If a feature is disabled on the host it should not be exposed to a guest either. Add get_scattered_cpuid_leaf() which rebuilds the leaf from the scattered cpuid table information and the active CPU features. [ tglx: Rewrote changelog ] Signed-off-by: He Chen <he.chen@linux.intel.com> Reviewed-by: Borislav Petkov <bp@suse.de> Cc: Luwei Kang <luwei.kang@intel.com> Cc: kvm@vger.kernel.org Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Piotr Luc <Piotr.Luc@intel.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Link: http://lkml.kernel.org/r/1478856336-9388-3-git-send-email-he.chen@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- arch/x86/include/asm/processor.h | 3 +++ arch/x86/kernel/cpu/scattered.c | 49 ++++++++++++++++++++++++++++++---------- 2 files changed, 40 insertions(+), 12 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 8f6ac5b..e7f8c62 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -189,6 +189,9 @@ extern void identify_secondary_cpu(struct cpuinfo_x86 *); extern void print_cpu_info(struct cpuinfo_x86 *); void print_cpu_msr(struct cpuinfo_x86 *); extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c); +extern u32 get_scattered_cpuid_leaf(unsigned int level, + unsigned int sub_leaf, + enum cpuid_regs_idx reg); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); extern void init_amd_cacheinfo(struct cpuinfo_x86 *c); diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index dbb470e..d1316f9 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -17,24 +17,25 @@ struct cpuid_bit { u32 sub_leaf; }; +/* Please keep the leaf sorted by cpuid_bit.level for faster search. */ +static const struct cpuid_bit cpuid_bits[] = { + { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, + { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, + { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 }, + { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 }, + { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, + { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, + { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, + { 0, 0, 0, 0, 0 } +}; + void init_scattered_cpuid_features(struct cpuinfo_x86 *c) { u32 max_level; u32 regs[4]; const struct cpuid_bit *cb; - static const struct cpuid_bit cpuid_bits[] = { - { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 }, - { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 }, - { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 }, - { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, - { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, - { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, - { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, - { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, - { 0, 0, 0, 0, 0 } - }; - for (cb = cpuid_bits; cb->feature; cb++) { /* Verify that the level is valid */ @@ -51,3 +52,27 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) set_cpu_cap(c, cb->feature); } } + +u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf, + enum cpuid_regs_idx reg) +{ + const struct cpuid_bit *cb; + u32 cpuid_val = 0; + + for (cb = cpuid_bits; cb->feature; cb++) { + + if (level > cb->level) + continue; + + if (level < cb->level) + break; + + if (reg == cb->reg && sub_leaf == cb->sub_leaf) { + if (cpu_has(&boot_cpu_data, cb->feature)) + cpuid_val |= BIT(cb->bit); + } + } + + return cpuid_val; +} +EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf); ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-11 9:25 [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest He Chen 2016-11-11 9:25 ` [PATCH v6 1/3] x86/cpuid: Cleanup cpuid_regs definitions He Chen 2016-11-11 9:25 ` [PATCH v6 2/3] x86/cpuid: Add a helper in scattered.c to return cpuid He Chen @ 2016-11-11 9:25 ` He Chen 2016-11-12 12:53 ` Borislav Petkov 2016-11-16 10:16 ` [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest Thomas Gleixner 3 siblings, 1 reply; 18+ messages in thread From: He Chen @ 2016-11-11 9:25 UTC (permalink / raw) To: kvm Cc: linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc, Borislav Petkov Add two new AVX512 subfeatures support for KVM guest. AVX512_4VNNIW: Vector instructions for deep learning enhanced word variable precision. AVX512_4FMAPS: Vector instructions for deep learning floating-point single precision. Reviewed-by: Borislav Petkov <bp@suse.de> Signed-off-by: Luwei Kang <luwei.kang@intel.com> Signed-off-by: He Chen <he.chen@linux.intel.com> --- arch/x86/kvm/cpuid.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index afa7bbb..ddcdf7c 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -16,6 +16,7 @@ #include <linux/export.h> #include <linux/vmalloc.h> #include <linux/uaccess.h> +#include <asm/processor.h> #include <asm/fpu/internal.h> /* For use_eager_fpu. Ugh! */ #include <asm/user.h> #include <asm/fpu/xstate.h> @@ -65,6 +66,11 @@ u64 kvm_supported_xcr0(void) #define F(x) bit(X86_FEATURE_##x) +/* These are scattered features in cpufeatures.h. */ +#define KVM_CPUID_BIT_AVX512_4VNNIW 2 +#define KVM_CPUID_BIT_AVX512_4FMAPS 3 +#define KF(x) bit(KVM_CPUID_BIT_##x) + int kvm_update_cpuid(struct kvm_vcpu *vcpu) { struct kvm_cpuid_entry2 *best; @@ -376,6 +382,10 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, /* cpuid 7.0.ecx*/ const u32 kvm_cpuid_7_0_ecx_x86_features = F(PKU) | 0 /*OSPKE*/; + /* cpuid 7.0.edx*/ + const u32 kvm_cpuid_7_0_edx_x86_features = + KF(AVX512_4VNNIW) | KF(AVX512_4FMAPS); + /* all calls to cpuid_count() should be made on the same cpu */ get_cpu(); @@ -458,12 +468,14 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, /* PKU is not yet implemented for shadow paging. */ if (!tdp_enabled) entry->ecx &= ~F(PKU); + entry->edx &= kvm_cpuid_7_0_edx_x86_features; + entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); } else { entry->ebx = 0; entry->ecx = 0; + entry->edx = 0; } entry->eax = 0; - entry->edx = 0; break; } case 9: -- 2.7.4 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-11 9:25 ` [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support He Chen @ 2016-11-12 12:53 ` Borislav Petkov 2016-11-14 1:41 ` He Chen 0 siblings, 1 reply; 18+ messages in thread From: Borislav Petkov @ 2016-11-12 12:53 UTC (permalink / raw) To: He Chen Cc: kvm, linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc On Fri, Nov 11, 2016 at 05:25:36PM +0800, He Chen wrote: > Add two new AVX512 subfeatures support for KVM guest. > > AVX512_4VNNIW: > Vector instructions for deep learning enhanced word variable precision. > > AVX512_4FMAPS: > Vector instructions for deep learning floating-point single precision. > > Reviewed-by: Borislav Petkov <bp@suse.de> > Signed-off-by: Luwei Kang <luwei.kang@intel.com> > Signed-off-by: He Chen <he.chen@linux.intel.com> > --- Whoops, I said it looked ok but missed that SOB chain above. What does it mean? Did Luwei wrote the patch and you're sending it or ...? -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply. ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-12 12:53 ` Borislav Petkov @ 2016-11-14 1:41 ` He Chen 2016-11-14 5:58 ` Borislav Petkov 0 siblings, 1 reply; 18+ messages in thread From: He Chen @ 2016-11-14 1:41 UTC (permalink / raw) To: Borislav Petkov Cc: kvm, linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc On Sat, Nov 12, 2016 at 01:53:29PM +0100, Borislav Petkov wrote: > On Fri, Nov 11, 2016 at 05:25:36PM +0800, He Chen wrote: > > Add two new AVX512 subfeatures support for KVM guest. > > > > AVX512_4VNNIW: > > Vector instructions for deep learning enhanced word variable precision. > > > > AVX512_4FMAPS: > > Vector instructions for deep learning floating-point single precision. > > > > Reviewed-by: Borislav Petkov <bp@suse.de> > > Signed-off-by: Luwei Kang <luwei.kang@intel.com> > > Signed-off-by: He Chen <he.chen@linux.intel.com> > > --- > > Whoops, I said it looked ok but missed that SOB chain above. > > What does it mean? Did Luwei wrote the patch and you're sending it or > ...? > Yep, Luwei wrote it and I send it on behalf of him. Thanks, -He ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-14 1:41 ` He Chen @ 2016-11-14 5:58 ` Borislav Petkov 2016-11-14 8:45 ` [Patch v6.1] " He Chen 2016-11-14 8:52 ` [PATCH v6 3/3] " He Chen 0 siblings, 2 replies; 18+ messages in thread From: Borislav Petkov @ 2016-11-14 5:58 UTC (permalink / raw) To: He Chen Cc: kvm, linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc On Mon, Nov 14, 2016 at 09:41:04AM +0800, He Chen wrote: > Yep, Luwei wrote it and I send it on behalf of him. Then it needs to have the following format so that tools can pick up the proper author: "From: Luwei ... <commit message text> Signed-off-by: He Chen... Signed-off-by: Luwei... ... " git format-patch gives that formatting. If you want to change the ownership, do the following on the local commit: $ git commit --amend --author="Luwei Kang <luwei.kang@intel.com>" in case it lists you locally as author. HTH. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply. ^ permalink raw reply [flat|nested] 18+ messages in thread
* [Patch v6.1] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-14 5:58 ` Borislav Petkov @ 2016-11-14 8:45 ` He Chen 2016-11-14 20:24 ` kbuild test robot 2016-11-16 21:24 ` Radim Krčmář 2016-11-14 8:52 ` [PATCH v6 3/3] " He Chen 1 sibling, 2 replies; 18+ messages in thread From: He Chen @ 2016-11-14 8:45 UTC (permalink / raw) To: Borislav Petkov Cc: kvm, linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc >From 2daa60b3c6ab5aa6414ebb33119a34403dad2048 Mon Sep 17 00:00:00 2001 From: Luwei Kang <luwei.kang@intel.com> Date: Mon, 7 Nov 2016 14:03:20 +0800 Subject: [Patch v6.1] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support Add two new AVX512 subfeatures support for KVM guest. AVX512_4VNNIW: Vector instructions for deep learning enhanced word variable precision. AVX512_4FMAPS: Vector instructions for deep learning floating-point single precision. Reviewed-by: Borislav Petkov <bp@suse.de> Signed-off-by: He Chen <he.chen@linux.intel.com> Signed-off-by: Luwei Kang <luwei.kang@intel.com> --- arch/x86/kvm/cpuid.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index afa7bbb..ddcdf7c 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -16,6 +16,7 @@ #include <linux/export.h> #include <linux/vmalloc.h> #include <linux/uaccess.h> +#include <asm/processor.h> #include <asm/fpu/internal.h> /* For use_eager_fpu. Ugh! */ #include <asm/user.h> #include <asm/fpu/xstate.h> @@ -65,6 +66,11 @@ u64 kvm_supported_xcr0(void) #define F(x) bit(X86_FEATURE_##x) +/* These are scattered features in cpufeatures.h. */ +#define KVM_CPUID_BIT_AVX512_4VNNIW 2 +#define KVM_CPUID_BIT_AVX512_4FMAPS 3 +#define KF(x) bit(KVM_CPUID_BIT_##x) + int kvm_update_cpuid(struct kvm_vcpu *vcpu) { struct kvm_cpuid_entry2 *best; @@ -376,6 +382,10 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, /* cpuid 7.0.ecx*/ const u32 kvm_cpuid_7_0_ecx_x86_features = F(PKU) | 0 /*OSPKE*/; + /* cpuid 7.0.edx*/ + const u32 kvm_cpuid_7_0_edx_x86_features = + KF(AVX512_4VNNIW) | KF(AVX512_4FMAPS); + /* all calls to cpuid_count() should be made on the same cpu */ get_cpu(); @@ -458,12 +468,14 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, /* PKU is not yet implemented for shadow paging. */ if (!tdp_enabled) entry->ecx &= ~F(PKU); + entry->edx &= kvm_cpuid_7_0_edx_x86_features; + entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); } else { entry->ebx = 0; entry->ecx = 0; + entry->edx = 0; } entry->eax = 0; - entry->edx = 0; break; } case 9: -- 2.7.4 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [Patch v6.1] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-14 8:45 ` [Patch v6.1] " He Chen @ 2016-11-14 20:24 ` kbuild test robot 2016-11-15 6:02 ` He Chen 2016-11-16 21:24 ` Radim Krčmář 1 sibling, 1 reply; 18+ messages in thread From: kbuild test robot @ 2016-11-14 20:24 UTC (permalink / raw) To: He Chen Cc: kbuild-all, Borislav Petkov, kvm, linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc [-- Attachment #1: Type: text/plain, Size: 1961 bytes --] Hi He, [auto build test ERROR on kvm/linux-next] [also build test ERROR on v4.9-rc5] [cannot apply to next-20161114] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/He-Chen/x86-kvm-Add-AVX512_4VNNIW-and-AVX512_4FMAPS-support/20161114-170941 base: https://git.kernel.org/pub/scm/virt/kvm/kvm.git linux-next config: x86_64-kexec (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): arch/x86/kvm/cpuid.c: In function '__do_cpuid_ent': >> arch/x86/kvm/cpuid.c:472:18: error: implicit declaration of function 'get_scattered_cpuid_leaf' [-Werror=implicit-function-declaration] entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); ^~~~~~~~~~~~~~~~~~~~~~~~ >> arch/x86/kvm/cpuid.c:472:49: error: 'CPUID_EDX' undeclared (first use in this function) entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); ^~~~~~~~~ arch/x86/kvm/cpuid.c:472:49: note: each undeclared identifier is reported only once for each function it appears in cc1: some warnings being treated as errors vim +/get_scattered_cpuid_leaf +472 arch/x86/kvm/cpuid.c 466 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features; 467 cpuid_mask(&entry->ecx, CPUID_7_ECX); 468 /* PKU is not yet implemented for shadow paging. */ 469 if (!tdp_enabled) 470 entry->ecx &= ~F(PKU); 471 entry->edx &= kvm_cpuid_7_0_edx_x86_features; > 472 entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); 473 } else { 474 entry->ebx = 0; 475 entry->ecx = 0; --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 24231 bytes --] ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Patch v6.1] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-14 20:24 ` kbuild test robot @ 2016-11-15 6:02 ` He Chen 2016-11-15 6:45 ` [kbuild-all] " Fengguang Wu 2016-11-21 3:09 ` Ye Xiaolong 0 siblings, 2 replies; 18+ messages in thread From: He Chen @ 2016-11-15 6:02 UTC (permalink / raw) To: kbuild test robot Cc: kbuild-all, Borislav Petkov, kvm, linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc On Tue, Nov 15, 2016 at 04:24:39AM +0800, kbuild test robot wrote: > Hi He, > > [auto build test ERROR on kvm/linux-next] > [also build test ERROR on v4.9-rc5] > [cannot apply to next-20161114] > [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] > > url: https://github.com/0day-ci/linux/commits/He-Chen/x86-kvm-Add-AVX512_4VNNIW-and-AVX512_4FMAPS-support/20161114-170941 > base: https://git.kernel.org/pub/scm/virt/kvm/kvm.git linux-next > config: x86_64-kexec (attached as .config) > compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 > reproduce: > # save the attached .config to linux build tree > make ARCH=x86_64 > > All errors (new ones prefixed by >>): > > arch/x86/kvm/cpuid.c: In function '__do_cpuid_ent': > >> arch/x86/kvm/cpuid.c:472:18: error: implicit declaration of function 'get_scattered_cpuid_leaf' [-Werror=implicit-function-declaration] > entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); > ^~~~~~~~~~~~~~~~~~~~~~~~ > >> arch/x86/kvm/cpuid.c:472:49: error: 'CPUID_EDX' undeclared (first use in this function) > entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); > ^~~~~~~~~ > arch/x86/kvm/cpuid.c:472:49: note: each undeclared identifier is reported only once for each function it appears in > cc1: some warnings being treated as errors > I have downloaded .config.gz in attachment and use the .config in it to build kernel in my local branch again, and I don't see any warn or error message. I wonder whether the previous 0001 and 0002 patches have applied to run this test? Or is there something wrong with my compiler or patches? Thanks, -He ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [kbuild-all] [Patch v6.1] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-15 6:02 ` He Chen @ 2016-11-15 6:45 ` Fengguang Wu 2016-11-21 3:09 ` Ye Xiaolong 1 sibling, 0 replies; 18+ messages in thread From: Fengguang Wu @ 2016-11-15 6:45 UTC (permalink / raw) To: He Chen Cc: Luwei Kang, kvm, Radim Krčmář, x86, linux-kernel, Piotr Luc, Ingo Molnar, Borislav Petkov, kbuild-all, H . Peter Anvin, Paolo Bonzini, Thomas Gleixner, Ye Xiaolong Hi He Chen, On Tue, Nov 15, 2016 at 02:02:23PM +0800, He Chen wrote: >On Tue, Nov 15, 2016 at 04:24:39AM +0800, kbuild test robot wrote: >> Hi He, >> >> [auto build test ERROR on kvm/linux-next] >> [also build test ERROR on v4.9-rc5] >> [cannot apply to next-20161114] >> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] >> >> url: https://github.com/0day-ci/linux/commits/He-Chen/x86-kvm-Add-AVX512_4VNNIW-and-AVX512_4FMAPS-support/20161114-170941 >> base: https://git.kernel.org/pub/scm/virt/kvm/kvm.git linux-next >I have downloaded .config.gz in attachment and use the .config in it >to build kernel in my local branch again, and I don't see any warn or >error message. > >I wonder whether the previous 0001 and 0002 patches have applied to run >this test? Or is there something wrong with my compiler or patches? Sorry the robot is not smart enough to see the 0001/0002 patches. As you may see from the above url, only this patch is applied on top of the KVM linux-next branch. Thanks, Fengguang ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [kbuild-all] [Patch v6.1] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-15 6:02 ` He Chen 2016-11-15 6:45 ` [kbuild-all] " Fengguang Wu @ 2016-11-21 3:09 ` Ye Xiaolong 1 sibling, 0 replies; 18+ messages in thread From: Ye Xiaolong @ 2016-11-21 3:09 UTC (permalink / raw) To: He Chen Cc: kbuild test robot, Luwei Kang, kvm, Radim Krčmář, x86, linux-kernel, Piotr Luc, Ingo Molnar, Borislav Petkov, kbuild-all, H . Peter Anvin, Paolo Bonzini, Thomas Gleixner On 11/15, He Chen wrote: >On Tue, Nov 15, 2016 at 04:24:39AM +0800, kbuild test robot wrote: >> Hi He, >> >> [auto build test ERROR on kvm/linux-next] >> [also build test ERROR on v4.9-rc5] >> [cannot apply to next-20161114] >> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] >> >> url: https://github.com/0day-ci/linux/commits/He-Chen/x86-kvm-Add-AVX512_4VNNIW-and-AVX512_4FMAPS-support/20161114-170941 >> base: https://git.kernel.org/pub/scm/virt/kvm/kvm.git linux-next >> config: x86_64-kexec (attached as .config) >> compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 >> reproduce: >> # save the attached .config to linux build tree >> make ARCH=x86_64 >> >> All errors (new ones prefixed by >>): >> >> arch/x86/kvm/cpuid.c: In function '__do_cpuid_ent': >> >> arch/x86/kvm/cpuid.c:472:18: error: implicit declaration of function 'get_scattered_cpuid_leaf' [-Werror=implicit-function-declaration] >> entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); >> ^~~~~~~~~~~~~~~~~~~~~~~~ >> >> arch/x86/kvm/cpuid.c:472:49: error: 'CPUID_EDX' undeclared (first use in this function) >> entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); >> ^~~~~~~~~ >> arch/x86/kvm/cpuid.c:472:49: note: each undeclared identifier is reported only once for each function it appears in >> cc1: some warnings being treated as errors >> >I have downloaded .config.gz in attachment and use the .config in it >to build kernel in my local branch again, and I don't see any warn or >error message. > >I wonder whether the previous 0001 and 0002 patches have applied to run >this test? Or is there something wrong with my compiler or patches? Hi, He 0day robot has't applied previous 0001 and 0002 patches in this case for it considered this patch as an individual one. Please ignore this warning. Btw: You could try use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on. Thanks, Xiaolong > >Thanks, >-He >_______________________________________________ >kbuild-all mailing list >kbuild-all@lists.01.org >https://lists.01.org/mailman/listinfo/kbuild-all ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Patch v6.1] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-14 8:45 ` [Patch v6.1] " He Chen 2016-11-14 20:24 ` kbuild test robot @ 2016-11-16 21:24 ` Radim Krčmář 1 sibling, 0 replies; 18+ messages in thread From: Radim Krčmář @ 2016-11-16 21:24 UTC (permalink / raw) To: He Chen Cc: Borislav Petkov, kvm, linux-kernel, x86, Paolo Bonzini, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc 2016-11-14 16:45+0800, He Chen: > From 2daa60b3c6ab5aa6414ebb33119a34403dad2048 Mon Sep 17 00:00:00 2001 > From: Luwei Kang <luwei.kang@intel.com> > Date: Mon, 7 Nov 2016 14:03:20 +0800 > Subject: [Patch v6.1] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support > > Add two new AVX512 subfeatures support for KVM guest. > > AVX512_4VNNIW: > Vector instructions for deep learning enhanced word variable precision. > > AVX512_4FMAPS: > Vector instructions for deep learning floating-point single precision. > > Reviewed-by: Borislav Petkov <bp@suse.de> > Signed-off-by: He Chen <he.chen@linux.intel.com> > Signed-off-by: Luwei Kang <luwei.kang@intel.com> > --- I changed the subject tags to 'kvm: x86:' and applied to kvm/queue, thanks. ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support 2016-11-14 5:58 ` Borislav Petkov 2016-11-14 8:45 ` [Patch v6.1] " He Chen @ 2016-11-14 8:52 ` He Chen 1 sibling, 0 replies; 18+ messages in thread From: He Chen @ 2016-11-14 8:52 UTC (permalink / raw) To: Borislav Petkov Cc: kvm, linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Thomas Gleixner, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc On Mon, Nov 14, 2016 at 06:58:22AM +0100, Borislav Petkov wrote: > On Mon, Nov 14, 2016 at 09:41:04AM +0800, He Chen wrote: > > Yep, Luwei wrote it and I send it on behalf of him. > > Then it needs to have the following format so that tools can pick up the > proper author: > > "From: Luwei ... > > <commit message text> > > Signed-off-by: He Chen... > Signed-off-by: Luwei... > ... > " > > git format-patch gives that formatting. > > If you want to change the ownership, do the following on the local > commit: > > $ git commit --amend --author="Luwei Kang <luwei.kang@intel.com>" > > in case it lists you locally as author. > > HTH. > I am not sure if it is ok to reply this amended patch in this thread. or should I send another [Patch v6.1] patchset? Thanks, -He ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest 2016-11-11 9:25 [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest He Chen ` (2 preceding siblings ...) 2016-11-11 9:25 ` [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support He Chen @ 2016-11-16 10:16 ` Thomas Gleixner 2016-11-16 21:14 ` Radim Krčmář 3 siblings, 1 reply; 18+ messages in thread From: Thomas Gleixner @ 2016-11-16 10:16 UTC (permalink / raw) To: He Chen Cc: kvm, linux-kernel, x86, Paolo Bonzini, Radim Krčmář, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc, Borislav Petkov On Fri, 11 Nov 2016, He Chen wrote: > This patch series is going to add two new AVX512 features to KVM guest. > Since these two features are defined as scattered features in kernel, > some extra modification in kernel is included. I merged the first two patches into git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/cpufeatures Paolo, feel free to pull that branch up to commit 47bdf3378d62 into kvm so you can apply the KVM patch on top. Thanks, tglx ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest 2016-11-16 10:16 ` [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest Thomas Gleixner @ 2016-11-16 21:14 ` Radim Krčmář 0 siblings, 0 replies; 18+ messages in thread From: Radim Krčmář @ 2016-11-16 21:14 UTC (permalink / raw) To: Thomas Gleixner Cc: He Chen, kvm, linux-kernel, x86, Paolo Bonzini, Ingo Molnar, H . Peter Anvin, Luwei Kang, Piotr Luc, Borislav Petkov 2016-11-16 11:16+0100, Thomas Gleixner: > On Fri, 11 Nov 2016, He Chen wrote: > >> This patch series is going to add two new AVX512 features to KVM guest. >> Since these two features are defined as scattered features in kernel, >> some extra modification in kernel is included. > > I merged the first two patches into > > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/cpufeatures > > Paolo, feel free to pull that branch up to commit 47bdf3378d62 into kvm so > you can apply the KVM patch on top. Pulled into kvm/next, thanks. ^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2016-11-21 3:10 UTC | newest] Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-11-11 9:25 [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest He Chen 2016-11-11 9:25 ` [PATCH v6 1/3] x86/cpuid: Cleanup cpuid_regs definitions He Chen 2016-11-16 10:19 ` [tip:x86/cpufeature] " tip-bot for He Chen 2016-11-11 9:25 ` [PATCH v6 2/3] x86/cpuid: Add a helper in scattered.c to return cpuid He Chen 2016-11-16 10:19 ` [tip:x86/cpufeature] x86/cpuid: Provide get_scattered_cpuid_leaf() tip-bot for He Chen 2016-11-11 9:25 ` [PATCH v6 3/3] x86/kvm: Add AVX512_4VNNIW and AVX512_4FMAPS support He Chen 2016-11-12 12:53 ` Borislav Petkov 2016-11-14 1:41 ` He Chen 2016-11-14 5:58 ` Borislav Petkov 2016-11-14 8:45 ` [Patch v6.1] " He Chen 2016-11-14 20:24 ` kbuild test robot 2016-11-15 6:02 ` He Chen 2016-11-15 6:45 ` [kbuild-all] " Fengguang Wu 2016-11-21 3:09 ` Ye Xiaolong 2016-11-16 21:24 ` Radim Krčmář 2016-11-14 8:52 ` [PATCH v6 3/3] " He Chen 2016-11-16 10:16 ` [PATCH v6 0/3] x86/kvm: Support AVX512_4VNNIW and AVX512_4FMAPS for KVM guest Thomas Gleixner 2016-11-16 21:14 ` Radim Krčmář
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