* [PATCH v10 0/2] the fixup for the USB HOST1 at rk3288 platform @ 2016-12-11 15:36 Randy Li 2016-12-11 15:36 ` [PATCH v10 1/2] usb: dwc2: assert phy reset when waking up in " Randy Li 2016-12-11 15:36 ` [PATCH v10 2/2] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 0 siblings, 2 replies; 4+ messages in thread From: Randy Li @ 2016-12-11 15:36 UTC (permalink / raw) To: linux-usb Cc: John.Youn, kishon, felipe.balbi, mark.rutland, devicetree, heiko, gregkh, linux-kernel, robh+dt, randy.li, Randy Li changelog: v10 minior fixup v9 use a work_queue to reset usb phy to prevent access mutex lock at interrupter runtime. v8 minior fixup v7 add the forgot dummy phy_reset() for the generic phy is disabled. v7 Some minor fixup v6 Send the last two patches v5 A few modification at style, add the missing doc in the last commit. v4 1. Adding the reset callback in struct phy_ops. 2. Moving the reset into phy rockchip usb. 3. Trying to call a reset when dwc2 wakeup in rk3288. v3 Rebased from previous commit v2 Rebased from previous commit v1 orignal from google Randy Li (2): usb: dwc2: assert phy reset when waking up in rk3288 platform ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset arch/arm/boot/dts/rk3288.dtsi | 4 ++++ drivers/usb/dwc2/core.h | 1 + drivers/usb/dwc2/core_intr.c | 11 +++++++++++ drivers/usb/dwc2/platform.c | 9 +++++++++ 4 files changed, 25 insertions(+) -- 2.7.4 ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v10 1/2] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-12-11 15:36 [PATCH v10 0/2] the fixup for the USB HOST1 at rk3288 platform Randy Li @ 2016-12-11 15:36 ` Randy Li 2017-03-04 2:56 ` ayaka 2016-12-11 15:36 ` [PATCH v10 2/2] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 1 sibling, 1 reply; 4+ messages in thread From: Randy Li @ 2016-12-11 15:36 UTC (permalink / raw) To: linux-usb Cc: John.Youn, kishon, felipe.balbi, mark.rutland, devicetree, heiko, gregkh, linux-kernel, robh+dt, randy.li, Randy Li On the rk3288 USB host-only port (the one that's not the OTG-enabled port) the PHY can get into a bad state when a wakeup is asserted (not just a wakeup from full system suspend but also a wakeup from autosuspend). We can get the PHY out of its bad state by asserting its "port reset", but unfortunately that seems to assert a reset onto the USB bus so it could confuse things if we don't actually deenumerate / reenumerate the device. We can also get the PHY out of its bad state by fully resetting it using the reset from the CRU (clock reset unit) in chip, which does a more full reset. The CRU-based reset appears to actually cause devices on the bus to be removed and reinserted, which fixes the problem (albeit in a hacky way). It's unfortunate that we need to do a full re-enumeration of devices at wakeup time, but this is better than alternative of letting the bus get wedged. Signed-off-by: Randy Li <ayaka@soulik.info> Acked-by: John Youn <johnyoun@synopsys.com> --- drivers/usb/dwc2/core.h | 1 + drivers/usb/dwc2/core_intr.c | 11 +++++++++++ drivers/usb/dwc2/platform.c | 9 +++++++++ 3 files changed, 21 insertions(+) diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 9548d3e..0cd5896 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -919,6 +919,7 @@ struct dwc2_hsotg { unsigned int ll_hw_enabled:1; struct phy *phy; + struct work_struct phy_rst_work; struct usb_phy *uphy; struct dwc2_hsotg_plat *plat; struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)]; diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c index 5b228ba..bf1c029 100644 --- a/drivers/usb/dwc2/core_intr.c +++ b/drivers/usb/dwc2/core_intr.c @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) { int ret; + struct device_node *np = hsotg->dev->of_node; /* Clear interrupt */ dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS); @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) /* Restart the Phy Clock */ pcgcctl &= ~PCGCTL_STOPPCLK; dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); + + /* + * It is a quirk in Rockchip RK3288, causing by + * a hardware bug. This will propagate out and + * eventually we'll re-enumerate the device. + * Not great but the best we can do. + */ + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) + schedule_work(&hsotg->phy_rst_work); + mod_timer(&hsotg->wkp_timer, jiffies + msecs_to_jiffies(71)); } else { diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c index 4fc8c60..8ef278e 100644 --- a/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c @@ -207,6 +207,14 @@ int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) return ret; } +/* Only used to reset usb phy at interrupter runtime */ +static void dwc2_reset_phy_work(struct work_struct *data) +{ + struct dwc2_hsotg *hsotg = container_of(data, struct dwc2_hsotg, + phy_rst_work); + phy_reset(hsotg->phy); +} + static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) { int i, ret; @@ -251,6 +259,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) return ret; } } + INIT_WORK(&hsotg->phy_rst_work, dwc2_reset_phy_work); if (!hsotg->phy) { hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); -- 2.7.4 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v10 1/2] usb: dwc2: assert phy reset when waking up in rk3288 platform 2016-12-11 15:36 ` [PATCH v10 1/2] usb: dwc2: assert phy reset when waking up in " Randy Li @ 2017-03-04 2:56 ` ayaka 0 siblings, 0 replies; 4+ messages in thread From: ayaka @ 2017-03-04 2:56 UTC (permalink / raw) To: linux-usb Cc: John.Youn, kishon, felipe.balbi, mark.rutland, devicetree, heiko, gregkh, linux-kernel, robh+dt, randy.li What is wrong with this patch? I have not seen it is merged in next-20170303. On 12/11/2016 11:36 PM, Randy Li wrote: > On the rk3288 USB host-only port (the one that's not the OTG-enabled > port) the PHY can get into a bad state when a wakeup is asserted (not > just a wakeup from full system suspend but also a wakeup from > autosuspend). > > We can get the PHY out of its bad state by asserting its "port reset", > but unfortunately that seems to assert a reset onto the USB bus so it > could confuse things if we don't actually deenumerate / reenumerate the > device. > > We can also get the PHY out of its bad state by fully resetting it using > the reset from the CRU (clock reset unit) in chip, which does a more full > reset. The CRU-based reset appears to actually cause devices on the bus > to be removed and reinserted, which fixes the problem (albeit in a hacky > way). > > It's unfortunate that we need to do a full re-enumeration of devices at > wakeup time, but this is better than alternative of letting the bus get > wedged. > > Signed-off-by: Randy Li <ayaka@soulik.info> > Acked-by: John Youn <johnyoun@synopsys.com> > --- > drivers/usb/dwc2/core.h | 1 + > drivers/usb/dwc2/core_intr.c | 11 +++++++++++ > drivers/usb/dwc2/platform.c | 9 +++++++++ > 3 files changed, 21 insertions(+) > > diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h > index 9548d3e..0cd5896 100644 > --- a/drivers/usb/dwc2/core.h > +++ b/drivers/usb/dwc2/core.h > @@ -919,6 +919,7 @@ struct dwc2_hsotg { > unsigned int ll_hw_enabled:1; > > struct phy *phy; > + struct work_struct phy_rst_work; > struct usb_phy *uphy; > struct dwc2_hsotg_plat *plat; > struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)]; > diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c > index 5b228ba..bf1c029 100644 > --- a/drivers/usb/dwc2/core_intr.c > +++ b/drivers/usb/dwc2/core_intr.c > @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg) > static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) > { > int ret; > + struct device_node *np = hsotg->dev->of_node; > > /* Clear interrupt */ > dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS); > @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg) > /* Restart the Phy Clock */ > pcgcctl &= ~PCGCTL_STOPPCLK; > dwc2_writel(pcgcctl, hsotg->regs + PCGCTL); > + > + /* > + * It is a quirk in Rockchip RK3288, causing by > + * a hardware bug. This will propagate out and > + * eventually we'll re-enumerate the device. > + * Not great but the best we can do. > + */ > + if (of_device_is_compatible(np, "rockchip,rk3288-usb")) > + schedule_work(&hsotg->phy_rst_work); > + > mod_timer(&hsotg->wkp_timer, > jiffies + msecs_to_jiffies(71)); > } else { > diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c > index 4fc8c60..8ef278e 100644 > --- a/drivers/usb/dwc2/platform.c > +++ b/drivers/usb/dwc2/platform.c > @@ -207,6 +207,14 @@ int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) > return ret; > } > > +/* Only used to reset usb phy at interrupter runtime */ > +static void dwc2_reset_phy_work(struct work_struct *data) > +{ > + struct dwc2_hsotg *hsotg = container_of(data, struct dwc2_hsotg, > + phy_rst_work); > + phy_reset(hsotg->phy); > +} > + > static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) > { > int i, ret; > @@ -251,6 +259,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) > return ret; > } > } > + INIT_WORK(&hsotg->phy_rst_work, dwc2_reset_phy_work); > > if (!hsotg->phy) { > hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v10 2/2] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset 2016-12-11 15:36 [PATCH v10 0/2] the fixup for the USB HOST1 at rk3288 platform Randy Li 2016-12-11 15:36 ` [PATCH v10 1/2] usb: dwc2: assert phy reset when waking up in " Randy Li @ 2016-12-11 15:36 ` Randy Li 1 sibling, 0 replies; 4+ messages in thread From: Randy Li @ 2016-12-11 15:36 UTC (permalink / raw) To: linux-usb Cc: John.Youn, kishon, felipe.balbi, mark.rutland, devicetree, heiko, gregkh, linux-kernel, robh+dt, randy.li, Randy Li The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288 has a hardware errata that causes everything to get confused when we get a remote wakeup. We'll use the reset that's in the CRU to reset the port when it's in a bad state. Note that we add the reset to both dwc2 controllers even though only one has the errata in case we find some other use for this reset that's unrelated to the current hardware errata. Only the host port gets the quirk property, though. Signed-off-by: Randy Li <ayaka@soulik.info> --- arch/arm/boot/dts/rk3288.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 4fad133..c779365 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -858,6 +858,8 @@ clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBOTG_PHY>; + reset-names = "phy-reset"; }; usbphy1: usb-phy@334 { @@ -874,6 +876,8 @@ clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBHOST1_PHY>; + reset-names = "phy-reset"; }; }; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-03-04 3:10 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-12-11 15:36 [PATCH v10 0/2] the fixup for the USB HOST1 at rk3288 platform Randy Li 2016-12-11 15:36 ` [PATCH v10 1/2] usb: dwc2: assert phy reset when waking up in " Randy Li 2017-03-04 2:56 ` ayaka 2016-12-11 15:36 ` [PATCH v10 2/2] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li
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