From: Xing Zheng <zhengxing@rock-chips.com>
To: linux-rockchip@lists.infradead.org
Cc: dianders@google.com, heiko@sntech.de,
Xing Zheng <zhengxing@rock-chips.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 2/3] clk: rockchip: rk3399: export 480M_SRC clocks id for usbphy0/usbphy1
Date: Wed, 14 Dec 2016 18:11:40 +0800 [thread overview]
Message-ID: <1481710301-1454-3-git-send-email-zhengxing@rock-chips.com> (raw)
In-Reply-To: <1481710301-1454-1-git-send-email-zhengxing@rock-chips.com>
This patch exports USBPHYx_480M_SRC clocks for usbphy.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3399.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 3490887..cf2af4c 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -411,9 +411,9 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
GATE(SCLK_USB2PHY1_REF, "clk_usb2phy1_ref", "xin24m", CLK_IGNORE_UNUSED,
RK3399_CLKGATE_CON(6), 6, GFLAGS),
- GATE(0, "clk_usbphy0_480m_src", "clk_usbphy0_480m", 0,
+ GATE(SCLK_USBPHY0_480M_SRC, "clk_usbphy0_480m_src", "clk_usbphy0_480m", 0,
RK3399_CLKGATE_CON(13), 12, GFLAGS),
- GATE(0, "clk_usbphy1_480m_src", "clk_usbphy1_480m", 0,
+ GATE(SCLK_USBPHY1_480M_SRC, "clk_usbphy1_480m_src", "clk_usbphy1_480m", 0,
RK3399_CLKGATE_CON(13), 12, GFLAGS),
MUX(0, "clk_usbphy_480m", mux_usbphy_480m_p, 0,
RK3399_CLKSEL_CON(14), 6, 1, MFLAGS),
--
2.7.4
next prev parent reply other threads:[~2016-12-14 10:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-14 10:11 [PATCH 0/3] Add and export clk-480m clocks for ehci and ohci on RK3399 Xing Zheng
2016-12-14 10:11 ` [PATCH 1/3] clk: rockchip: rk3399: add USBPHYx_480M_SRC clock IDs Xing Zheng
2016-12-15 0:27 ` Doug Anderson
2016-12-14 10:11 ` Xing Zheng [this message]
2016-12-15 0:28 ` [PATCH 2/3] clk: rockchip: rk3399: export 480M_SRC clocks id for usbphy0/usbphy1 Doug Anderson
2016-12-14 10:11 ` [PATCH 3/3] arm64: dts: rockchip: add clk-480m for ehci and ohci of rk3399 Xing Zheng
2016-12-15 0:10 ` Doug Anderson
2016-12-15 0:47 ` Brian Norris
2016-12-15 1:18 ` Brian Norris
2016-12-15 2:41 ` Xing Zheng
2016-12-15 3:20 ` Brian Norris
2016-12-15 6:41 ` Frank Wang
2016-12-15 16:34 ` Doug Anderson
2016-12-15 18:18 ` Heiko Stuebner
[not found] ` <5853903D.8030605@rock-chips.com>
2016-12-16 17:28 ` Doug Anderson
2016-12-21 10:44 ` Xing Zheng
2016-12-17 1:20 ` Heiko Stuebner
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