* [RFC PATCH 1/4] dt-bindings: mdm9615: Add ADM DMA engine
2016-12-22 20:05 [RFC PATCH 0/4] Enable NAND on Sierra Wireless WP8548 board Zoran Markovic
@ 2016-12-22 20:05 ` Zoran Markovic
2016-12-22 20:05 ` [RFC PATCH 2/4] clk: mdm9615: Add EBI2 clock Zoran Markovic
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Zoran Markovic @ 2016-12-22 20:05 UTC (permalink / raw)
To: linux-kernel
Cc: Zoran Markovic, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Russell King, linux-arm-msm, linux-soc, devicetree,
linux-arm-kernel
Add configuration for ADM DMA engine on MDM9615, used by the EBI2
NAND controller. This commit requires the ADM DMA patches from
Andy Gross:
https://lkml.org/lkml/2015/3/17/19
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Zoran Markovic <zmarkovic@sierrawireless.com>
---
arch/arm/boot/dts/qcom-mdm9615.dtsi | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi
index 5ae4ec5..fbc7d68 100644
--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
@@ -336,7 +336,24 @@
};
};
- sdcc1bam: dma@12182000{
+ adm_dma: dma@18300000 {
+ compatible = "qcom,adm";
+ reg = <0x18300000 0x100000>;
+ interrupts = <0 170 0>;
+ #dma-cells = <1>;
+
+ clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc ADM0_RESET>,
+ <&gcc ADM0_C0_RESET>,
+ <&gcc ADM0_C1_RESET>,
+ <&gcc ADM0_C2_RESET>;
+ reset-names = "clk", "c0", "c1", "c2";
+ qcom,ee = <0>;
+ };
+
+ sdcc1bam:dma@12182000{
compatible = "qcom,bam-v1.3.0";
reg = <0x12182000 0x8000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 7+ messages in thread* [RFC PATCH 2/4] clk: mdm9615: Add EBI2 clock
2016-12-22 20:05 [RFC PATCH 0/4] Enable NAND on Sierra Wireless WP8548 board Zoran Markovic
2016-12-22 20:05 ` [RFC PATCH 1/4] dt-bindings: mdm9615: Add ADM DMA engine Zoran Markovic
@ 2016-12-22 20:05 ` Zoran Markovic
2016-12-23 1:12 ` Stephen Boyd
2016-12-22 20:05 ` [RFC PATCH 3/4] dt-bindings: mdm9615: Add NAND controller Zoran Markovic
2016-12-22 20:05 ` [RFC PATCH 4/4] dt-bindings: wp8548: Add on-board NAND flash Zoran Markovic
3 siblings, 1 reply; 7+ messages in thread
From: Zoran Markovic @ 2016-12-22 20:05 UTC (permalink / raw)
To: linux-kernel
Cc: Zoran Markovic, Andy Gross, David Brown, Michael Turquette,
Stephen Boyd, Rob Herring, Mark Rutland, Neil Armstrong,
linux-arm-msm, linux-soc, linux-clk, devicetree
Add definition of EBI2 clock used by MDM9615 NAND controller.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Zoran Markovic <zmarkovic@sierrawireless.com>
---
drivers/clk/qcom/gcc-mdm9615.c | 30 ++++++++++++++++++++++++++
include/dt-bindings/clock/qcom,gcc-mdm9615.h | 3 +++
2 files changed, 33 insertions(+)
diff --git a/drivers/clk/qcom/gcc-mdm9615.c b/drivers/clk/qcom/gcc-mdm9615.c
index 581a17f..e9e98b1 100644
--- a/drivers/clk/qcom/gcc-mdm9615.c
+++ b/drivers/clk/qcom/gcc-mdm9615.c
@@ -1563,6 +1563,34 @@ enum {
},
};
+static struct clk_branch ebi2_clk = {
+ .hwcg_reg = 0x2664,
+ .hwcg_bit = 6,
+ .halt_reg = 0x2fcc,
+ .halt_bit = 23,
+ .clkr = {
+ .enable_reg = 0x2664,
+ .enable_mask = BIT(6)|BIT(4),
+ .hw.init = &(struct clk_init_data){
+ .name = "ebi2_clk",
+ .ops = &clk_branch_ops,
+ },
+ },
+};
+
+static struct clk_branch ebi2_aon_clk = {
+ .halt_reg = 0x2fcc,
+ .halt_bit = 23,
+ .clkr = {
+ .enable_reg = 0x2664,
+ .enable_mask = BIT(8),
+ .hw.init = &(struct clk_init_data){
+ .name = "ebi2_always_on_clk",
+ .ops = &clk_branch_ops,
+ },
+ },
+};
+
static struct clk_hw *gcc_mdm9615_hws[] = {
&cxo.hw,
};
@@ -1637,6 +1665,8 @@ enum {
[PMIC_ARB1_H_CLK] = &pmic_arb1_h_clk.clkr,
[PMIC_SSBI2_CLK] = &pmic_ssbi2_clk.clkr,
[RPM_MSG_RAM_H_CLK] = &rpm_msg_ram_h_clk.clkr,
+ [EBI2_CLK] = &ebi2_clk.clkr,
+ [EBI2_AON_CLK] = &ebi2_aon_clk.clkr,
};
static const struct qcom_reset_map gcc_mdm9615_resets[] = {
diff --git a/include/dt-bindings/clock/qcom,gcc-mdm9615.h b/include/dt-bindings/clock/qcom,gcc-mdm9615.h
index 9ab2c40..57cdca6 100644
--- a/include/dt-bindings/clock/qcom,gcc-mdm9615.h
+++ b/include/dt-bindings/clock/qcom,gcc-mdm9615.h
@@ -323,5 +323,8 @@
#define CE3_H_CLK 305
#define USB_HS1_SYSTEM_CLK_SRC 306
#define USB_HS1_SYSTEM_CLK 307
+#define EBI2_CLK 309
+#define EBI2_AON_CLK 310
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [RFC PATCH 2/4] clk: mdm9615: Add EBI2 clock
2016-12-22 20:05 ` [RFC PATCH 2/4] clk: mdm9615: Add EBI2 clock Zoran Markovic
@ 2016-12-23 1:12 ` Stephen Boyd
0 siblings, 0 replies; 7+ messages in thread
From: Stephen Boyd @ 2016-12-23 1:12 UTC (permalink / raw)
To: Zoran Markovic
Cc: linux-kernel, Andy Gross, David Brown, Michael Turquette,
Rob Herring, Mark Rutland, Neil Armstrong, linux-arm-msm,
linux-soc, linux-clk, devicetree
On 12/22, Zoran Markovic wrote:
> +static struct clk_branch ebi2_clk = {
> + .hwcg_reg = 0x2664,
> + .hwcg_bit = 6,
> + .halt_reg = 0x2fcc,
> + .halt_bit = 23,
> + .clkr = {
> + .enable_reg = 0x2664,
> + .enable_mask = BIT(6)|BIT(4),
Some spaces here around | please.
> + .hw.init = &(struct clk_init_data){
> + .name = "ebi2_clk",
> + .ops = &clk_branch_ops,
> + },
> + },
> +};
> +
> +static struct clk_branch ebi2_aon_clk = {
> + .halt_reg = 0x2fcc,
> + .halt_bit = 23,
> + .clkr = {
> + .enable_reg = 0x2664,
> + .enable_mask = BIT(8),
> + .hw.init = &(struct clk_init_data){
> + .name = "ebi2_always_on_clk",
Maybe just ebi2_aon_clk to keep things simple.
> + .ops = &clk_branch_ops,
> + },
> + },
> +};
> +
> static struct clk_hw *gcc_mdm9615_hws[] = {
> &cxo.hw,
> };
> diff --git a/include/dt-bindings/clock/qcom,gcc-mdm9615.h b/include/dt-bindings/clock/qcom,gcc-mdm9615.h
> index 9ab2c40..57cdca6 100644
> --- a/include/dt-bindings/clock/qcom,gcc-mdm9615.h
> +++ b/include/dt-bindings/clock/qcom,gcc-mdm9615.h
> @@ -323,5 +323,8 @@
> #define CE3_H_CLK 305
> #define USB_HS1_SYSTEM_CLK_SRC 306
> #define USB_HS1_SYSTEM_CLK 307
> +#define EBI2_CLK 309
Why jump from 307 to 309?
> +#define EBI2_AON_CLK 310
> +
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 7+ messages in thread
* [RFC PATCH 3/4] dt-bindings: mdm9615: Add NAND controller
2016-12-22 20:05 [RFC PATCH 0/4] Enable NAND on Sierra Wireless WP8548 board Zoran Markovic
2016-12-22 20:05 ` [RFC PATCH 1/4] dt-bindings: mdm9615: Add ADM DMA engine Zoran Markovic
2016-12-22 20:05 ` [RFC PATCH 2/4] clk: mdm9615: Add EBI2 clock Zoran Markovic
@ 2016-12-22 20:05 ` Zoran Markovic
2016-12-22 20:05 ` [RFC PATCH 4/4] dt-bindings: wp8548: Add on-board NAND flash Zoran Markovic
3 siblings, 0 replies; 7+ messages in thread
From: Zoran Markovic @ 2016-12-22 20:05 UTC (permalink / raw)
To: linux-kernel
Cc: Zoran Markovic, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Russell King, linux-arm-msm, linux-soc, devicetree,
linux-arm-kernel
Add dt description of NAND controller on MDM9615.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Zoran Markovic <zmarkovic@sierrawireless.com>
---
arch/arm/boot/dts/qcom-mdm9615.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi
index fbc7d68..6d42ff3 100644
--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
@@ -373,6 +373,22 @@
qcom,ee = <0>;
};
+ nand0: nand@1b400000 {
+ compatible = "qcom,ipq806x-nand";
+ reg = <0x1b400000 0x800>;
+ clocks = <&gcc EBI2_CLK>,
+ <&gcc EBI2_AON_CLK>;
+ clock-names = "core", "aon";
+
+ dmas = <&adm_dma 3>;
+ dma-names = "rxtx";
+ qcom,cmd-crci = <15>;
+ qcom,data-crci = <3>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
amba {
compatible = "arm,amba-bus";
#address-cells = <1>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 7+ messages in thread* [RFC PATCH 4/4] dt-bindings: wp8548: Add on-board NAND flash
2016-12-22 20:05 [RFC PATCH 0/4] Enable NAND on Sierra Wireless WP8548 board Zoran Markovic
` (2 preceding siblings ...)
2016-12-22 20:05 ` [RFC PATCH 3/4] dt-bindings: mdm9615: Add NAND controller Zoran Markovic
@ 2016-12-22 20:05 ` Zoran Markovic
3 siblings, 0 replies; 7+ messages in thread
From: Zoran Markovic @ 2016-12-22 20:05 UTC (permalink / raw)
To: linux-kernel
Cc: Zoran Markovic, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Russell King, linux-arm-msm, linux-soc, devicetree,
linux-arm-kernel
Add description of NAND flash on Sierra Wireless WP8548 module
(and MangOH board).
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Zoran Markovic <zmarkovic@sierrawireless.com>
---
arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 50 ++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
index 7869898..a4d1158 100644
--- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
@@ -54,6 +54,56 @@
};
};
+&nand0 {
+ nandcs@0 {
+ compatible = "qcom,nandcs";
+ reg = <0>;
+
+ linux,mtd-name = "micron,mt29f4g08";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootloader@0x051c0000 {
+ reg = <0x51c0000 0x100000>;
+ read-only;
+ };
+
+ kernel@0x052c0000 {
+ reg = <0x52c0000 0x1400000>;
+ read-only;
+ };
+
+ rootfs@0x066c0000 {
+ reg = <0x66c0000 0x3140000>;
+ read-only;
+ };
+
+ user0@0x09800000 {
+ reg = <0x9800000 0x2780000>;
+ };
+
+ user1@0x0bf80000 {
+ reg = <0xbf80000 0x8B80000>;
+ };
+
+ user2@0x14b00000 {
+ reg = <0x14b00000 0x500000>;
+ };
+
+ user3@0x15000000 {
+ reg = <0x15000000 0x200000>;
+ };
+ };
+ };
+};
+
&msmgpio {
pinctrl-0 = <&reset_out_pins>;
pinctrl-names = "default";
--
1.7.9.5
^ permalink raw reply related [flat|nested] 7+ messages in thread