* [PATCH] Fix USBTrdTim value in case of 8-bit UTMI+ phy
@ 2017-01-12 15:09 Amelie Delaunay
2017-01-12 15:09 ` [PATCH] usb: dwc2: gadget: Fix GUSBCFG.USBTRDTIM value Amelie Delaunay
0 siblings, 1 reply; 4+ messages in thread
From: Amelie Delaunay @ 2017-01-12 15:09 UTC (permalink / raw)
To: John Youn, Greg Kroah-Hartman; +Cc: linux-usb, linux-kernel
This problem was spotted during code review. It appears that USBTrdTim value
is not correctly set in case of 8-bit UTMI+ phy, because it is ORed with
USBCFG.USBTRDTIM reset value, which is 0x5.
I have no hardware to test it.
Amelie Delaunay (1):
usb: dwc2: gadget: Fix GUSBCFG.USBTRDTIM value
drivers/usb/dwc2/gadget.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] usb: dwc2: gadget: Fix GUSBCFG.USBTRDTIM value
2017-01-12 15:09 [PATCH] Fix USBTrdTim value in case of 8-bit UTMI+ phy Amelie Delaunay
@ 2017-01-12 15:09 ` Amelie Delaunay
0 siblings, 0 replies; 4+ messages in thread
From: Amelie Delaunay @ 2017-01-12 15:09 UTC (permalink / raw)
To: John Youn, Greg Kroah-Hartman; +Cc: linux-usb, linux-kernel
USBTrdTim must be programmed to 0x5 when phy has a UTMI+ 16-bit wide
interface or 0x9 when it has a 8-bit wide interface.
GUSBCFG reset value (Value After Reset: 0x1400) sets USBTrdTim to 0x5.
In case of 8-bit UTMI+, without clearing GUSBCFG.USBTRDTIM mask, USBTrdTim
results in 0xD (0x5 | 0x9).
That's why we need to clear GUSBCFG.USBTRDTIM mask before setting USBTrdTim
value, to ensure USBTrdTim is correctly set in case of 8-bit UTMI+.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
---
drivers/usb/dwc2/gadget.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index c55db4a..86b2076 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3169,7 +3169,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
/* keep other bits untouched (so e.g. forced modes are not lost) */
usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
- GUSBCFG_HNPCAP);
+ GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
(hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
@@ -4131,7 +4131,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
/* keep other bits untouched (so e.g. forced modes are not lost) */
usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
- GUSBCFG_HNPCAP);
+ GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
/* set the PLL on, remove the HNP/SRP and set the PHY */
trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] usb: dwc2: gadget: Fix GUSBCFG.USBTRDTIM value
2017-01-12 15:41 ` Amelie DELAUNAY
@ 2017-01-12 23:45 ` John Youn
0 siblings, 0 replies; 4+ messages in thread
From: John Youn @ 2017-01-12 23:45 UTC (permalink / raw)
To: Amelie DELAUNAY, John Youn, Greg Kroah-Hartman, Felipe Balbi
Cc: linux-usb, linux-kernel
On 1/12/2017 7:41 AM, Amelie DELAUNAY wrote:
> Hi all,
> Sorry, I did not see Pengcheng Li patch which is exactly the same:
> https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.kernel.org_patch_9347979_&d=DgIC-g&c=DPL6_X_6JkXFx7AXWqB0tg&r=U3o8uKoKhWme5_V9D-eeCkB11BFwt4KvWztBgdE9ZpA&m=6VylcKBQDS2RlneASNqb6vUEW48snVAZ1f_mhtzcSaE&s=iYEesI5W2GVN4jBs6pzyRC7Sb0RAng4gpapDsoZQG_s&e=
>
> Regards
>
Hi Felipe,
Could you take either one?
Regards,
John
> On 01/12/2017 04:36 PM, Amelie Delaunay wrote:
>> USBTrdTim must be programmed to 0x5 when phy has a UTMI+ 16-bit wide
>> interface or 0x9 when it has a 8-bit wide interface.
>> GUSBCFG reset value (Value After Reset: 0x1400) sets USBTrdTim to 0x5.
>> In case of 8-bit UTMI+, without clearing GUSBCFG.USBTRDTIM mask, USBTrdTim
>> results in 0xD (0x5 | 0x9).
>> That's why we need to clear GUSBCFG.USBTRDTIM mask before setting USBTrdTim
>> value, to ensure USBTrdTim is correctly set in case of 8-bit UTMI+.
>>
>> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
>> ---
>> drivers/usb/dwc2/gadget.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
>> index c55db4a..86b2076 100644
>> --- a/drivers/usb/dwc2/gadget.c
>> +++ b/drivers/usb/dwc2/gadget.c
>> @@ -3169,7 +3169,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
>> /* keep other bits untouched (so e.g. forced modes are not lost) */
>> usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
>> usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
>> - GUSBCFG_HNPCAP);
>> + GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
>>
>> if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
>> (hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
>> @@ -4131,7 +4131,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
>> /* keep other bits untouched (so e.g. forced modes are not lost) */
>> usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
>> usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
>> - GUSBCFG_HNPCAP);
>> + GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
>>
>> /* set the PLL on, remove the HNP/SRP and set the PHY */
>> trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
>>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] usb: dwc2: gadget: Fix GUSBCFG.USBTRDTIM value
[not found] ` <1484235416-24497-2-git-send-email-amelie.delaunay@st.com>
@ 2017-01-12 15:41 ` Amelie DELAUNAY
2017-01-12 23:45 ` John Youn
0 siblings, 1 reply; 4+ messages in thread
From: Amelie DELAUNAY @ 2017-01-12 15:41 UTC (permalink / raw)
To: John Youn, Greg Kroah-Hartman; +Cc: linux-usb, linux-kernel
Hi all,
Sorry, I did not see Pengcheng Li patch which is exactly the same:
https://patchwork.kernel.org/patch/9347979/
Regards
On 01/12/2017 04:36 PM, Amelie Delaunay wrote:
> USBTrdTim must be programmed to 0x5 when phy has a UTMI+ 16-bit wide
> interface or 0x9 when it has a 8-bit wide interface.
> GUSBCFG reset value (Value After Reset: 0x1400) sets USBTrdTim to 0x5.
> In case of 8-bit UTMI+, without clearing GUSBCFG.USBTRDTIM mask, USBTrdTim
> results in 0xD (0x5 | 0x9).
> That's why we need to clear GUSBCFG.USBTRDTIM mask before setting USBTrdTim
> value, to ensure USBTrdTim is correctly set in case of 8-bit UTMI+.
>
> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
> ---
> drivers/usb/dwc2/gadget.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
> index c55db4a..86b2076 100644
> --- a/drivers/usb/dwc2/gadget.c
> +++ b/drivers/usb/dwc2/gadget.c
> @@ -3169,7 +3169,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
> /* keep other bits untouched (so e.g. forced modes are not lost) */
> usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
> usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
> - GUSBCFG_HNPCAP);
> + GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
>
> if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
> (hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
> @@ -4131,7 +4131,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
> /* keep other bits untouched (so e.g. forced modes are not lost) */
> usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
> usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
> - GUSBCFG_HNPCAP);
> + GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
>
> /* set the PLL on, remove the HNP/SRP and set the PHY */
> trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2017-01-12 15:09 [PATCH] Fix USBTrdTim value in case of 8-bit UTMI+ phy Amelie Delaunay
2017-01-12 15:09 ` [PATCH] usb: dwc2: gadget: Fix GUSBCFG.USBTRDTIM value Amelie Delaunay
[not found] <1484235416-24497-1-git-send-email-amelie.delaunay@st.com>
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2017-01-12 15:41 ` Amelie DELAUNAY
2017-01-12 23:45 ` John Youn
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