[Patch v4 0/2] Support ARM SMCC SoC vendor quirks

[Patch v4 0/2] Support ARM SMCC SoC vendor quirks

[Andy Gross]

At least one SoC vendor (Qualcomm) requires additional processing done
during ARM SMCCC calls.  As such, an additional parameter to the
arm_smccc_smc is required to be able to handle SoC specific quirks.

The Qualcomm quirk is necessary due to the fact that the scm call can
be interrupted on Qualcomm ARM64 platforms.  When this occurs, the
call must be restarted using information that was passed back during
the original smc call.

The first patch in this series adds a quirk structure and also adds a
quirk parameter to arm_smccc_smc calls.  I added macros to allow users
to choose the API they need.  This keeps all of the current users who
do not need quirks from having to change anything.

The second patch adds the Qualcomm quirk and also implements the
Qualcomm firmware changes required to handle the restarting of the
interrupted SMC call.

The original patch set for the SMCCC session ID is located at:
https://lkml.org/lkml/2016/8/20/7

Changes from v3:
  - Fix documentation

Changes from v2:
  - Use variadic macros

Changes from v1:
  - Add macros to handle both use cases per review comments

Andy Gross (2):
  arm: kernel: Add SMC structure parameter
  firmware: qcom: scm: Fix interrupted SCM calls

 arch/arm/kernel/armksyms.c      |  2 +-
 arch/arm/kernel/smccc-call.S    |  7 ++++---
 arch/arm64/kernel/arm64ksyms.c  |  2 +-
 arch/arm64/kernel/asm-offsets.c |  7 +++++--
 arch/arm64/kernel/smccc-call.S  | 16 ++++++++++++----
 drivers/firmware/qcom_scm-64.c  | 13 ++++++++++---
 include/linux/arm-smccc.h       | 38 +++++++++++++++++++++++++++++++-------
 7 files changed, 64 insertions(+), 21 deletions(-)

-- 
1.9.1

[Patch v4 1/2] arm: kernel: Add SMC structure parameter

[Andy Gross]

This patch adds a quirk parameter to the arm_smccc_smc call.  The quirk
structure allows for specialized SMC operations due to SoC specific
requirements.  The current arm_smccc_smc is renamed and macros are used
instead to specify the standard arm_smccc_smc or the arm_smccc_smc_quirk
function.

This patch and partial implementation was suggested by Will Deacon.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm/kernel/armksyms.c      |  2 +-
 arch/arm/kernel/smccc-call.S    |  7 ++++---
 arch/arm64/kernel/arm64ksyms.c  |  2 +-
 arch/arm64/kernel/asm-offsets.c |  7 +++++--
 arch/arm64/kernel/smccc-call.S  |  7 ++++---
 include/linux/arm-smccc.h       | 27 +++++++++++++++++++++++----
 6 files changed, 38 insertions(+), 14 deletions(-)

diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 7e45f69..c2a8e79 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -178,6 +178,6 @@
 #endif
 
 #ifdef CONFIG_HAVE_ARM_SMCCC
-EXPORT_SYMBOL(arm_smccc_smc);
+EXPORT_SYMBOL(__arm_smccc_smc);
 EXPORT_SYMBOL(arm_smccc_hvc);
 #endif
diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S
index 2e48b67..eb666d7 100644
--- a/arch/arm/kernel/smccc-call.S
+++ b/arch/arm/kernel/smccc-call.S
@@ -46,11 +46,12 @@ UNWIND(	.fnend)
 /*
  * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
  *		  unsigned long a3, unsigned long a4, unsigned long a5,
- *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res)
+ *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
+ *		  struct arm_smccc_quirk *quirk)
  */
-ENTRY(arm_smccc_smc)
+ENTRY(__arm_smccc_smc)
 	SMCCC SMCCC_SMC
-ENDPROC(arm_smccc_smc)
+ENDPROC(__arm_smccc_smc)
 
 /*
  * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
diff --git a/arch/arm64/kernel/arm64ksyms.c b/arch/arm64/kernel/arm64ksyms.c
index 78f3680..43370a0 100644
--- a/arch/arm64/kernel/arm64ksyms.c
+++ b/arch/arm64/kernel/arm64ksyms.c
@@ -73,5 +73,5 @@
 #endif
 
 	/* arm-smccc */
-EXPORT_SYMBOL(arm_smccc_smc);
+EXPORT_SYMBOL(__arm_smccc_smc);
 EXPORT_SYMBOL(arm_smccc_hvc);
diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index bc049af..b3bb7ef 100644
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -143,8 +143,11 @@ int main(void)
   DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS,	offsetof(struct sleep_stack_data, system_regs));
   DEFINE(SLEEP_STACK_DATA_CALLEE_REGS,	offsetof(struct sleep_stack_data, callee_saved_regs));
 #endif
-  DEFINE(ARM_SMCCC_RES_X0_OFFS,	offsetof(struct arm_smccc_res, a0));
-  DEFINE(ARM_SMCCC_RES_X2_OFFS,	offsetof(struct arm_smccc_res, a2));
+  DEFINE(ARM_SMCCC_RES_X0_OFFS,		offsetof(struct arm_smccc_res, a0));
+  DEFINE(ARM_SMCCC_RES_X2_OFFS,		offsetof(struct arm_smccc_res, a2));
+  DEFINE(ARM_SMCCC_QUIRK_ID_OFFS,	offsetof(struct arm_smccc_quirk, id));
+  DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS,	offsetof(struct arm_smccc_quirk, state));
+
   BLANK();
   DEFINE(HIBERN_PBE_ORIG,	offsetof(struct pbe, orig_address));
   DEFINE(HIBERN_PBE_ADDR,	offsetof(struct pbe, address));
diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
index ae0496f..6290696 100644
--- a/arch/arm64/kernel/smccc-call.S
+++ b/arch/arm64/kernel/smccc-call.S
@@ -27,11 +27,12 @@
 /*
  * void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
  *		  unsigned long a3, unsigned long a4, unsigned long a5,
- *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res)
+ *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
+ *		  struct arm_smccc_quirk *quirk)
  */
-ENTRY(arm_smccc_smc)
+ENTRY(__arm_smccc_smc)
 	SMCCC	smc
-ENDPROC(arm_smccc_smc)
+ENDPROC(__arm_smccc_smc)
 
 /*
  * void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index b5abfda..ab937db 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -72,19 +72,34 @@ struct arm_smccc_res {
 };
 
 /**
- * arm_smccc_smc() - make SMC calls
+ * struct arm_smccc_quirk - Contains quirk information
+ * @id: quirk identification
+ * @state: quirk specific information
+ * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
+ */
+struct arm_smccc_quirk {
+	int	id;
+	union {
+		unsigned long a6;
+	} state;
+};
+
+/**
+ * __arm_smccc_smc() - make SMC calls
  * @a0-a7: arguments passed in registers 0 to 7
  * @res: result values from registers 0 to 3
+ * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
  *
  * This function is used to make SMC calls following SMC Calling Convention.
  * The content of the supplied param are copied to registers 0 to 7 prior
  * to the SMC instruction. The return values are updated with the content
- * from register 0 to 3 on return from the SMC instruction.
+ * from register 0 to 3 on return from the SMC instruction.  An optional
+ * quirk structure provides vendor specific behavior.
  */
-asmlinkage void arm_smccc_smc(unsigned long a0, unsigned long a1,
+asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
 			unsigned long a2, unsigned long a3, unsigned long a4,
 			unsigned long a5, unsigned long a6, unsigned long a7,
-			struct arm_smccc_res *res);
+			struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
 
 /**
  * arm_smccc_hvc() - make HVC calls
@@ -101,4 +116,8 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1,
 			unsigned long a5, unsigned long a6, unsigned long a7,
 			struct arm_smccc_res *res);
 
+#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
+
+#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
+
 #endif /*__LINUX_ARM_SMCCC_H*/
-- 
1.9.1

[Patch v4 2/2] firmware: qcom: scm: Fix interrupted SCM calls

[Andy Gross]

This patch adds a Qualcomm specific quirk to the arm_smccc_smc call.

On Qualcomm ARM64 platforms, the SMC call can return before it has
completed.  If this occurs, the call can be restarted, but it requires
using the returned session ID value from the interrupted SMC call.

The quirk stores off the session ID from the interrupted call in the
quirk structure so that it can be used by the caller.

This patch folds in a fix given by Sricharan R:
https://lkml.org/lkml/2016/9/28/272

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/kernel/smccc-call.S |  9 ++++++++-
 drivers/firmware/qcom_scm-64.c | 13 ++++++++++---
 include/linux/arm-smccc.h      | 11 ++++++++---
 3 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
index 6290696..72ecdca 100644
--- a/arch/arm64/kernel/smccc-call.S
+++ b/arch/arm64/kernel/smccc-call.S
@@ -12,6 +12,7 @@
  *
  */
 #include <linux/linkage.h>
+#include <linux/arm-smccc.h>
 #include <asm/asm-offsets.h>
 
 	.macro SMCCC instr
@@ -20,7 +21,13 @@
 	ldr	x4, [sp]
 	stp	x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
 	stp	x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
-	ret
+	ldr	x4, [sp, #8]
+	cbz	x4, 1f /* no quirk structure */
+	ldr	x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
+	cmp	x9, #ARM_SMCCC_QUIRK_QCOM_A6
+	b.ne	1f
+	str	x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
+1:	ret
 	.cfi_endproc
 	.endm
 
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 4a0f5ea..1e2e519 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -91,6 +91,7 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id,
 	dma_addr_t args_phys = 0;
 	void *args_virt = NULL;
 	size_t alloc_len;
+	struct arm_smccc_quirk quirk = {.id = ARM_SMCCC_QUIRK_QCOM_A6};
 
 	if (unlikely(arglen > N_REGISTER_ARGS)) {
 		alloc_len = N_EXT_QCOM_SCM_ARGS * sizeof(u64);
@@ -131,10 +132,16 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id,
 					 qcom_smccc_convention,
 					 ARM_SMCCC_OWNER_SIP, fn_id);
 
+		quirk.state.a6 = 0;
+
 		do {
-			arm_smccc_smc(cmd, desc->arginfo, desc->args[0],
-				      desc->args[1], desc->args[2], x5, 0, 0,
-				      res);
+			arm_smccc_smc_quirk(cmd, desc->arginfo, desc->args[0],
+				      desc->args[1], desc->args[2], x5,
+				      quirk.state.a6, 0, res, &quirk);
+
+			if (res->a0 == QCOM_SCM_INTERRUPTED)
+				cmd = res->a0;
+
 		} while (res->a0 == QCOM_SCM_INTERRUPTED);
 
 		mutex_unlock(&qcom_scm_lock);
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index ab937db..6cd101e 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -14,9 +14,6 @@
 #ifndef __LINUX_ARM_SMCCC_H
 #define __LINUX_ARM_SMCCC_H
 
-#include <linux/linkage.h>
-#include <linux/types.h>
-
 /*
  * This file provides common defines for ARM SMC Calling Convention as
  * specified in
@@ -60,6 +57,13 @@
 #define ARM_SMCCC_OWNER_TRUSTED_OS	50
 #define ARM_SMCCC_OWNER_TRUSTED_OS_END	63
 
+#define ARM_SMCCC_QUIRK_NONE		0
+#define ARM_SMCCC_QUIRK_QCOM_A6		1 /* Save/restore register a6 */
+
+#ifndef __ASSEMBLY__
+
+#include <linux/linkage.h>
+#include <linux/types.h>
 /**
  * struct arm_smccc_res - Result from SMC/HVC call
  * @a0-a3 result values from registers 0 to 3
@@ -120,4 +124,5 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1,
 
 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
 
+#endif /*__ASSEMBLY__*/
 #endif /*__LINUX_ARM_SMCCC_H*/
-- 
1.9.1

Re: [Patch v4 2/2] firmware: qcom: scm: Fix interrupted SCM calls

[Olof Johansson]

Hi,

On Thu, Jan 19, 2017 at 8:58 AM, Andy Gross <andy.gross@linaro.org> wrote:
> This patch adds a Qualcomm specific quirk to the arm_smccc_smc call.
>
> On Qualcomm ARM64 platforms, the SMC call can return before it has
> completed.  If this occurs, the call can be restarted, but it requires
> using the returned session ID value from the interrupted SMC call.
>
> The quirk stores off the session ID from the interrupted call in the
> quirk structure so that it can be used by the caller.
>
> This patch folds in a fix given by Sricharan R:
> https://lkml.org/lkml/2016/9/28/272
>
> Signed-off-by: Andy Gross <andy.gross@linaro.org>
> Reviewed-by: Will Deacon <will.deacon@arm.com>
> ---
>  arch/arm64/kernel/smccc-call.S |  9 ++++++++-
>  drivers/firmware/qcom_scm-64.c | 13 ++++++++++---
>  include/linux/arm-smccc.h      | 11 ++++++++---
>  3 files changed, 26 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
> index 6290696..72ecdca 100644
> --- a/arch/arm64/kernel/smccc-call.S
> +++ b/arch/arm64/kernel/smccc-call.S
> @@ -12,6 +12,7 @@
>   *
>   */
>  #include <linux/linkage.h>
> +#include <linux/arm-smccc.h>
>  #include <asm/asm-offsets.h>
>
>         .macro SMCCC instr
> @@ -20,7 +21,13 @@
>         ldr     x4, [sp]
>         stp     x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
>         stp     x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
> -       ret
> +       ldr     x4, [sp, #8]
> +       cbz     x4, 1f /* no quirk structure */
> +       ldr     x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
> +       cmp     x9, #ARM_SMCCC_QUIRK_QCOM_A6
> +       b.ne    1f
> +       str     x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
> +1:     ret
>         .cfi_endproc
>         .endm

This extends the SMC entry/return path quite a bit.

Is this truly a qualcomm-only quirk, or are other vendors also picking it up?

Why not either make arm_smccc_.* function pointers and update them
accordingly, or use a custom version for the specific locations where
you want/need to restart the calls? You are after all already wrapping
them in qcom_scm_call().

Seems like a more appropriate change than burden all platforms with
longer code path due to your quirk.


-Olof

Re: [Patch v4 2/2] firmware: qcom: scm: Fix interrupted SCM calls

[Will Deacon]

Hi Olof,

On Sun, Jan 29, 2017 at 04:24:51PM -0800, Olof Johansson wrote:
> On Thu, Jan 19, 2017 at 8:58 AM, Andy Gross <andy.gross@linaro.org> wrote:
> > This patch adds a Qualcomm specific quirk to the arm_smccc_smc call.
> >
> > On Qualcomm ARM64 platforms, the SMC call can return before it has
> > completed.  If this occurs, the call can be restarted, but it requires
> > using the returned session ID value from the interrupted SMC call.
> >
> > The quirk stores off the session ID from the interrupted call in the
> > quirk structure so that it can be used by the caller.
> >
> > This patch folds in a fix given by Sricharan R:
> > https://lkml.org/lkml/2016/9/28/272
> >
> > Signed-off-by: Andy Gross <andy.gross@linaro.org>
> > Reviewed-by: Will Deacon <will.deacon@arm.com>
> > ---
> >  arch/arm64/kernel/smccc-call.S |  9 ++++++++-
> >  drivers/firmware/qcom_scm-64.c | 13 ++++++++++---
> >  include/linux/arm-smccc.h      | 11 ++++++++---
> >  3 files changed, 26 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
> > index 6290696..72ecdca 100644
> > --- a/arch/arm64/kernel/smccc-call.S
> > +++ b/arch/arm64/kernel/smccc-call.S
> > @@ -12,6 +12,7 @@
> >   *
> >   */
> >  #include <linux/linkage.h>
> > +#include <linux/arm-smccc.h>
> >  #include <asm/asm-offsets.h>
> >
> >         .macro SMCCC instr
> > @@ -20,7 +21,13 @@
> >         ldr     x4, [sp]
> >         stp     x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
> >         stp     x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
> > -       ret
> > +       ldr     x4, [sp, #8]
> > +       cbz     x4, 1f /* no quirk structure */
> > +       ldr     x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
> > +       cmp     x9, #ARM_SMCCC_QUIRK_QCOM_A6
> > +       b.ne    1f
> > +       str     x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
> > +1:     ret
> >         .cfi_endproc
> >         .endm
> 
> This extends the SMC entry/return path quite a bit.

I honestly doubt it's measurable. You've got an independent load from the
stack and a cbz that's likely predicted correctly given the static nature
of the quirk. Then you have an SMC, which is going to trap and dominate
the cost of this function.

> Is this truly a qualcomm-only quirk, or are other vendors also picking it
> up?

Currently, it's just qualcomm. Whilst I'd love to say they'll be the only
people to interpret the SMCCC in an imaginative fashion, I'd be surprised
if we don't see other vendors making mistakes in this area in the future.

> Why not either make arm_smccc_.* function pointers and update them
> accordingly, or use a custom version for the specific locations where
> you want/need to restart the calls? You are after all already wrapping
> them in qcom_scm_call().

Having the low-level SMC entry code in one place is advantageous because
it means the SMCCC contract is enforced in common code, making it easier
to debug and maintain. If a vendor got the contract so badly wrong that
it didn't resemble SMCCC, then I'd agree with you, but here we're just
saving and restoring an extra register.

> Seems like a more appropriate change than burden all platforms with
> longer code path due to your quirk.

I really don't think it's a problem. Do you have numbers suggesting
otherwise?

Will

Re: [Patch v4 2/2] firmware: qcom: scm: Fix interrupted SCM calls

[Olof Johansson]

On Mon, Jan 30, 2017 at 2:55 AM, Will Deacon <will.deacon@arm.com> wrote:
> Hi Olof,
>
> On Sun, Jan 29, 2017 at 04:24:51PM -0800, Olof Johansson wrote:
>> On Thu, Jan 19, 2017 at 8:58 AM, Andy Gross <andy.gross@linaro.org> wrote:
>> > This patch adds a Qualcomm specific quirk to the arm_smccc_smc call.
>> >
>> > On Qualcomm ARM64 platforms, the SMC call can return before it has
>> > completed.  If this occurs, the call can be restarted, but it requires
>> > using the returned session ID value from the interrupted SMC call.
>> >
>> > The quirk stores off the session ID from the interrupted call in the
>> > quirk structure so that it can be used by the caller.
>> >
>> > This patch folds in a fix given by Sricharan R:
>> > https://lkml.org/lkml/2016/9/28/272
>> >
>> > Signed-off-by: Andy Gross <andy.gross@linaro.org>
>> > Reviewed-by: Will Deacon <will.deacon@arm.com>
>> > ---
>> >  arch/arm64/kernel/smccc-call.S |  9 ++++++++-
>> >  drivers/firmware/qcom_scm-64.c | 13 ++++++++++---
>> >  include/linux/arm-smccc.h      | 11 ++++++++---
>> >  3 files changed, 26 insertions(+), 7 deletions(-)
>> >
>> > diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
>> > index 6290696..72ecdca 100644
>> > --- a/arch/arm64/kernel/smccc-call.S
>> > +++ b/arch/arm64/kernel/smccc-call.S
>> > @@ -12,6 +12,7 @@
>> >   *
>> >   */
>> >  #include <linux/linkage.h>
>> > +#include <linux/arm-smccc.h>
>> >  #include <asm/asm-offsets.h>
>> >
>> >         .macro SMCCC instr
>> > @@ -20,7 +21,13 @@
>> >         ldr     x4, [sp]
>> >         stp     x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
>> >         stp     x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
>> > -       ret
>> > +       ldr     x4, [sp, #8]
>> > +       cbz     x4, 1f /* no quirk structure */
>> > +       ldr     x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
>> > +       cmp     x9, #ARM_SMCCC_QUIRK_QCOM_A6
>> > +       b.ne    1f
>> > +       str     x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
>> > +1:     ret
>> >         .cfi_endproc
>> >         .endm
>>
>> This extends the SMC entry/return path quite a bit.
>
> I honestly doubt it's measurable. You've got an independent load from the
> stack and a cbz that's likely predicted correctly given the static nature
> of the quirk. Then you have an SMC, which is going to trap and dominate
> the cost of this function.
>
>> Is this truly a qualcomm-only quirk, or are other vendors also picking it
>> up?
>
> Currently, it's just qualcomm. Whilst I'd love to say they'll be the only
> people to interpret the SMCCC in an imaginative fashion, I'd be surprised
> if we don't see other vendors making mistakes in this area in the future.

Ok, so the list of checks is anticipated to grow.

>> Why not either make arm_smccc_.* function pointers and update them
>> accordingly, or use a custom version for the specific locations where
>> you want/need to restart the calls? You are after all already wrapping
>> them in qcom_scm_call().
>
> Having the low-level SMC entry code in one place is advantageous because
> it means the SMCCC contract is enforced in common code, making it easier
> to debug and maintain. If a vendor got the contract so badly wrong that
> it didn't resemble SMCCC, then I'd agree with you, but here we're just
> saving and restoring an extra register.

What contract? Qualcomm just violated it and the answer isn't to
enforce, it's to enable their "enhanced" implementation (and it should
be, within reason).

It's not like their own special SMCCC functions have to go in a
different file. Stick them on the side of the current ones in the same
file. The main call is already nicely abstracted with an asm macro so
that part will be shared, and the call sites are per-vendor anyway.

>> Seems like a more appropriate change than burden all platforms with
>> longer code path due to your quirk.
>
> I really don't think it's a problem. Do you have numbers suggesting
> otherwise?

Not on this first quirk, no.

Anyway, I guess I'm just bikeshedding. You should merge this code if
you're happy with it.



Thanks!

-Olof

Re: [Patch v4 2/2] firmware: qcom: scm: Fix interrupted SCM calls

[Will Deacon]

On Mon, Jan 30, 2017 at 10:22:18PM -0800, Olof Johansson wrote:
> On Mon, Jan 30, 2017 at 2:55 AM, Will Deacon <will.deacon@arm.com> wrote:
> > On Sun, Jan 29, 2017 at 04:24:51PM -0800, Olof Johansson wrote:
> >> Seems like a more appropriate change than burden all platforms with
> >> longer code path due to your quirk.
> >
> > I really don't think it's a problem. Do you have numbers suggesting
> > otherwise?
> 
> Not on this first quirk, no.
> 
> Anyway, I guess I'm just bikeshedding. You should merge this code if
> you're happy with it.

Ok. Andy, does it work for you if I take these two patches via arm64? I'll
need Russell's ack on the arch/arm/ part.

Will

Re: [Patch v4 2/2] firmware: qcom: scm: Fix interrupted SCM calls

[Andy Gross]

On Tue, Jan 31, 2017 at 02:45:39PM +0000, Will Deacon wrote:
> On Mon, Jan 30, 2017 at 10:22:18PM -0800, Olof Johansson wrote:
> > On Mon, Jan 30, 2017 at 2:55 AM, Will Deacon <will.deacon@arm.com> wrote:
> > > On Sun, Jan 29, 2017 at 04:24:51PM -0800, Olof Johansson wrote:
> > >> Seems like a more appropriate change than burden all platforms with
> > >> longer code path due to your quirk.
> > >
> > > I really don't think it's a problem. Do you have numbers suggesting
> > > otherwise?
> > 
> > Not on this first quirk, no.
> > 
> > Anyway, I guess I'm just bikeshedding. You should merge this code if
> > you're happy with it.
> 
> Ok. Andy, does it work for you if I take these two patches via arm64? I'll
> need Russell's ack on the arch/arm/ part.

FYI, there is a new version that fixes an issue with hvc.  I missed this as we
don't exercise that code path.

As for taking it via arm64, that's fine.  I'm not sure how to get his ACK aside
from emailing the patches.


Andy