* [PATCH 0/3] arm64: Add ARCH_THUNDER2
@ 2017-01-20 20:46 Jayachandran C
2017-01-20 20:46 ` [PATCH 1/3] arm64: add THUNDER2 processor family Jayachandran C
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Jayachandran C @ 2017-01-20 20:46 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Jayachandran C, Catalin Marinas, Will Deacon, Rob Herring,
Arnd Bergmann, linux-kernel, david.daney, devicetree
This patchset adds support for the new ThunderX2 CN99XX processor
family.
Changes are to add the config option, the required device tree files,
the device tree bindings documentation and the defconfig entry.
JC.
Jayachandran C (3):
arm64: add THUNDER2 processor family
dt-bindings: arm64 ARCH_THUNDER2 platform documentation
arm64: add ARCH_THUNDER2 to defconfig
.../devicetree/bindings/arm/cavium-thunder2.txt | 5 +
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
arch/arm64/Kconfig.platforms | 7 +
arch/arm64/boot/dts/cavium/Makefile | 1 +
arch/arm64/boot/dts/cavium/thunder-99xx.dts | 34 +++++
arch/arm64/boot/dts/cavium/thunder-99xx.dtsi | 147 +++++++++++++++++++++
arch/arm64/configs/defconfig | 1 +
7 files changed, 196 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
create mode 100644 arch/arm64/boot/dts/cavium/thunder-99xx.dts
create mode 100644 arch/arm64/boot/dts/cavium/thunder-99xx.dtsi
--
2.7.4
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/3] arm64: add THUNDER2 processor family
2017-01-20 20:46 [PATCH 0/3] arm64: Add ARCH_THUNDER2 Jayachandran C
@ 2017-01-20 20:46 ` Jayachandran C
2017-01-20 20:46 ` [PATCH 2/3] dt-bindings: arm64 ARCH_THUNDER2 platform documentation Jayachandran C
2017-01-20 20:46 ` [PATCH 3/3] arm64: add ARCH_THUNDER2 to defconfig Jayachandran C
2 siblings, 0 replies; 5+ messages in thread
From: Jayachandran C @ 2017-01-20 20:46 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Jayachandran C, Catalin Marinas, Will Deacon, Rob Herring,
Arnd Bergmann, linux-kernel, david.daney, devicetree
Add support for ThunderX2 CN99XX arm64 server processors.
Introduce a new arm64 platform config option ARCH_THUNDER2 for these
processors. Add device tree files boot/dts/cavium/thunder-99xx.dtsi for
on-chip devices and boot/dts/cavium/thunder-99xx.dts for the evaluation
board.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
---
arch/arm64/Kconfig.platforms | 7 ++
arch/arm64/boot/dts/cavium/Makefile | 1 +
arch/arm64/boot/dts/cavium/thunder-99xx.dts | 34 +++++++
arch/arm64/boot/dts/cavium/thunder-99xx.dtsi | 147 +++++++++++++++++++++++++++
4 files changed, 189 insertions(+)
create mode 100644 arch/arm64/boot/dts/cavium/thunder-99xx.dts
create mode 100644 arch/arm64/boot/dts/cavium/thunder-99xx.dtsi
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 715ef12..129cc5a 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -190,6 +190,13 @@ config ARCH_THUNDER
help
This enables support for Cavium's Thunder Family of SoCs.
+config ARCH_THUNDER2
+ bool "Cavium ThunderX2 Server Processors"
+ select GPIOLIB
+ help
+ This enables support for Cavium's ThunderX2 CN99XX family of
+ server processors.
+
config ARCH_UNIPHIER
bool "Socionext UniPhier SoC Family"
select ARCH_HAS_RESET_CONTROLLER
diff --git a/arch/arm64/boot/dts/cavium/Makefile b/arch/arm64/boot/dts/cavium/Makefile
index e34f89d..557c8be 100644
--- a/arch/arm64/boot/dts/cavium/Makefile
+++ b/arch/arm64/boot/dts/cavium/Makefile
@@ -1,4 +1,5 @@
dtb-$(CONFIG_ARCH_THUNDER) += thunder-88xx.dtb
+dtb-$(CONFIG_ARCH_THUNDER2) += thunder-99xx.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/cavium/thunder-99xx.dts b/arch/arm64/boot/dts/cavium/thunder-99xx.dts
new file mode 100644
index 0000000..ed6715a
--- /dev/null
+++ b/arch/arm64/boot/dts/cavium/thunder-99xx.dts
@@ -0,0 +1,34 @@
+/*
+ * dts file for Cavium ThunderX2 CN99XX based Evaluation Boards
+ *
+ * Copyright (c) 2017 Cavium Inc.
+ * Copyright (c) 2013-2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "thunder-99xx.dtsi"
+
+/ {
+ model = "Cavium ThunderX2 CN99XX";
+ compatible = "cavium,thunder-99xx";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
+ <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
diff --git a/arch/arm64/boot/dts/cavium/thunder-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-99xx.dtsi
new file mode 100644
index 0000000..1c07732
--- /dev/null
+++ b/arch/arm64/boot/dts/cavium/thunder-99xx.dtsi
@@ -0,0 +1,147 @@
+/*
+ * dtsi file for Cavium ThunderX2 CN99XX processor
+ *
+ * Copyright (c) 2017 Cavium Inc.
+ * Copyright (c) 2013-2016 Broadcom
+ * Author: Zi Shen Lim <zlim@broadcom.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Cavium ThunderX2 CN99xx";
+ compatible = "cavium,thunder-99xx";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ /* just 4 cpus now, 128 needed in full config */
+ cpus {
+ #address-cells = <0x2>;
+ #size-cells = <0x0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "cavium,thunder2", "arm,armv8";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "cavium,thunder2", "arm,armv8";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "cavium,thunder2", "arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "cavium,thunder2", "arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ gic: interrupt-controller@400080000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ interrupt-controller;
+ #redistributor-regions = <1>;
+ reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
+ <0x04 0x01000000 0x0 0x1000000>; /* GICR */
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+
+ gicits: gic-its@40010000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; /* PMU overflow */
+ };
+
+ clk125mhz: uart_clk125mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "clk125mhz";
+ };
+
+ pci {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ /* ECAM at 0x3000_0000 - 0x4000_0000 */
+ reg = <0x0 0x30000000 0x0 0x10000000>;
+ reg-names = "PCI ECAM";
+
+ /*
+ * PCI ranges:
+ * IO no supported
+ * MEM 0x4000_0000 - 0x6000_0000
+ * MEM64 pref 0x40_0000_0000 - 0x60_0000_0000
+ */
+ ranges =
+ <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000
+ 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map =
+ /* addr pin ic icaddr icintr */
+ <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+ 0 0 0 4 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ msi-parent = <&gicits>;
+ dma-coherent;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ uart0: serial@402020000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x04 0x02020000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk125mhz>;
+ clock-names = "apb_pclk";
+ };
+ };
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
2017-01-20 20:46 [PATCH 0/3] arm64: Add ARCH_THUNDER2 Jayachandran C
2017-01-20 20:46 ` [PATCH 1/3] arm64: add THUNDER2 processor family Jayachandran C
@ 2017-01-20 20:46 ` Jayachandran C
2017-01-23 16:28 ` Rob Herring
2017-01-20 20:46 ` [PATCH 3/3] arm64: add ARCH_THUNDER2 to defconfig Jayachandran C
2 siblings, 1 reply; 5+ messages in thread
From: Jayachandran C @ 2017-01-20 20:46 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Jayachandran C, Catalin Marinas, Will Deacon, Rob Herring,
Arnd Bergmann, linux-kernel, david.daney, devicetree
Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
The processor core will use cavium,thunder2 as ID and the SoC will use
cavium,thunder-99xx
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
---
Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 5 +++++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
2 files changed, 6 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
new file mode 100644
index 0000000..82276a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
@@ -0,0 +1,5 @@
+Cavium Thunder2 Family device tree bindings
+-------------------------------------------
+
+Boards with Cavium ThunderX2 CN99XX shall have the root property:
+ compatible = "cavium,thunder-99xx";
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index a1bcfee..74f0b23 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
"brcm,brahma-b15"
"brcm,vulcan"
"cavium,thunder"
+ "cavium,thunder2"
"faraday,fa526"
"intel,sa110"
"intel,sa1100"
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] arm64: add ARCH_THUNDER2 to defconfig
2017-01-20 20:46 [PATCH 0/3] arm64: Add ARCH_THUNDER2 Jayachandran C
2017-01-20 20:46 ` [PATCH 1/3] arm64: add THUNDER2 processor family Jayachandran C
2017-01-20 20:46 ` [PATCH 2/3] dt-bindings: arm64 ARCH_THUNDER2 platform documentation Jayachandran C
@ 2017-01-20 20:46 ` Jayachandran C
2 siblings, 0 replies; 5+ messages in thread
From: Jayachandran C @ 2017-01-20 20:46 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Jayachandran C, Catalin Marinas, Will Deacon, Rob Herring,
Arnd Bergmann, linux-kernel, david.daney, devicetree
This will allow the default kernel build to boot on Cavium ThunderX2
CN99XX processors.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 33b744d..7a9c262 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -53,6 +53,7 @@ CONFIG_ARCH_STRATIX10=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_SPRD=y
CONFIG_ARCH_THUNDER=y
+CONFIG_ARCH_THUNDER2=y
CONFIG_ARCH_UNIPHIER=y
CONFIG_ARCH_VEXPRESS=y
CONFIG_ARCH_VULCAN=y
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/3] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
2017-01-20 20:46 ` [PATCH 2/3] dt-bindings: arm64 ARCH_THUNDER2 platform documentation Jayachandran C
@ 2017-01-23 16:28 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2017-01-23 16:28 UTC (permalink / raw)
To: Jayachandran C
Cc: linux-arm-kernel, Catalin Marinas, Will Deacon, Arnd Bergmann,
linux-kernel, david.daney, devicetree
On Fri, Jan 20, 2017 at 08:46:40PM +0000, Jayachandran C wrote:
> Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
> The processor core will use cavium,thunder2 as ID and the SoC will use
> cavium,thunder-99xx
>
> Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
> ---
> Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 5 +++++
> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> 2 files changed, 6 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 5+ messages in thread
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2017-01-20 20:46 [PATCH 0/3] arm64: Add ARCH_THUNDER2 Jayachandran C
2017-01-20 20:46 ` [PATCH 1/3] arm64: add THUNDER2 processor family Jayachandran C
2017-01-20 20:46 ` [PATCH 2/3] dt-bindings: arm64 ARCH_THUNDER2 platform documentation Jayachandran C
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