From: Andrzej Hajda <a.hajda@samsung.com>
To: Inki Dae <inki.dae@samsung.com>,
dri-devel@lists.freedesktop.org,
Krzysztof Kozlowski <krzk@kernel.org>
Cc: Andrzej Hajda <a.hajda@samsung.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
Marek Szyprowski <m.szyprowski@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org
Subject: [PATCH v2 7/7] arm64: dts: exynos: configure TV path clocks for Ultra HD modes
Date: Mon, 23 Jan 2017 08:56:15 +0100 [thread overview]
Message-ID: <1485158175-22342-1-git-send-email-a.hajda@samsung.com> (raw)
In-Reply-To: <20170120145138.yhjngt2cxbikq32z@kozik-lap>
Ultra HD modes requires clock ticking at increased rate.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index f120d99..4d28e93 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -764,6 +764,17 @@
clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
"aclk_xiu_decon0x", "pclk_smmu_decon0x",
"sclk_decon_vclk", "sclk_decon_eclk";
+ assigned-clocks =
+ <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
+ <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
+ <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
+ <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
+ assigned-clock-parents =
+ <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
+ <0>,
+ <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
+ <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
+ assigned-clock-rates = <0>, <400000000>;
samsung,disp-sysreg = <&syscon_disp>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
--
2.7.4
next prev parent reply other threads:[~2017-01-23 7:56 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20170120065229eucas1p22f0eed53220820b1145294029d4bd706@eucas1p2.samsung.com>
2017-01-20 6:52 ` [PATCH 0/7] drm/exynos: add Ultra HD and interlace modes support to Exynos5433 Andrzej Hajda
[not found] ` <CGME20170120065229eucas1p173d2b1844498dd3afdd9d2860cd1ee93@eucas1p1.samsung.com>
2017-01-20 6:52 ` [PATCH 1/7] drm/exynos/hdmi: add 297MHz pixel clock support Andrzej Hajda
[not found] ` <CGME20170120065230eucas1p20a73a6911158fb6eb2f2d2b22db36aba@eucas1p2.samsung.com>
2017-01-20 6:52 ` [PATCH 2/7] drm/exynos/hdmi: fix VSI infoframe registers Andrzej Hajda
[not found] ` <CGME20170120065230eucas1p1839ddd9b5fefa265ad5feab59e67fd2a@eucas1p1.samsung.com>
2017-01-20 6:52 ` [PATCH 3/7] drm/exynos/hdmi: fix PLL for 27MHz settings Andrzej Hajda
[not found] ` <CGME20170120065230eucas1p2e22f7b832ec7e1c770c3e8a27a3341f5@eucas1p2.samsung.com>
2017-01-20 6:52 ` [PATCH 4/7] drm/exynos/hdmi: add bridge support Andrzej Hajda
2017-02-01 7:31 ` Inki Dae
2017-02-01 7:34 ` Andrzej Hajda
2017-02-01 7:44 ` Inki Dae
2017-02-01 8:12 ` Andrzej Hajda
2017-02-01 8:17 ` Inki Dae
[not found] ` <CGME20170201082940eucas1p1f19e15328a787d6b77cba97bad92afce@eucas1p1.samsung.com>
2017-02-01 8:29 ` [PATCH v3 " Andrzej Hajda
2017-02-03 6:38 ` Inki Dae
2017-02-03 6:39 ` Inki Dae
[not found] ` <CGME20170120065231eucas1p23fa4730d36c855bc441ba23411ab6ffd@eucas1p2.samsung.com>
2017-01-20 6:52 ` [PATCH 5/7] drm/exynos/decon5433: add support for interlace modes Andrzej Hajda
[not found] ` <CGME20170120065231eucas1p121d2a987695fdce00e1b2bba445f1818@eucas1p1.samsung.com>
2017-01-20 6:52 ` [PATCH 6/7] drm/exynos/decon5433: signal vblank only on odd fields Andrzej Hajda
2017-01-20 13:55 ` Ville Syrjälä
2017-01-23 9:15 ` Andrzej Hajda
2017-01-25 14:06 ` Ville Syrjälä
2017-01-26 8:22 ` Andrzej Hajda
2017-01-26 10:42 ` Ville Syrjälä
[not found] ` <CGME20170120065232eucas1p170340d5a71e89db7c08d7218adbe4c2c@eucas1p1.samsung.com>
2017-01-20 6:52 ` [PATCH 7/7] arm64: dts: exynos: configure TV path clocks for Ultra HD modes Andrzej Hajda
2017-01-20 14:51 ` Krzysztof Kozlowski
[not found] ` <CGME20170123075623eucas1p19a1edd12eec91abdbbf786b308f65051@eucas1p1.samsung.com>
2017-01-23 7:56 ` Andrzej Hajda [this message]
2017-01-23 9:08 ` [PATCH v2 " Marek Szyprowski
[not found] ` <CGME20170123100557eucas1p28174748d64c4e8503a2006a9c5b554a6@eucas1p2.samsung.com>
2017-01-23 10:05 ` [PATCH v3 " Andrzej Hajda
2017-01-23 16:35 ` Krzysztof Kozlowski
2017-01-20 14:49 ` [PATCH 0/7] drm/exynos: add Ultra HD and interlace modes support to Exynos5433 Krzysztof Kozlowski
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