From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux-foundation.org>
Cc: <bp@alien8.de>, <peterz@infradead.org>, <joro@8bytes.org>,
<mingo@redhat.com>,
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Subject: [PATCH v12 05/10] iommu/amd: Introduce amd_iommu_get_num_iommus()
Date: Wed, 22 Mar 2017 02:02:37 -0500 [thread overview]
Message-ID: <1490166162-10002-6-git-send-email-Suravee.Suthikulpanit@amd.com> (raw)
In-Reply-To: <1490166162-10002-1-git-send-email-Suravee.Suthikulpanit@amd.com>
Introduce amd_iommu_get_num_iommus(), which returns the value of
amd_iommus_present. The function is used to replace direct access to
the variable, which is now declared as static.
This function will also be used by Perf AMD IOMMU driver.
Cc: Borislav Petkov <bp@alien8.de>
Cc: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
---
arch/x86/events/amd/iommu.h | 2 ++
drivers/iommu/amd_iommu.c | 6 +++---
drivers/iommu/amd_iommu_init.c | 11 +++++++++--
drivers/iommu/amd_iommu_proto.h | 1 +
drivers/iommu/amd_iommu_types.h | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/arch/x86/events/amd/iommu.h b/arch/x86/events/amd/iommu.h
index 845d173..5c5c932 100644
--- a/arch/x86/events/amd/iommu.h
+++ b/arch/x86/events/amd/iommu.h
@@ -28,6 +28,8 @@
#define IOMMU_BASE_DEVID 0x0000
/* amd_iommu_init.c external support functions */
+extern int amd_iommu_get_num_iommus(void);
+
extern bool amd_iommu_pc_supported(void);
extern u8 amd_iommu_pc_get_max_banks(u16 devid);
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 98940d1..5d4dd94 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -1234,7 +1234,7 @@ static void __domain_flush_pages(struct protection_domain *domain,
build_inv_iommu_pages(&cmd, address, size, domain->id, pde);
- for (i = 0; i < amd_iommus_present; ++i) {
+ for (i = 0; i < amd_iommu_get_num_iommus(); ++i) {
if (!domain->dev_iommu[i])
continue;
@@ -1278,7 +1278,7 @@ static void domain_flush_complete(struct protection_domain *domain)
{
int i;
- for (i = 0; i < amd_iommus_present; ++i) {
+ for (i = 0; i < amd_iommu_get_num_iommus(); ++i) {
if (domain && !domain->dev_iommu[i])
continue;
@@ -3363,7 +3363,7 @@ static int __flush_pasid(struct protection_domain *domain, int pasid,
* IOMMU TLB needs to be flushed before Device TLB to
* prevent device TLB refill from IOMMU TLB
*/
- for (i = 0; i < amd_iommus_present; ++i) {
+ for (i = 0; i < amd_iommu_get_num_iommus(); ++i) {
if (domain->dev_iommu[i] == 0)
continue;
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index ce65a47..d3ec9c3 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -167,7 +167,9 @@ struct ivmd_header {
/* Array to assign indices to IOMMUs*/
struct amd_iommu *amd_iommus[MAX_IOMMUS];
-int amd_iommus_present;
+
+/* Number of IOMMUs present in the system */
+static int amd_iommus_present;
/* IOMMUs have a non-present cache? */
bool amd_iommu_np_cache __read_mostly;
@@ -272,6 +274,11 @@ static inline unsigned long tbl_size(int entry_size)
return 1UL << shift;
}
+int amd_iommu_get_num_iommus(void)
+{
+ return amd_iommus_present;
+}
+
/* Access to l1 and l2 indexed register spaces */
static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address)
@@ -1336,7 +1343,7 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
/* Add IOMMU to internal data structures */
list_add_tail(&iommu->list, &amd_iommu_list);
- iommu->index = amd_iommus_present++;
+ iommu->index = amd_iommus_present++;
if (unlikely(iommu->index >= MAX_IOMMUS)) {
WARN(1, "AMD-Vi: System has more IOMMUs than supported by this driver\n");
diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h
index 7eb60c1..e8f0710 100644
--- a/drivers/iommu/amd_iommu_proto.h
+++ b/drivers/iommu/amd_iommu_proto.h
@@ -21,6 +21,7 @@
#include "amd_iommu_types.h"
+extern int amd_iommu_get_num_iommus(void);
extern int amd_iommu_init_dma_ops(void);
extern int amd_iommu_init_passthrough(void);
extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index 003f3ce..4de8f41 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -611,9 +611,6 @@ struct devid_map {
*/
extern struct amd_iommu *amd_iommus[MAX_IOMMUS];
-/* Number of IOMMUs present in the system */
-extern int amd_iommus_present;
-
/*
* Declarations for the global list of all protection domains
*/
--
1.8.3.1
next prev parent reply other threads:[~2017-03-22 7:04 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-22 7:02 [PATCH v12 00/10] perf/amd/iommu: Enable multi-IOMMU support Suravee Suthikulpanit
2017-03-22 7:02 ` [PATCH v12 01/10] perf/amd/iommu: Declare pr_fmt and remove unnecessary pr_debug Suravee Suthikulpanit
2017-03-22 7:02 ` [PATCH v12 02/10] perf/amd/iommu: Clean up bitwise operations Suravee Suthikulpanit
2017-03-22 7:02 ` [PATCH v12 03/10] perf/amd/iommu: Clean up perf_iommu_read() Suravee Suthikulpanit
2017-03-22 7:02 ` [PATCH v12 04/10] iommu/amd: Clean up iommu_pc_get_set_reg() Suravee Suthikulpanit
2017-03-22 7:02 ` Suravee Suthikulpanit [this message]
2017-03-22 7:02 ` [PATCH v12 06/10] perf/amd/iommu: Modify functions to query max banks and counters Suravee Suthikulpanit
2017-03-22 7:02 ` [PATCH v12 07/10] perf/amd/iommu: Modify amd_iommu_pc_get_set_reg_val() to allow specifying IOMMU Suravee Suthikulpanit
2017-03-22 7:02 ` [PATCH v12 08/10] perf/amd/iommu: Fix sysfs perf attribute groups Suravee Suthikulpanit
2017-03-22 7:02 ` [PATCH v12 09/10] perf/amd/iommu: Introduce amd_iommu-specific struct in struct hw_perf_event Suravee Suthikulpanit
2017-03-24 17:53 ` Borislav Petkov
2017-03-22 7:02 ` [PATCH v12 10/10] perf/amd/iommu: Enable support for multiple IOMMUs Suravee Suthikulpanit
2017-03-30 8:39 ` [tip:perf/core] x86/events/amd/iommu: " tip-bot for Suravee Suthikulpanit
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