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From: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
To: mpe@ellerman.id.au
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	benh@kernel.crashing.org, paulus@samba.org,
	sukadev@linux.vnet.ibm.com, andrew.donnellan@au1.ibm.com,
	peterz@infradead.org, mingo@redhat.com, acme@kernel.org,
	alexander.shishkin@linux.intel.com, wangnan0@huawei.com,
	ast@kernel.org, eranian@google.com,
	Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Subject: [PATCH v3 6/6] powerpc/perf: Add Power8 mem_access event to sysfs
Date: Tue, 11 Apr 2017 07:21:10 +0530	[thread overview]
Message-ID: <1491875470-17904-7-git-send-email-maddy@linux.vnet.ibm.com> (raw)
In-Reply-To: <1491875470-17904-1-git-send-email-maddy@linux.vnet.ibm.com>

Patch add "mem_access" event to sysfs. This as-is not a raw event
supported by Power8 pmu. Instead, it is formed based on
raw event encoding specificed in isa207-common.h.

Primary PMU event used here is PM_MRK_INST_CMPL.
This event tracks only the completed marked instructions.

Random sampling mode (MMCRA[SM]) with Random Instruction
Sampling (RIS) is enabled to mark type of instructions.

With Random sampling in RLS mode with PM_MRK_INST_CMPL event,
the LDST /DATA_SRC fields in SIER identifies the memory
hierarchy level (eg: L1, L2 etc) statisfied a data-cache
miss for a marked instruction.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
---
 arch/powerpc/perf/power8-events-list.h | 6 ++++++
 arch/powerpc/perf/power8-pmu.c         | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/arch/powerpc/perf/power8-events-list.h b/arch/powerpc/perf/power8-events-list.h
index 3a2e6e8ebb92..0f1d184627cc 100644
--- a/arch/powerpc/perf/power8-events-list.h
+++ b/arch/powerpc/perf/power8-events-list.h
@@ -89,3 +89,9 @@ EVENT(PM_MRK_FILT_MATCH,			0x2013c)
 EVENT(PM_MRK_FILT_MATCH_ALT,			0x3012e)
 /* Alternate event code for PM_LD_MISS_L1 */
 EVENT(PM_LD_MISS_L1_ALT,			0x400f0)
+/*
+ * Memory Access Event -- mem_access
+ * Primary PMU event used here is PM_MRK_INST_CMPL, along with
+ * Random Load/Store Facility Sampling (RIS) in Random sampling mode (MMCRA[SM]).
+ */
+EVENT(MEM_ACCESS,				0x10401e0)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 932d7536f0eb..5463516e369b 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -90,6 +90,7 @@ GENERIC_EVENT_ATTR(branch-instructions,		PM_BRU_FIN);
 GENERIC_EVENT_ATTR(branch-misses,		PM_BR_MPRED_CMPL);
 GENERIC_EVENT_ATTR(cache-references,		PM_LD_REF_L1);
 GENERIC_EVENT_ATTR(cache-misses,		PM_LD_MISS_L1);
+GENERIC_EVENT_ATTR(mem_access,			MEM_ACCESS);
 
 CACHE_EVENT_ATTR(L1-dcache-load-misses,		PM_LD_MISS_L1);
 CACHE_EVENT_ATTR(L1-dcache-loads,		PM_LD_REF_L1);
@@ -120,6 +121,7 @@ static struct attribute *power8_events_attr[] = {
 	GENERIC_EVENT_PTR(PM_BR_MPRED_CMPL),
 	GENERIC_EVENT_PTR(PM_LD_REF_L1),
 	GENERIC_EVENT_PTR(PM_LD_MISS_L1),
+	GENERIC_EVENT_PTR(MEM_ACCESS),
 
 	CACHE_EVENT_PTR(PM_LD_MISS_L1),
 	CACHE_EVENT_PTR(PM_LD_REF_L1),
-- 
2.7.4

  parent reply	other threads:[~2017-04-11  1:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-11  1:51 [PATCH v3 0/6] powerpc/perf: Export memory hierarchy level Madhavan Srinivasan
2017-04-11  1:51 ` [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan
2017-04-13 12:38   ` Peter Zijlstra
2017-04-13 13:23     ` Michael Ellerman
2017-04-17  3:46       ` Madhavan Srinivasan
2017-04-17  3:46     ` Madhavan Srinivasan
2017-04-19  4:50     ` Michael Ellerman
2017-04-19 14:32       ` Madhavan Srinivasan
2017-04-19 22:16         ` Michael Ellerman
2017-04-19 22:04   ` [v3, " Michael Ellerman
2017-04-11  1:51 ` [PATCH v3 2/6] powerpc/perf: Export memory hierarchy info to user space Madhavan Srinivasan
2017-04-11  1:51 ` [PATCH v3 3/6] powerpc/perf: Support to export MMCRA[TEC*] field to userspace Madhavan Srinivasan
2017-04-11  1:51 ` [PATCH v3 4/6] powerpc/perf: Support to export SIERs bit in Power8 Madhavan Srinivasan
2017-04-11  1:51 ` [PATCH v3 5/6] powerpc/perf: Support to export SIERs bit in Power9 Madhavan Srinivasan
2017-04-11  1:51 ` Madhavan Srinivasan [this message]
  -- strict thread matches above, loose matches on Subject: below --
2017-03-23  3:26 [PATCH v3 0/6] powerpc/perf: Export memory hierarchy level Madhavan Srinivasan
2017-03-23  3:26 ` [PATCH v3 6/6] powerpc/perf: Add Power8 mem_access event to sysfs Madhavan Srinivasan

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