* [PATCH 00/14] staging: ccree: coding style fixes
@ 2017-06-27 7:27 Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 01/14] staging: ccree: fix missing or redundant spaces Gilad Ben-Yossef
` (13 more replies)
0 siblings, 14 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Fix a bunch of coding style across the whole ccree driver
Gilad Ben-Yossef (14):
staging: ccree: fix missing or redundant spaces
staging: ccree: drop comparsion to true/false
staging: ccree: fix else placement
staging: ccree: remove redundant blank lines
staging: ccree: no need for braces for single statements
staging: ccree: fix unmatched if/else braces
staging: ccree: remove comparisons to NULL
staging: ccree: fix pointer location
staging: ccree: remove custom type tdes_keys_t
staging: ccree: remove custom type ssi_fips_error_t
staging: ccree: remove custom type ssi_fips_state_t
staging: ccree: remove unused type CCFipsSyncStatus_t
staging: ccree: remove/add (un)needed blank lines
staging: ccree: fix block comment style
drivers/staging/ccree/Kconfig | 2 +-
drivers/staging/ccree/cc_hw_queue_defs.h | 8 +-
drivers/staging/ccree/ssi_aead.c | 142 ++++++---------
drivers/staging/ccree/ssi_aead.h | 20 +-
drivers/staging/ccree/ssi_buffer_mgr.c | 301 +++++++++++++++----------------
drivers/staging/ccree/ssi_buffer_mgr.h | 1 -
drivers/staging/ccree/ssi_cipher.c | 124 +++++--------
drivers/staging/ccree/ssi_cipher.h | 6 -
drivers/staging/ccree/ssi_driver.c | 50 +++--
drivers/staging/ccree/ssi_driver.h | 4 +-
drivers/staging/ccree/ssi_fips.c | 16 +-
drivers/staging/ccree/ssi_fips.h | 15 +-
drivers/staging/ccree/ssi_fips_data.h | 20 +-
drivers/staging/ccree/ssi_fips_ext.c | 20 +-
drivers/staging/ccree/ssi_fips_ll.c | 101 +++++------
drivers/staging/ccree/ssi_fips_local.c | 107 +++++------
drivers/staging/ccree/ssi_fips_local.h | 20 +-
drivers/staging/ccree/ssi_hash.c | 101 +++++------
drivers/staging/ccree/ssi_hash.h | 6 +-
drivers/staging/ccree/ssi_ivgen.c | 9 +-
drivers/staging/ccree/ssi_ivgen.h | 1 -
drivers/staging/ccree/ssi_pm.c | 25 +--
drivers/staging/ccree/ssi_pm.h | 5 +-
drivers/staging/ccree/ssi_request_mgr.c | 102 +++++------
drivers/staging/ccree/ssi_request_mgr.h | 6 +-
drivers/staging/ccree/ssi_sram_mgr.c | 4 +-
drivers/staging/ccree/ssi_sram_mgr.h | 1 -
drivers/staging/ccree/ssi_sysfs.c | 66 ++++---
drivers/staging/ccree/ssi_sysfs.h | 1 +
29 files changed, 550 insertions(+), 734 deletions(-)
--
2.1.4
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 01/14] staging: ccree: fix missing or redundant spaces
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 02/14] staging: ccree: drop comparsion to true/false Gilad Ben-Yossef
` (12 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Add and/or remove redundant and/or missing spaces in ccree source
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/Kconfig | 2 +-
drivers/staging/ccree/ssi_aead.c | 38 ++++----
drivers/staging/ccree/ssi_aead.h | 12 +--
drivers/staging/ccree/ssi_buffer_mgr.c | 158 ++++++++++++++++----------------
drivers/staging/ccree/ssi_cipher.c | 44 ++++-----
drivers/staging/ccree/ssi_driver.c | 18 ++--
drivers/staging/ccree/ssi_driver.h | 4 +-
drivers/staging/ccree/ssi_fips_data.h | 12 +--
drivers/staging/ccree/ssi_fips_ll.c | 12 +--
drivers/staging/ccree/ssi_fips_local.c | 8 +-
drivers/staging/ccree/ssi_fips_local.h | 18 ++--
drivers/staging/ccree/ssi_hash.c | 38 ++++----
drivers/staging/ccree/ssi_pm.c | 16 ++--
drivers/staging/ccree/ssi_pm.h | 2 +-
drivers/staging/ccree/ssi_request_mgr.c | 62 ++++++-------
drivers/staging/ccree/ssi_request_mgr.h | 6 +-
drivers/staging/ccree/ssi_sysfs.c | 56 +++++------
17 files changed, 253 insertions(+), 253 deletions(-)
diff --git a/drivers/staging/ccree/Kconfig b/drivers/staging/ccree/Kconfig
index ec3749d..36a87c6 100644
--- a/drivers/staging/ccree/Kconfig
+++ b/drivers/staging/ccree/Kconfig
@@ -18,7 +18,7 @@ config CRYPTO_DEV_CCREE
select CRYPTO_CTR
select CRYPTO_XTS
help
- Say 'Y' to enable a driver for the Arm TrustZone CryptoCell
+ Say 'Y' to enable a driver for the Arm TrustZone CryptoCell
C7xx. Currently only the CryptoCell 712 REE is supported.
Choose this if you wish to use hardware acceleration of
cryptographic operations on the system REE.
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index c70e450..2e8dc3f 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -238,8 +238,8 @@ static void ssi_aead_complete(struct device *dev, void *ssi_req, void __iomem *c
} else { /*ENCRYPT*/
if (unlikely(areq_ctx->is_icv_fragmented == true))
ssi_buffer_mgr_copy_scatterlist_portion(
- areq_ctx->mac_buf, areq_ctx->dstSgl, areq->cryptlen+areq_ctx->dstOffset,
- areq->cryptlen+areq_ctx->dstOffset + ctx->authsize, SSI_SG_FROM_BUF);
+ areq_ctx->mac_buf, areq_ctx->dstSgl, areq->cryptlen + areq_ctx->dstOffset,
+ areq->cryptlen + areq_ctx->dstOffset + ctx->authsize, SSI_SG_FROM_BUF);
/* If an IV was generated, copy it back to the user provided buffer. */
if (areq_ctx->backup_giv != NULL) {
@@ -1561,7 +1561,7 @@ static int config_ccm_adata(struct aead_request *req)
(req->cryptlen - ctx->authsize);
int rc;
memset(req_ctx->mac_buf, 0, AES_BLOCK_SIZE);
- memset(req_ctx->ccm_config, 0, AES_BLOCK_SIZE*3);
+ memset(req_ctx->ccm_config, 0, AES_BLOCK_SIZE * 3);
/* taken from crypto/ccm.c */
/* 2 <= L <= 8, so 1 <= L' <= 7. */
@@ -1585,12 +1585,12 @@ static int config_ccm_adata(struct aead_request *req)
/* END of "taken from crypto/ccm.c" */
/* l(a) - size of associated data. */
- req_ctx->ccm_hdr_size = format_ccm_a0 (a0, req->assoclen);
+ req_ctx->ccm_hdr_size = format_ccm_a0(a0, req->assoclen);
memset(req->iv + 15 - req->iv[0], 0, req->iv[0] + 1);
req->iv[15] = 1;
- memcpy(ctr_count_0, req->iv, AES_BLOCK_SIZE) ;
+ memcpy(ctr_count_0, req->iv, AES_BLOCK_SIZE);
ctr_count_0[15] = 0;
return 0;
@@ -1858,7 +1858,7 @@ static inline void ssi_aead_dump_gcm(
SSI_LOG_DEBUG("%s\n", title);
}
- SSI_LOG_DEBUG("cipher_mode %d, authsize %d, enc_keylen %d, assoclen %d, cryptlen %d \n", \
+ SSI_LOG_DEBUG("cipher_mode %d, authsize %d, enc_keylen %d, assoclen %d, cryptlen %d\n", \
ctx->cipher_mode, ctx->authsize, ctx->enc_keylen, req->assoclen, req_ctx->cryptlen);
if (ctx->enckey != NULL) {
@@ -1878,12 +1878,12 @@ static inline void ssi_aead_dump_gcm(
dump_byte_array("gcm_len_block", req_ctx->gcm_len_block.lenA, AES_BLOCK_SIZE);
if (req->src != NULL && req->cryptlen) {
- dump_byte_array("req->src", sg_virt(req->src), req->cryptlen+req->assoclen);
+ dump_byte_array("req->src", sg_virt(req->src), req->cryptlen + req->assoclen);
}
if (req->dst != NULL) {
- dump_byte_array("req->dst", sg_virt(req->dst), req->cryptlen+ctx->authsize+req->assoclen);
- }
+ dump_byte_array("req->dst", sg_virt(req->dst), req->cryptlen + ctx->authsize + req->assoclen);
+ }
}
#endif
@@ -1899,7 +1899,7 @@ static int config_gcm_context(struct aead_request *req)
(req->cryptlen - ctx->authsize);
__be32 counter = cpu_to_be32(2);
- SSI_LOG_DEBUG("config_gcm_context() cryptlen = %d, req->assoclen = %d ctx->authsize = %d \n", cryptlen, req->assoclen, ctx->authsize);
+ SSI_LOG_DEBUG("config_gcm_context() cryptlen = %d, req->assoclen = %d ctx->authsize = %d\n", cryptlen, req->assoclen, ctx->authsize);
memset(req_ctx->hkey, 0, AES_BLOCK_SIZE);
@@ -1916,15 +1916,15 @@ static int config_gcm_context(struct aead_request *req)
if (req_ctx->plaintext_authenticate_only == false) {
__be64 temp64;
temp64 = cpu_to_be64(req->assoclen * 8);
- memcpy (&req_ctx->gcm_len_block.lenA, &temp64, sizeof(temp64));
+ memcpy(&req_ctx->gcm_len_block.lenA, &temp64, sizeof(temp64));
temp64 = cpu_to_be64(cryptlen * 8);
- memcpy (&req_ctx->gcm_len_block.lenC, &temp64, 8);
+ memcpy(&req_ctx->gcm_len_block.lenC, &temp64, 8);
} else { //rfc4543=> all data(AAD,IV,Plain) are considered additional data that is nothing is encrypted.
__be64 temp64;
- temp64 = cpu_to_be64((req->assoclen+GCM_BLOCK_RFC4_IV_SIZE+cryptlen) * 8);
- memcpy (&req_ctx->gcm_len_block.lenA, &temp64, sizeof(temp64));
+ temp64 = cpu_to_be64((req->assoclen + GCM_BLOCK_RFC4_IV_SIZE + cryptlen) * 8);
+ memcpy(&req_ctx->gcm_len_block.lenA, &temp64, sizeof(temp64));
temp64 = 0;
- memcpy (&req_ctx->gcm_len_block.lenC, &temp64, 8);
+ memcpy(&req_ctx->gcm_len_block.lenC, &temp64, 8);
}
return 0;
@@ -2220,7 +2220,7 @@ static int ssi_rfc4106_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsign
struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
int rc = 0;
- SSI_LOG_DEBUG("ssi_rfc4106_gcm_setkey() keylen %d, key %p \n", keylen, key);
+ SSI_LOG_DEBUG("ssi_rfc4106_gcm_setkey() keylen %d, key %p\n", keylen, key);
if (keylen < 4)
return -EINVAL;
@@ -2238,7 +2238,7 @@ static int ssi_rfc4543_gcm_setkey(struct crypto_aead *tfm, const u8 *key, unsign
struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
int rc = 0;
- SSI_LOG_DEBUG("ssi_rfc4543_gcm_setkey() keylen %d, key %p \n", keylen, key);
+ SSI_LOG_DEBUG("ssi_rfc4543_gcm_setkey() keylen %d, key %p\n", keylen, key);
if (keylen < 4)
return -EINVAL;
@@ -2273,7 +2273,7 @@ static int ssi_gcm_setauthsize(struct crypto_aead *authenc,
static int ssi_rfc4106_gcm_setauthsize(struct crypto_aead *authenc,
unsigned int authsize)
{
- SSI_LOG_DEBUG("ssi_rfc4106_gcm_setauthsize() authsize %d \n", authsize);
+ SSI_LOG_DEBUG("ssi_rfc4106_gcm_setauthsize() authsize %d\n", authsize);
switch (authsize) {
case 8:
@@ -2290,7 +2290,7 @@ static int ssi_rfc4106_gcm_setauthsize(struct crypto_aead *authenc,
static int ssi_rfc4543_gcm_setauthsize(struct crypto_aead *authenc,
unsigned int authsize)
{
- SSI_LOG_DEBUG("ssi_rfc4543_gcm_setauthsize() authsize %d \n", authsize);
+ SSI_LOG_DEBUG("ssi_rfc4543_gcm_setauthsize() authsize %d\n", authsize);
if (authsize != 16)
return -EINVAL;
diff --git a/drivers/staging/ccree/ssi_aead.h b/drivers/staging/ccree/ssi_aead.h
index 00a3680..07cab84 100644
--- a/drivers/staging/ccree/ssi_aead.h
+++ b/drivers/staging/ccree/ssi_aead.h
@@ -28,17 +28,17 @@
/* mac_cmp - HW writes 8 B but all bytes hold the same value */
#define ICV_CMP_SIZE 8
-#define CCM_CONFIG_BUF_SIZE (AES_BLOCK_SIZE*3)
+#define CCM_CONFIG_BUF_SIZE (AES_BLOCK_SIZE * 3)
#define MAX_MAC_SIZE MAX(SHA256_DIGEST_SIZE, AES_BLOCK_SIZE)
/* defines for AES GCM configuration buffer */
#define GCM_BLOCK_LEN_SIZE 8
-#define GCM_BLOCK_RFC4_IV_OFFSET 4
-#define GCM_BLOCK_RFC4_IV_SIZE 8 /* IV size for rfc's */
-#define GCM_BLOCK_RFC4_NONCE_OFFSET 0
-#define GCM_BLOCK_RFC4_NONCE_SIZE 4
+#define GCM_BLOCK_RFC4_IV_OFFSET 4
+#define GCM_BLOCK_RFC4_IV_SIZE 8 /* IV size for rfc's */
+#define GCM_BLOCK_RFC4_NONCE_OFFSET 0
+#define GCM_BLOCK_RFC4_NONCE_SIZE 4
@@ -74,7 +74,7 @@ struct aead_req_ctx {
u8 hkey[AES_BLOCK_SIZE] ____cacheline_aligned;
struct {
u8 lenA[GCM_BLOCK_LEN_SIZE] ____cacheline_aligned;
- u8 lenC[GCM_BLOCK_LEN_SIZE] ;
+ u8 lenC[GCM_BLOCK_LEN_SIZE];
} gcm_len_block;
u8 ccm_config[CCM_CONFIG_BUF_SIZE] ____cacheline_aligned;
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index 4373d1d..00d95c1 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -83,14 +83,14 @@ static unsigned int ssi_buffer_mgr_get_sgl_nents(
while (nbytes != 0) {
if (sg_is_chain(sg_list)) {
SSI_LOG_ERR("Unexpected chained entry "
- "in sg (entry =0x%X) \n", nents);
+ "in sg (entry =0x%X)\n", nents);
BUG();
}
if (sg_list->length != 0) {
nents++;
/* get the number of bytes in the last entry */
*lbytes = nbytes;
- nbytes -= ( sg_list->length > nbytes ) ? nbytes : sg_list->length;
+ nbytes -= (sg_list->length > nbytes) ? nbytes : sg_list->length;
sg_list = sg_next(sg_list);
} else {
sg_list = (struct scatterlist *)sg_page(sg_list);
@@ -99,7 +99,7 @@ static unsigned int ssi_buffer_mgr_get_sgl_nents(
}
}
}
- SSI_LOG_DEBUG("nents %d last bytes %d\n",nents, *lbytes);
+ SSI_LOG_DEBUG("nents %d last bytes %d\n", nents, *lbytes);
return nents;
}
@@ -154,16 +154,16 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli(
u32 new_nents;;
/* Verify there is no memory overflow*/
- new_nents = (*curr_nents + buff_size/CC_MAX_MLLI_ENTRY_SIZE + 1);
- if (new_nents > MAX_NUM_OF_TOTAL_MLLI_ENTRIES ) {
+ new_nents = (*curr_nents + buff_size / CC_MAX_MLLI_ENTRY_SIZE + 1);
+ if (new_nents > MAX_NUM_OF_TOTAL_MLLI_ENTRIES) {
return -ENOMEM;
}
/*handle buffer longer than 64 kbytes */
- while (buff_size > CC_MAX_MLLI_ENTRY_SIZE ) {
+ while (buff_size > CC_MAX_MLLI_ENTRY_SIZE) {
cc_lli_set_addr(mlli_entry_p, buff_dma);
cc_lli_set_size(mlli_entry_p, CC_MAX_MLLI_ENTRY_SIZE);
- SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n",*curr_nents,
+ SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n", *curr_nents,
mlli_entry_p[LLI_WORD0_OFFSET],
mlli_entry_p[LLI_WORD1_OFFSET]);
buff_dma += CC_MAX_MLLI_ENTRY_SIZE;
@@ -174,7 +174,7 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli(
/*Last entry */
cc_lli_set_addr(mlli_entry_p, buff_dma);
cc_lli_set_size(mlli_entry_p, buff_size);
- SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n",*curr_nents,
+ SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n", *curr_nents,
mlli_entry_p[LLI_WORD0_OFFSET],
mlli_entry_p[LLI_WORD1_OFFSET]);
mlli_entry_p = mlli_entry_p + 2;
@@ -196,15 +196,15 @@ static inline int ssi_buffer_mgr_render_scatterlist_to_mlli(
curr_sgl = sg_next(curr_sgl)) {
u32 entry_data_len =
(sgl_data_len > sg_dma_len(curr_sgl) - sglOffset) ?
- sg_dma_len(curr_sgl) - sglOffset : sgl_data_len ;
+ sg_dma_len(curr_sgl) - sglOffset : sgl_data_len;
sgl_data_len -= entry_data_len;
rc = ssi_buffer_mgr_render_buff_to_mlli(
sg_dma_address(curr_sgl) + sglOffset, entry_data_len, curr_nents,
&mlli_entry_p);
- if(rc != 0) {
+ if (rc != 0) {
return rc;
}
- sglOffset=0;
+ sglOffset = 0;
}
*mlli_entry_pp = mlli_entry_p;
return 0;
@@ -216,7 +216,7 @@ static int ssi_buffer_mgr_generate_mlli(
struct mlli_params *mlli_params)
{
u32 *mlli_p;
- u32 total_nents = 0,prev_total_nents = 0;
+ u32 total_nents = 0, prev_total_nents = 0;
int rc = 0, i;
SSI_LOG_DEBUG("NUM of SG's = %d\n", sg_data->num_of_buffers);
@@ -227,7 +227,7 @@ static int ssi_buffer_mgr_generate_mlli(
&(mlli_params->mlli_dma_addr));
if (unlikely(mlli_params->mlli_virt_addr == NULL)) {
SSI_LOG_ERR("dma_pool_alloc() failed\n");
- rc =-ENOMEM;
+ rc = -ENOMEM;
goto build_mlli_exit;
}
/* Point to start of MLLI */
@@ -244,7 +244,7 @@ static int ssi_buffer_mgr_generate_mlli(
sg_data->entry[i].buffer_dma,
sg_data->total_data_len[i], &total_nents,
&mlli_p);
- if(rc != 0) {
+ if (rc != 0) {
return rc;
}
@@ -323,13 +323,13 @@ static int
ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
enum dma_data_direction direction)
{
- u32 i , j;
+ u32 i, j;
struct scatterlist *l_sg = sg;
for (i = 0; i < nents; i++) {
if (l_sg == NULL) {
break;
}
- if (unlikely(dma_map_sg(dev, l_sg, 1, direction) != 1)){
+ if (unlikely(dma_map_sg(dev, l_sg, 1, direction) != 1)) {
SSI_LOG_ERR("dma_map_page() sg buffer failed\n");
goto err;
}
@@ -343,7 +343,7 @@ ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
if (sg == NULL) {
break;
}
- dma_unmap_sg(dev,sg,1,direction);
+ dma_unmap_sg(dev, sg, 1, direction);
sg = sg_next(sg);
}
return 0;
@@ -387,7 +387,7 @@ static int ssi_buffer_mgr_map_scatterlist(
* be changed from the original sgl nents
*/
*mapped_nents = dma_map_sg(dev, sg, *nents, direction);
- if (unlikely(*mapped_nents == 0)){
+ if (unlikely(*mapped_nents == 0)) {
*nents = 0;
SSI_LOG_ERR("dma_map_sg() sg buffer failed\n");
return -ENOMEM;
@@ -400,7 +400,7 @@ static int ssi_buffer_mgr_map_scatterlist(
sg,
*nents,
direction);
- if (unlikely(*mapped_nents != *nents)){
+ if (unlikely(*mapped_nents != *nents)) {
*nents = *mapped_nents;
SSI_LOG_ERR("dma_map_sg() sg buffer failed\n");
return -ENOMEM;
@@ -418,7 +418,7 @@ ssi_aead_handle_config_buf(struct device *dev,
struct buffer_array *sg_data,
unsigned int assoclen)
{
- SSI_LOG_DEBUG(" handle additional data config set to DLLI \n");
+ SSI_LOG_DEBUG(" handle additional data config set to DLLI\n");
/* create sg for the current buffer */
sg_init_one(&areq_ctx->ccm_adata_sg, config_data, AES_BLOCK_SIZE + areq_ctx->ccm_hdr_size);
if (unlikely(dma_map_sg(dev, &areq_ctx->ccm_adata_sg, 1,
@@ -453,9 +453,9 @@ static inline int ssi_ahash_handle_curr_buf(struct device *dev,
u32 curr_buff_cnt,
struct buffer_array *sg_data)
{
- SSI_LOG_DEBUG(" handle curr buff %x set to DLLI \n", curr_buff_cnt);
+ SSI_LOG_DEBUG(" handle curr buff %x set to DLLI\n", curr_buff_cnt);
/* create sg for the current buffer */
- sg_init_one(areq_ctx->buff_sg,curr_buff, curr_buff_cnt);
+ sg_init_one(areq_ctx->buff_sg, curr_buff, curr_buff_cnt);
if (unlikely(dma_map_sg(dev, areq_ctx->buff_sg, 1,
DMA_TO_DEVICE) != 1)) {
SSI_LOG_ERR("dma_map_sg() "
@@ -540,12 +540,12 @@ int ssi_buffer_mgr_map_blkcipher_request(
sg_data.num_of_buffers = 0;
/* Map IV buffer */
- if (likely(ivsize != 0) ) {
+ if (likely(ivsize != 0)) {
dump_byte_array("iv", (u8 *)info, ivsize);
req_ctx->gen_ctx.iv_dma_addr =
dma_map_single(dev, (void *)info,
ivsize,
- req_ctx->is_giv ? DMA_BIDIRECTIONAL:
+ req_ctx->is_giv ? DMA_BIDIRECTIONAL :
DMA_TO_DEVICE);
if (unlikely(dma_mapping_error(dev,
req_ctx->gen_ctx.iv_dma_addr))) {
@@ -581,7 +581,7 @@ int ssi_buffer_mgr_map_blkcipher_request(
} else {
/* Map the dst sg */
if (unlikely(ssi_buffer_mgr_map_scatterlist(
- dev,dst, nbytes,
+ dev, dst, nbytes,
DMA_BIDIRECTIONAL, &req_ctx->out_nents,
LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy,
&mapped_nents))){
@@ -606,7 +606,7 @@ int ssi_buffer_mgr_map_blkcipher_request(
if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) {
mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
- if (unlikely(rc!= 0))
+ if (unlikely(rc != 0))
goto ablkcipher_exit;
}
@@ -686,19 +686,19 @@ void ssi_buffer_mgr_unmap_aead_request(
areq_ctx->mlli_params.mlli_dma_addr);
}
- SSI_LOG_DEBUG("Unmapping src sgl: req->src=%pK areq_ctx->src.nents=%u areq_ctx->assoc.nents=%u assoclen:%u cryptlen=%u\n", sg_virt(req->src),areq_ctx->src.nents,areq_ctx->assoc.nents,req->assoclen,req->cryptlen);
- size_to_unmap = req->assoclen+req->cryptlen;
- if(areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT){
+ SSI_LOG_DEBUG("Unmapping src sgl: req->src=%pK areq_ctx->src.nents=%u areq_ctx->assoc.nents=%u assoclen:%u cryptlen=%u\n", sg_virt(req->src), areq_ctx->src.nents, areq_ctx->assoc.nents, req->assoclen, req->cryptlen);
+ size_to_unmap = req->assoclen + req->cryptlen;
+ if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT) {
size_to_unmap += areq_ctx->req_authsize;
}
if (areq_ctx->is_gcm4543)
size_to_unmap += crypto_aead_ivsize(tfm);
- dma_unmap_sg(dev, req->src, ssi_buffer_mgr_get_sgl_nents(req->src,size_to_unmap,&dummy,&chained) , DMA_BIDIRECTIONAL);
+ dma_unmap_sg(dev, req->src, ssi_buffer_mgr_get_sgl_nents(req->src, size_to_unmap, &dummy, &chained), DMA_BIDIRECTIONAL);
if (unlikely(req->src != req->dst)) {
SSI_LOG_DEBUG("Unmapping dst sgl: req->dst=%pK\n",
sg_virt(req->dst));
- dma_unmap_sg(dev, req->dst, ssi_buffer_mgr_get_sgl_nents(req->dst,size_to_unmap,&dummy,&chained),
+ dma_unmap_sg(dev, req->dst, ssi_buffer_mgr_get_sgl_nents(req->dst, size_to_unmap, &dummy, &chained),
DMA_BIDIRECTIONAL);
}
if (drvdata->coherent &&
@@ -714,8 +714,8 @@ void ssi_buffer_mgr_unmap_aead_request(
*/
ssi_buffer_mgr_copy_scatterlist_portion(
areq_ctx->backup_mac, req->src,
- size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
- size_to_skip+ req->cryptlen, SSI_SG_FROM_BUF);
+ size_to_skip + req->cryptlen - areq_ctx->req_authsize,
+ size_to_skip + req->cryptlen, SSI_SG_FROM_BUF);
}
}
@@ -736,7 +736,7 @@ static inline int ssi_buffer_mgr_get_aead_icv_nents(
return 0;
}
- for( i = 0 ; i < (sgl_nents - MAX_ICV_NENTS_SUPPORTED) ; i++) {
+ for (i = 0 ; i < (sgl_nents - MAX_ICV_NENTS_SUPPORTED) ; i++) {
if (sgl == NULL) {
break;
}
@@ -798,7 +798,7 @@ static inline int ssi_buffer_mgr_aead_chain_iv(
SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
hw_iv_size, req->iv,
(unsigned long long)areq_ctx->gen_ctx.iv_dma_addr);
- if (do_chain == true && areq_ctx->plaintext_authenticate_only == true){ // TODO: what about CTR?? ask Ron
+ if (do_chain == true && areq_ctx->plaintext_authenticate_only == true) { // TODO: what about CTR?? ask Ron
struct crypto_aead *tfm = crypto_aead_reqtfm(req);
unsigned int iv_size_to_authenc = crypto_aead_ivsize(tfm);
unsigned int iv_ofs = GCM_BLOCK_RFC4_IV_OFFSET;
@@ -858,7 +858,7 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
current_sg = sg_next(current_sg);
//if have reached the end of the sgl, then this is unexpected
if (current_sg == NULL) {
- SSI_LOG_ERR("reached end of sg list. unexpected \n");
+ SSI_LOG_ERR("reached end of sg list. unexpected\n");
BUG();
}
sg_index += current_sg->length;
@@ -923,7 +923,7 @@ static inline void ssi_buffer_mgr_prepare_aead_data_dlli(
if (likely(req->src == req->dst)) {
/*INPLACE*/
areq_ctx->icv_dma_addr = sg_dma_address(
- areq_ctx->srcSgl)+
+ areq_ctx->srcSgl) +
(*src_last_bytes - authsize);
areq_ctx->icv_virt_addr = sg_virt(
areq_ctx->srcSgl) +
@@ -942,7 +942,7 @@ static inline void ssi_buffer_mgr_prepare_aead_data_dlli(
areq_ctx->dstSgl) +
(*dst_last_bytes - authsize);
areq_ctx->icv_virt_addr = sg_virt(
- areq_ctx->dstSgl)+
+ areq_ctx->dstSgl) +
(*dst_last_bytes - authsize);
}
}
@@ -964,7 +964,7 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
/*INPLACE*/
ssi_buffer_mgr_add_scatterlist_entry(sg_data,
areq_ctx->src.nents, areq_ctx->srcSgl,
- areq_ctx->cryptlen,areq_ctx->srcOffset, is_last_table,
+ areq_ctx->cryptlen, areq_ctx->srcOffset, is_last_table,
&areq_ctx->src.mlli_nents);
icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->srcSgl,
@@ -1018,11 +1018,11 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
/*NON-INPLACE and DECRYPT*/
ssi_buffer_mgr_add_scatterlist_entry(sg_data,
areq_ctx->src.nents, areq_ctx->srcSgl,
- areq_ctx->cryptlen, areq_ctx->srcOffset,is_last_table,
+ areq_ctx->cryptlen, areq_ctx->srcOffset, is_last_table,
&areq_ctx->src.mlli_nents);
ssi_buffer_mgr_add_scatterlist_entry(sg_data,
areq_ctx->dst.nents, areq_ctx->dstSgl,
- areq_ctx->cryptlen,areq_ctx->dstOffset, is_last_table,
+ areq_ctx->cryptlen, areq_ctx->dstOffset, is_last_table,
&areq_ctx->dst.mlli_nents);
icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->srcSgl,
@@ -1044,8 +1044,8 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
}
ssi_buffer_mgr_copy_scatterlist_portion(
areq_ctx->backup_mac, req->src,
- size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
- size_to_skip+ req->cryptlen, SSI_SG_TO_BUF);
+ size_to_skip + req->cryptlen - areq_ctx->req_authsize,
+ size_to_skip + req->cryptlen, SSI_SG_TO_BUF);
areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
} else { /* Contig. ICV */
/*Should hanlde if the sg is not contig.*/
@@ -1061,11 +1061,11 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
/*NON-INPLACE and ENCRYPT*/
ssi_buffer_mgr_add_scatterlist_entry(sg_data,
areq_ctx->dst.nents, areq_ctx->dstSgl,
- areq_ctx->cryptlen,areq_ctx->dstOffset, is_last_table,
+ areq_ctx->cryptlen, areq_ctx->dstOffset, is_last_table,
&areq_ctx->dst.mlli_nents);
ssi_buffer_mgr_add_scatterlist_entry(sg_data,
areq_ctx->src.nents, areq_ctx->srcSgl,
- areq_ctx->cryptlen, areq_ctx->srcOffset,is_last_table,
+ areq_ctx->cryptlen, areq_ctx->srcOffset, is_last_table,
&areq_ctx->src.mlli_nents);
icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->dstSgl,
@@ -1108,7 +1108,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
int rc = 0;
u32 src_mapped_nents = 0, dst_mapped_nents = 0;
u32 offset = 0;
- unsigned int size_for_map = req->assoclen +req->cryptlen; /*non-inplace mode*/
+ unsigned int size_for_map = req->assoclen + req->cryptlen; /*non-inplace mode*/
struct crypto_aead *tfm = crypto_aead_reqtfm(req);
u32 sg_index = 0;
bool chained = false;
@@ -1130,8 +1130,8 @@ static inline int ssi_buffer_mgr_aead_chain_data(
size_for_map += crypto_aead_ivsize(tfm);
}
- size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize:0;
- src_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->src,size_for_map,&src_last_bytes, &chained);
+ size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0;
+ src_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->src, size_for_map, &src_last_bytes, &chained);
sg_index = areq_ctx->srcSgl->length;
//check where the data starts
while (sg_index <= size_to_skip) {
@@ -1139,7 +1139,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
areq_ctx->srcSgl = sg_next(areq_ctx->srcSgl);
//if have reached the end of the sgl, then this is unexpected
if (areq_ctx->srcSgl == NULL) {
- SSI_LOG_ERR("reached end of sg list. unexpected \n");
+ SSI_LOG_ERR("reached end of sg list. unexpected\n");
BUG();
}
sg_index += areq_ctx->srcSgl->length;
@@ -1157,7 +1157,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
areq_ctx->srcOffset = offset;
if (req->src != req->dst) {
- size_for_map = req->assoclen +req->cryptlen;
+ size_for_map = req->assoclen + req->cryptlen;
size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0;
if (is_gcm4543) {
size_for_map += crypto_aead_ivsize(tfm);
@@ -1173,7 +1173,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
}
}
- dst_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->dst,size_for_map,&dst_last_bytes, &chained);
+ dst_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->dst, size_for_map, &dst_last_bytes, &chained);
sg_index = areq_ctx->dstSgl->length;
offset = size_to_skip;
@@ -1184,7 +1184,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
areq_ctx->dstSgl = sg_next(areq_ctx->dstSgl);
//if have reached the end of the sgl, then this is unexpected
if (areq_ctx->dstSgl == NULL) {
- SSI_LOG_ERR("reached end of sg list. unexpected \n");
+ SSI_LOG_ERR("reached end of sg list. unexpected\n");
BUG();
}
sg_index += areq_ctx->dstSgl->length;
@@ -1214,7 +1214,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
return rc;
}
-static void ssi_buffer_mgr_update_aead_mlli_nents( struct ssi_drvdata *drvdata,
+static void ssi_buffer_mgr_update_aead_mlli_nents(struct ssi_drvdata *drvdata,
struct aead_request *req)
{
struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
@@ -1298,8 +1298,8 @@ int ssi_buffer_mgr_map_aead_request(
*/
ssi_buffer_mgr_copy_scatterlist_portion(
areq_ctx->backup_mac, req->src,
- size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
- size_to_skip+ req->cryptlen, SSI_SG_TO_BUF);
+ size_to_skip + req->cryptlen - areq_ctx->req_authsize,
+ size_to_skip + req->cryptlen, SSI_SG_TO_BUF);
}
/* cacluate the size for cipher remove ICV in decrypt*/
@@ -1393,7 +1393,7 @@ int ssi_buffer_mgr_map_aead_request(
size_to_map += crypto_aead_ivsize(tfm);
rc = ssi_buffer_mgr_map_scatterlist(dev, req->src,
size_to_map, DMA_BIDIRECTIONAL, &(areq_ctx->src.nents),
- LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES+LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
+ LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES + LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
if (unlikely(rc != 0)) {
rc = -ENOMEM;
goto aead_map_failure;
@@ -1459,9 +1459,9 @@ int ssi_buffer_mgr_map_aead_request(
}
ssi_buffer_mgr_update_aead_mlli_nents(drvdata, req);
- SSI_LOG_DEBUG("assoc params mn %d\n",areq_ctx->assoc.mlli_nents);
- SSI_LOG_DEBUG("src params mn %d\n",areq_ctx->src.mlli_nents);
- SSI_LOG_DEBUG("dst params mn %d\n",areq_ctx->dst.mlli_nents);
+ SSI_LOG_DEBUG("assoc params mn %d\n", areq_ctx->assoc.mlli_nents);
+ SSI_LOG_DEBUG("src params mn %d\n", areq_ctx->src.mlli_nents);
+ SSI_LOG_DEBUG("dst params mn %d\n", areq_ctx->dst.mlli_nents);
}
return 0;
@@ -1503,7 +1503,7 @@ int ssi_buffer_mgr_map_hash_request_final(
/*TODO: copy data in case that buffer is enough for operation */
/* map the previous buffer */
- if (*curr_buff_cnt != 0 ) {
+ if (*curr_buff_cnt != 0) {
if (ssi_ahash_handle_curr_buf(dev, areq_ctx, curr_buff,
*curr_buff_cnt, &sg_data) != 0) {
return -ENOMEM;
@@ -1511,7 +1511,7 @@ int ssi_buffer_mgr_map_hash_request_final(
}
if (src && (nbytes > 0) && do_update) {
- if ( unlikely( ssi_buffer_mgr_map_scatterlist( dev,src,
+ if (unlikely(ssi_buffer_mgr_map_scatterlist(dev, src,
nbytes,
DMA_TO_DEVICE,
&areq_ctx->in_nents,
@@ -1519,9 +1519,9 @@ int ssi_buffer_mgr_map_hash_request_final(
&dummy, &mapped_nents))){
goto unmap_curr_buff;
}
- if ( src && (mapped_nents == 1)
- && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) ) {
- memcpy(areq_ctx->buff_sg,src,
+ if (src && (mapped_nents == 1)
+ && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL)) {
+ memcpy(areq_ctx->buff_sg, src,
sizeof(struct scatterlist));
areq_ctx->buff_sg->length = nbytes;
areq_ctx->curr_sg = areq_ctx->buff_sg;
@@ -1547,7 +1547,7 @@ int ssi_buffer_mgr_map_hash_request_final(
}
}
/* change the buffer index for the unmap function */
- areq_ctx->buff_index = (areq_ctx->buff_index^1);
+ areq_ctx->buff_index = (areq_ctx->buff_index ^ 1);
SSI_LOG_DEBUG("areq_ctx->data_dma_buf_type = %s\n",
GET_DMA_BUFFER_TYPE(areq_ctx->data_dma_buf_type));
return 0;
@@ -1556,7 +1556,7 @@ int ssi_buffer_mgr_map_hash_request_final(
dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
unmap_curr_buff:
- if (*curr_buff_cnt != 0 ) {
+ if (*curr_buff_cnt != 0) {
dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
}
return -ENOMEM;
@@ -1586,7 +1586,7 @@ int ssi_buffer_mgr_map_hash_request_update(
SSI_LOG_DEBUG(" update params : curr_buff=%pK "
"curr_buff_cnt=0x%X nbytes=0x%X "
- "src=%pK curr_index=%u \n",
+ "src=%pK curr_index=%u\n",
curr_buff, *curr_buff_cnt, nbytes,
src, areq_ctx->buff_index);
/* Init the type of the dma buffer */
@@ -1623,12 +1623,12 @@ int ssi_buffer_mgr_map_hash_request_update(
/* Copy the new residue to next buffer */
if (*next_buff_cnt != 0) {
SSI_LOG_DEBUG(" handle residue: next buff %pK skip data %u"
- " residue %u \n", next_buff,
+ " residue %u\n", next_buff,
(update_data_len - *curr_buff_cnt),
*next_buff_cnt);
ssi_buffer_mgr_copy_scatterlist_portion(next_buff, src,
- (update_data_len -*curr_buff_cnt),
- nbytes,SSI_SG_TO_BUF);
+ (update_data_len - *curr_buff_cnt),
+ nbytes, SSI_SG_TO_BUF);
/* change the buffer index for next operation */
swap_index = 1;
}
@@ -1642,19 +1642,19 @@ int ssi_buffer_mgr_map_hash_request_update(
swap_index = 1;
}
- if ( update_data_len > *curr_buff_cnt ) {
- if ( unlikely( ssi_buffer_mgr_map_scatterlist( dev,src,
- (update_data_len -*curr_buff_cnt),
+ if (update_data_len > *curr_buff_cnt) {
+ if (unlikely(ssi_buffer_mgr_map_scatterlist(dev, src,
+ (update_data_len - *curr_buff_cnt),
DMA_TO_DEVICE,
&areq_ctx->in_nents,
LLI_MAX_NUM_OF_DATA_ENTRIES,
&dummy, &mapped_nents))){
goto unmap_curr_buff;
}
- if ( (mapped_nents == 1)
- && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) ) {
+ if ((mapped_nents == 1)
+ && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL)) {
/* only one entry in the SG and no previous data */
- memcpy(areq_ctx->buff_sg,src,
+ memcpy(areq_ctx->buff_sg, src,
sizeof(struct scatterlist));
areq_ctx->buff_sg->length = update_data_len;
areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
@@ -1678,7 +1678,7 @@ int ssi_buffer_mgr_map_hash_request_update(
}
}
- areq_ctx->buff_index = (areq_ctx->buff_index^swap_index);
+ areq_ctx->buff_index = (areq_ctx->buff_index ^ swap_index);
return 0;
@@ -1686,7 +1686,7 @@ int ssi_buffer_mgr_map_hash_request_update(
dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
unmap_curr_buff:
- if (*curr_buff_cnt != 0 ) {
+ if (*curr_buff_cnt != 0) {
dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
}
return -ENOMEM;
@@ -1722,7 +1722,7 @@ void ssi_buffer_mgr_unmap_hash_request(
if (*prev_len != 0) {
SSI_LOG_DEBUG("Unmapped buffer: areq_ctx->buff_sg=%pK"
- "dma=0x%llX len 0x%X\n",
+ " dma=0x%llX len 0x%X\n",
sg_virt(areq_ctx->buff_sg),
(unsigned long long)sg_dma_address(areq_ctx->buff_sg),
sg_dma_len(areq_ctx->buff_sg));
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index 34450a5..519e04e 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -69,9 +69,9 @@ static void ssi_ablkcipher_complete(struct device *dev, void *ssi_req, void __io
static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) {
- switch (ctx_p->flow_mode){
+ switch (ctx_p->flow_mode) {
case S_DIN_to_AES:
- switch (size){
+ switch (size) {
case CC_AES_128_BIT_KEY_SIZE:
case CC_AES_192_BIT_KEY_SIZE:
if (likely((ctx_p->cipher_mode != DRV_CIPHER_XTS) &&
@@ -81,8 +81,8 @@ static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) {
break;
case CC_AES_256_BIT_KEY_SIZE:
return 0;
- case (CC_AES_192_BIT_KEY_SIZE*2):
- case (CC_AES_256_BIT_KEY_SIZE*2):
+ case (CC_AES_192_BIT_KEY_SIZE * 2):
+ case (CC_AES_256_BIT_KEY_SIZE * 2):
if (likely((ctx_p->cipher_mode == DRV_CIPHER_XTS) ||
(ctx_p->cipher_mode == DRV_CIPHER_ESSIV) ||
(ctx_p->cipher_mode == DRV_CIPHER_BITLOCKER)))
@@ -111,9 +111,9 @@ static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) {
static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int size) {
- switch (ctx_p->flow_mode){
+ switch (ctx_p->flow_mode) {
case S_DIN_to_AES:
- switch (ctx_p->cipher_mode){
+ switch (ctx_p->cipher_mode) {
case DRV_CIPHER_XTS:
if ((size >= SSI_MIN_AES_XTS_SIZE) &&
(size <= SSI_MAX_AES_XTS_SIZE) &&
@@ -198,7 +198,7 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm)
dev = &ctx_p->drvdata->plat_dev->dev;
/* Allocate key buffer, cache line aligned */
- ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL|GFP_DMA);
+ ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL | GFP_DMA);
if (!ctx_p->user.key) {
SSI_LOG_ERR("Allocating key buffer in context failed\n");
rc = -ENOMEM;
@@ -257,11 +257,11 @@ static void ssi_blkcipher_exit(struct crypto_tfm *tfm)
}
-typedef struct tdes_keys{
+typedef struct tdes_keys {
u8 key1[DES_KEY_SIZE];
u8 key2[DES_KEY_SIZE];
u8 key3[DES_KEY_SIZE];
-}tdes_keys_t;
+} tdes_keys_t;
static const u8 zero_buff[] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
@@ -275,8 +275,8 @@ static int ssi_fips_verify_3des_keys(const u8 *key, unsigned int keylen)
tdes_keys_t *tdes_key = (tdes_keys_t*)key;
/* verify key1 != key2 and key3 != key2*/
- if (unlikely( (memcmp((u8*)tdes_key->key1, (u8*)tdes_key->key2, sizeof(tdes_key->key1)) == 0) ||
- (memcmp((u8*)tdes_key->key3, (u8*)tdes_key->key2, sizeof(tdes_key->key3)) == 0) )) {
+ if (unlikely((memcmp((u8*)tdes_key->key1, (u8*)tdes_key->key2, sizeof(tdes_key->key1)) == 0) ||
+ (memcmp((u8*)tdes_key->key3, (u8*)tdes_key->key2, sizeof(tdes_key->key3)) == 0))) {
return -ENOEXEC;
}
#endif /* CCREE_FIPS_SUPPORT */
@@ -336,11 +336,11 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
#if SSI_CC_HAS_MULTI2
/*last byte of key buffer is round number and should not be a part of key size*/
if (ctx_p->flow_mode == S_DIN_to_MULTI2) {
- keylen -=1;
+ keylen -= 1;
}
#endif /*SSI_CC_HAS_MULTI2*/
- if (unlikely(validate_keys_sizes(ctx_p,keylen) != 0)) {
+ if (unlikely(validate_keys_sizes(ctx_p, keylen) != 0)) {
SSI_LOG_ERR("Unsupported key size %d.\n", keylen);
crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
return -EINVAL;
@@ -485,7 +485,7 @@ ssi_blkcipher_create_setup_desc(
set_flow_mode(&desc[*seq_size], flow_mode);
set_cipher_mode(&desc[*seq_size], cipher_mode);
if ((cipher_mode == DRV_CIPHER_CTR) ||
- (cipher_mode == DRV_CIPHER_OFB) ) {
+ (cipher_mode == DRV_CIPHER_OFB)) {
set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE1);
} else {
set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE0);
@@ -650,7 +650,7 @@ ssi_blkcipher_create_data_desc(
return;
}
/* Process */
- if (likely(req_ctx->dma_buf_type == SSI_DMA_BUF_DLLI)){
+ if (likely(req_ctx->dma_buf_type == SSI_DMA_BUF_DLLI)) {
SSI_LOG_DEBUG(" data params addr 0x%llX length 0x%X \n",
(unsigned long long)sg_dma_address(src),
nbytes);
@@ -737,10 +737,10 @@ static int ssi_blkcipher_complete(struct device *dev,
/*Set the inflight couter value to local variable*/
inflight_counter = ctx_p->drvdata->inflight_counter;
/*Decrease the inflight counter*/
- if(ctx_p->flow_mode == BYPASS && ctx_p->drvdata->inflight_counter > 0)
+ if (ctx_p->flow_mode == BYPASS && ctx_p->drvdata->inflight_counter > 0)
ctx_p->drvdata->inflight_counter--;
- if(areq){
+ if (areq) {
ablkcipher_request_complete(areq, completion_error);
return 0;
}
@@ -761,10 +761,10 @@ static int ssi_blkcipher_process(
struct device *dev = &ctx_p->drvdata->plat_dev->dev;
struct cc_hw_desc desc[MAX_ABLKCIPHER_SEQ_LEN];
struct ssi_crypto_req ssi_req = {};
- int rc, seq_len = 0,cts_restore_flag = 0;
+ int rc, seq_len = 0, cts_restore_flag = 0;
SSI_LOG_DEBUG("%s areq=%p info=%p nbytes=%d\n",
- ((direction==DRV_CRYPTO_DIRECTION_ENCRYPT)?"Encrypt":"Decrypt"),
+ ((direction == DRV_CRYPTO_DIRECTION_ENCRYPT) ? "Encrypt" : "Decrypt"),
areq, info, nbytes);
CHECK_AND_RETURN_UPON_FIPS_ERROR();
@@ -781,7 +781,7 @@ static int ssi_blkcipher_process(
return 0;
}
/*For CTS in case of data size aligned to 16 use CBC mode*/
- if (((nbytes % AES_BLOCK_SIZE) == 0) && (ctx_p->cipher_mode == DRV_CIPHER_CBC_CTS)){
+ if (((nbytes % AES_BLOCK_SIZE) == 0) && (ctx_p->cipher_mode == DRV_CIPHER_CBC_CTS)) {
ctx_p->cipher_mode = DRV_CIPHER_CBC;
cts_restore_flag = 1;
@@ -848,8 +848,8 @@ static int ssi_blkcipher_process(
/* STAT_PHASE_3: Lock HW and push sequence */
- rc = send_request(ctx_p->drvdata, &ssi_req, desc, seq_len, (areq == NULL)? 0:1);
- if(areq != NULL) {
+ rc = send_request(ctx_p->drvdata, &ssi_req, desc, seq_len, (areq == NULL) ? 0 : 1);
+ if (areq != NULL) {
if (unlikely(rc != -EINPROGRESS)) {
/* Failed to send the request or request completed synchronously */
ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c
index 151afcf..7c94354 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -77,7 +77,7 @@
#ifdef DX_DUMP_BYTES
void dump_byte_array(const char *name, const u8 *the_array, unsigned long size)
{
- int i , line_offset = 0, ret = 0;
+ int i, line_offset = 0, ret = 0;
const u8 *cur_byte;
char line_buf[80];
@@ -89,17 +89,17 @@ void dump_byte_array(const char *name, const u8 *the_array, unsigned long size)
ret = snprintf(line_buf, sizeof(line_buf), "%s[%lu]: ",
name, size);
if (ret < 0) {
- SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n",ret);
+ SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret);
return;
}
line_offset = ret;
- for (i = 0 , cur_byte = the_array;
+ for (i = 0, cur_byte = the_array;
(i < size) && (line_offset < sizeof(line_buf)); i++, cur_byte++) {
ret = snprintf(line_buf + line_offset,
sizeof(line_buf) - line_offset,
"0x%02X ", *cur_byte);
if (ret < 0) {
- SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n",ret);
+ SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret);
return;
}
line_offset += ret;
@@ -301,9 +301,9 @@ static int init_cc_resources(struct platform_device *plat_dev)
if (rc)
goto init_cc_res_err;
- if(new_drvdata->plat_dev->dev.dma_mask == NULL)
+ if (new_drvdata->plat_dev->dev.dma_mask == NULL)
{
- new_drvdata->plat_dev->dev.dma_mask = & new_drvdata->plat_dev->dev.coherent_dma_mask;
+ new_drvdata->plat_dev->dev.dma_mask = &new_drvdata->plat_dev->dev.coherent_dma_mask;
}
if (!new_drvdata->plat_dev->dev.coherent_dma_mask)
{
@@ -523,7 +523,7 @@ static int cc7x_probe(struct platform_device *plat_dev)
asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r" (ctr));
SSI_LOG_DEBUG("Main ID register (MIDR): Implementer 0x%02X, Arch 0x%01X,"
" Part 0x%03X, Rev r%dp%d\n",
- (ctr>>24), (ctr>>16)&0xF, (ctr>>4)&0xFFF, (ctr>>20)&0xF, ctr&0xF);
+ (ctr >> 24), (ctr >> 16) & 0xF, (ctr >> 4) & 0xFFF, (ctr >> 20) & 0xF, ctr & 0xF);
#endif
/* Map registers space */
@@ -546,13 +546,13 @@ static int cc7x_remove(struct platform_device *plat_dev)
return 0;
}
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
static struct dev_pm_ops arm_cc7x_driver_pm = {
SET_RUNTIME_PM_OPS(ssi_power_mgr_runtime_suspend, ssi_power_mgr_runtime_resume, NULL)
};
#endif
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
#define DX_DRIVER_RUNTIME_PM (&arm_cc7x_driver_pm)
#else
#define DX_DRIVER_RUNTIME_PM NULL
diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h
index 1b8471b..c1ed61f 100644
--- a/drivers/staging/ccree/ssi_driver.h
+++ b/drivers/staging/ccree/ssi_driver.h
@@ -93,7 +93,7 @@
/* Logging macros */
#define SSI_LOG(level, format, ...) \
- printk(level "cc715ree::%s: " format , __func__, ##__VA_ARGS__)
+ printk(level "cc715ree::%s: " format, __func__, ##__VA_ARGS__)
#define SSI_LOG_ERR(format, ...) SSI_LOG(KERN_ERR, format, ##__VA_ARGS__)
#define SSI_LOG_WARNING(format, ...) SSI_LOG(KERN_WARNING, format, ##__VA_ARGS__)
#define SSI_LOG_NOTICE(format, ...) SSI_LOG(KERN_NOTICE, format, ##__VA_ARGS__)
@@ -107,7 +107,7 @@
#define MIN(a, b) (((a) < (b)) ? (a) : (b))
#define MAX(a, b) (((a) > (b)) ? (a) : (b))
-#define SSI_MAX_IVGEN_DMA_ADDRESSES 3
+#define SSI_MAX_IVGEN_DMA_ADDRESSES 3
struct ssi_crypto_req {
void (*user_cb)(struct device *dev, void *req, void __iomem *cc_base);
void *user_arg;
diff --git a/drivers/staging/ccree/ssi_fips_data.h b/drivers/staging/ccree/ssi_fips_data.h
index fa6bf41..27b2866 100644
--- a/drivers/staging/ccree/ssi_fips_data.h
+++ b/drivers/staging/ccree/ssi_fips_data.h
@@ -153,20 +153,20 @@
#define NIST_TDES_VECTOR_SIZE 8
#define NIST_TDES_IV_SIZE 8
-#define NIST_TDES_ECB_IV { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
+#define NIST_TDES_ECB_IV { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
#define NIST_TDES_ECB3_KEY { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, \
0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, 0x01, \
0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, 0x01, 0x23 }
-#define NIST_TDES_ECB3_PLAIN_DATA { 0x54, 0x68, 0x65, 0x20, 0x71, 0x75, 0x66, 0x63 }
-#define NIST_TDES_ECB3_CIPHER { 0xa8, 0x26, 0xfd, 0x8c, 0xe5, 0x3b, 0x85, 0x5f }
+#define NIST_TDES_ECB3_PLAIN_DATA { 0x54, 0x68, 0x65, 0x20, 0x71, 0x75, 0x66, 0x63 }
+#define NIST_TDES_ECB3_CIPHER { 0xa8, 0x26, 0xfd, 0x8c, 0xe5, 0x3b, 0x85, 0x5f }
-#define NIST_TDES_CBC3_IV { 0xf8, 0xee, 0xe1, 0x35, 0x9c, 0x6e, 0x54, 0x40 }
+#define NIST_TDES_CBC3_IV { 0xf8, 0xee, 0xe1, 0x35, 0x9c, 0x6e, 0x54, 0x40 }
#define NIST_TDES_CBC3_KEY { 0xe9, 0xda, 0x37, 0xf8, 0xdc, 0x97, 0x6d, 0x5b, \
0xb6, 0x8c, 0x04, 0xe3, 0xec, 0x98, 0x20, 0x15, \
0xf4, 0x0e, 0x08, 0xb5, 0x97, 0x29, 0xf2, 0x8f }
-#define NIST_TDES_CBC3_PLAIN_DATA { 0x3b, 0xb7, 0xa7, 0xdb, 0xa3, 0xd5, 0x92, 0x91 }
-#define NIST_TDES_CBC3_CIPHER { 0x5b, 0x84, 0x24, 0xd2, 0x39, 0x3e, 0x55, 0xa2 }
+#define NIST_TDES_CBC3_PLAIN_DATA { 0x3b, 0xb7, 0xa7, 0xdb, 0xa3, 0xd5, 0x92, 0x91 }
+#define NIST_TDES_CBC3_CIPHER { 0x5b, 0x84, 0x24, 0xd2, 0x39, 0x3e, 0x55, 0xa2 }
/* NIST AES-CCM */
diff --git a/drivers/staging/ccree/ssi_fips_ll.c b/drivers/staging/ccree/ssi_fips_ll.c
index 6c79e7d..804384d 100644
--- a/drivers/staging/ccree/ssi_fips_ll.c
+++ b/drivers/staging/ccree/ssi_fips_ll.c
@@ -214,8 +214,8 @@ static const FipsCipherData FipsCipherDataTable[] = {
{ 1, NIST_AES_256_XTS_KEY, CC_AES_256_BIT_KEY_SIZE, NIST_AES_256_XTS_IV, DRV_CRYPTO_DIRECTION_ENCRYPT, DRV_CIPHER_XTS, NIST_AES_256_XTS_PLAIN, NIST_AES_256_XTS_CIPHER, NIST_AES_256_XTS_VECTOR_SIZE },
{ 1, NIST_AES_256_XTS_KEY, CC_AES_256_BIT_KEY_SIZE, NIST_AES_256_XTS_IV, DRV_CRYPTO_DIRECTION_DECRYPT, DRV_CIPHER_XTS, NIST_AES_256_XTS_CIPHER, NIST_AES_256_XTS_PLAIN, NIST_AES_256_XTS_VECTOR_SIZE },
#if (CC_SUPPORT_SHA > 256)
- { 1, NIST_AES_512_XTS_KEY, 2*CC_AES_256_BIT_KEY_SIZE, NIST_AES_512_XTS_IV, DRV_CRYPTO_DIRECTION_ENCRYPT, DRV_CIPHER_XTS, NIST_AES_512_XTS_PLAIN, NIST_AES_512_XTS_CIPHER, NIST_AES_512_XTS_VECTOR_SIZE },
- { 1, NIST_AES_512_XTS_KEY, 2*CC_AES_256_BIT_KEY_SIZE, NIST_AES_512_XTS_IV, DRV_CRYPTO_DIRECTION_DECRYPT, DRV_CIPHER_XTS, NIST_AES_512_XTS_CIPHER, NIST_AES_512_XTS_PLAIN, NIST_AES_512_XTS_VECTOR_SIZE },
+ { 1, NIST_AES_512_XTS_KEY, 2 * CC_AES_256_BIT_KEY_SIZE, NIST_AES_512_XTS_IV, DRV_CRYPTO_DIRECTION_ENCRYPT, DRV_CIPHER_XTS, NIST_AES_512_XTS_PLAIN, NIST_AES_512_XTS_CIPHER, NIST_AES_512_XTS_VECTOR_SIZE },
+ { 1, NIST_AES_512_XTS_KEY, 2 * CC_AES_256_BIT_KEY_SIZE, NIST_AES_512_XTS_IV, DRV_CRYPTO_DIRECTION_DECRYPT, DRV_CIPHER_XTS, NIST_AES_512_XTS_CIPHER, NIST_AES_512_XTS_PLAIN, NIST_AES_512_XTS_VECTOR_SIZE },
#endif
/* DES */
{ 0, NIST_TDES_ECB3_KEY, CC_DRV_DES_TRIPLE_KEY_SIZE, NIST_TDES_ECB_IV, DRV_CRYPTO_DIRECTION_ENCRYPT, DRV_CIPHER_ECB, NIST_TDES_ECB3_PLAIN_DATA, NIST_TDES_ECB3_CIPHER, NIST_TDES_VECTOR_SIZE },
@@ -277,9 +277,9 @@ FIPS_CipherToFipsError(enum drv_cipher_mode mode, bool is_aes)
switch (mode)
{
case DRV_CIPHER_ECB:
- return is_aes ? CC_REE_FIPS_ERROR_AES_ECB_PUT : CC_REE_FIPS_ERROR_DES_ECB_PUT ;
+ return is_aes ? CC_REE_FIPS_ERROR_AES_ECB_PUT : CC_REE_FIPS_ERROR_DES_ECB_PUT;
case DRV_CIPHER_CBC:
- return is_aes ? CC_REE_FIPS_ERROR_AES_CBC_PUT : CC_REE_FIPS_ERROR_DES_CBC_PUT ;
+ return is_aes ? CC_REE_FIPS_ERROR_AES_CBC_PUT : CC_REE_FIPS_ERROR_DES_CBC_PUT;
case DRV_CIPHER_OFB:
return CC_REE_FIPS_ERROR_AES_OFB_PUT;
case DRV_CIPHER_CTR:
@@ -332,7 +332,7 @@ ssi_cipher_fips_run_test(struct ssi_drvdata *drvdata,
set_flow_mode(&desc[idx], s_flow_mode);
set_cipher_mode(&desc[idx], cipher_mode);
if ((cipher_mode == DRV_CIPHER_CTR) ||
- (cipher_mode == DRV_CIPHER_OFB) ) {
+ (cipher_mode == DRV_CIPHER_OFB)) {
set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
} else {
set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
@@ -432,7 +432,7 @@ ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffe
{
FipsCipherData *cipherData = (FipsCipherData*)&FipsCipherDataTable[i];
int rc = 0;
- size_t iv_size = cipherData->isAes ? NIST_AES_IV_SIZE : NIST_TDES_IV_SIZE ;
+ size_t iv_size = cipherData->isAes ? NIST_AES_IV_SIZE : NIST_TDES_IV_SIZE;
memset(cpu_addr_buffer, 0, sizeof(struct fips_cipher_ctx));
diff --git a/drivers/staging/ccree/ssi_fips_local.c b/drivers/staging/ccree/ssi_fips_local.c
index d6c994a..33a07e4 100644
--- a/drivers/staging/ccree/ssi_fips_local.c
+++ b/drivers/staging/ccree/ssi_fips_local.c
@@ -88,9 +88,9 @@ static void ssi_fips_update_tee_upon_ree_status(struct ssi_drvdata *drvdata, ssi
{
void __iomem *cc_base = drvdata->cc_base;
if (err == CC_REE_FIPS_ERROR_OK) {
- CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), (CC_FIPS_SYNC_REE_STATUS|CC_FIPS_SYNC_MODULE_OK));
+ CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), (CC_FIPS_SYNC_REE_STATUS | CC_FIPS_SYNC_MODULE_OK));
} else {
- CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), (CC_FIPS_SYNC_REE_STATUS|CC_FIPS_SYNC_MODULE_ERROR));
+ CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), (CC_FIPS_SYNC_REE_STATUS | CC_FIPS_SYNC_MODULE_ERROR));
}
}
@@ -305,7 +305,7 @@ int ssi_fips_init(struct ssi_drvdata *p_drvdata)
FIPS_DBG("CC FIPS code .. (fips=%d) \n", ssi_fips_support);
- fips_h = kzalloc(sizeof(struct ssi_fips_handle),GFP_KERNEL);
+ fips_h = kzalloc(sizeof(struct ssi_fips_handle), GFP_KERNEL);
if (fips_h == NULL) {
ssi_fips_set_error(p_drvdata, CC_REE_FIPS_ERROR_GENERAL);
return -ENOMEM;
@@ -329,7 +329,7 @@ int ssi_fips_init(struct ssi_drvdata *p_drvdata)
#endif
/* init fips driver data */
- rc = ssi_fips_set_state((ssi_fips_support == 0)? CC_FIPS_STATE_NOT_SUPPORTED : CC_FIPS_STATE_SUPPORTED);
+ rc = ssi_fips_set_state((ssi_fips_support == 0) ? CC_FIPS_STATE_NOT_SUPPORTED : CC_FIPS_STATE_SUPPORTED);
if (unlikely(rc != 0)) {
ssi_fips_set_error(p_drvdata, CC_REE_FIPS_ERROR_GENERAL);
rc = -EAGAIN;
diff --git a/drivers/staging/ccree/ssi_fips_local.h b/drivers/staging/ccree/ssi_fips_local.h
index ac1ab96..fa09084 100644
--- a/drivers/staging/ccree/ssi_fips_local.h
+++ b/drivers/staging/ccree/ssi_fips_local.h
@@ -24,24 +24,24 @@
struct ssi_drvdata;
// IG - how to make 1 file for TEE and REE
-typedef enum CC_FipsSyncStatus{
- CC_FIPS_SYNC_MODULE_OK = 0x0,
- CC_FIPS_SYNC_MODULE_ERROR = 0x1,
- CC_FIPS_SYNC_REE_STATUS = 0x4,
- CC_FIPS_SYNC_TEE_STATUS = 0x8,
- CC_FIPS_SYNC_STATUS_RESERVE32B = S32_MAX
-}CCFipsSyncStatus_t;
+typedef enum CC_FipsSyncStatus {
+ CC_FIPS_SYNC_MODULE_OK = 0x0,
+ CC_FIPS_SYNC_MODULE_ERROR = 0x1,
+ CC_FIPS_SYNC_REE_STATUS = 0x4,
+ CC_FIPS_SYNC_TEE_STATUS = 0x8,
+ CC_FIPS_SYNC_STATUS_RESERVE32B = S32_MAX
+} CCFipsSyncStatus_t;
#define CHECK_AND_RETURN_UPON_FIPS_ERROR() {\
if (ssi_fips_check_fips_error() != 0) {\
return -ENOEXEC;\
- }\
+ } \
}
#define CHECK_AND_RETURN_VOID_UPON_FIPS_ERROR() {\
if (ssi_fips_check_fips_error() != 0) {\
return;\
- }\
+ } \
}
#define SSI_FIPS_INIT(p_drvData) (ssi_fips_init(p_drvData))
#define SSI_FIPS_FINI(p_drvData) (ssi_fips_fini(p_drvData))
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index bfe2bec..64e969e 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -111,7 +111,7 @@ struct ssi_hash_ctx {
static void ssi_hash_create_data_desc(
struct ahash_req_ctx *areq_ctx,
struct ssi_hash_ctx *ctx,
- unsigned int flow_mode,struct cc_hw_desc desc[],
+ unsigned int flow_mode, struct cc_hw_desc desc[],
bool is_not_last_data,
unsigned int *seq_size);
@@ -158,22 +158,22 @@ static int ssi_hash_map_request(struct device *dev,
struct cc_hw_desc desc;
int rc = -ENOMEM;
- state->buff0 = kzalloc(SSI_MAX_HASH_BLCK_SIZE ,GFP_KERNEL|GFP_DMA);
+ state->buff0 = kzalloc(SSI_MAX_HASH_BLCK_SIZE, GFP_KERNEL | GFP_DMA);
if (!state->buff0) {
SSI_LOG_ERR("Allocating buff0 in context failed\n");
goto fail0;
}
- state->buff1 = kzalloc(SSI_MAX_HASH_BLCK_SIZE ,GFP_KERNEL|GFP_DMA);
+ state->buff1 = kzalloc(SSI_MAX_HASH_BLCK_SIZE, GFP_KERNEL | GFP_DMA);
if (!state->buff1) {
SSI_LOG_ERR("Allocating buff1 in context failed\n");
goto fail_buff0;
}
- state->digest_result_buff = kzalloc(SSI_MAX_HASH_DIGEST_SIZE ,GFP_KERNEL|GFP_DMA);
+ state->digest_result_buff = kzalloc(SSI_MAX_HASH_DIGEST_SIZE, GFP_KERNEL | GFP_DMA);
if (!state->digest_result_buff) {
SSI_LOG_ERR("Allocating digest_result_buff in context failed\n");
goto fail_buff1;
}
- state->digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL|GFP_DMA);
+ state->digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL | GFP_DMA);
if (!state->digest_buff) {
SSI_LOG_ERR("Allocating digest-buffer in context failed\n");
goto fail_digest_result_buff;
@@ -181,7 +181,7 @@ static int ssi_hash_map_request(struct device *dev,
SSI_LOG_DEBUG("Allocated digest-buffer in context ctx->digest_buff=@%p\n", state->digest_buff);
if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) {
- state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, GFP_KERNEL|GFP_DMA);
+ state->digest_bytes_len = kzalloc(HASH_LEN_SIZE, GFP_KERNEL | GFP_DMA);
if (!state->digest_bytes_len) {
SSI_LOG_ERR("Allocating digest-bytes-len in context failed\n");
goto fail1;
@@ -191,7 +191,7 @@ static int ssi_hash_map_request(struct device *dev,
state->digest_bytes_len = NULL;
}
- state->opad_digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL|GFP_DMA);
+ state->opad_digest_buff = kzalloc(ctx->inter_digestsize, GFP_KERNEL | GFP_DMA);
if (!state->opad_digest_buff) {
SSI_LOG_ERR("Allocating opad-digest-buffer in context failed\n");
goto fail2;
@@ -431,7 +431,7 @@ static int ssi_hash_digest(struct ahash_req_ctx *state,
int rc = 0;
- SSI_LOG_DEBUG("===== %s-digest (%d) ====\n", is_hmac?"hmac":"hash", nbytes);
+ SSI_LOG_DEBUG("===== %s-digest (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes);
CHECK_AND_RETURN_UPON_FIPS_ERROR();
@@ -598,7 +598,7 @@ static int ssi_hash_update(struct ahash_req_ctx *state,
int rc;
SSI_LOG_DEBUG("===== %s-update (%d) ====\n", ctx->is_hmac ?
- "hmac":"hash", nbytes);
+ "hmac" : "hash", nbytes);
CHECK_AND_RETURN_UPON_FIPS_ERROR();
if (nbytes == 0) {
@@ -696,11 +696,11 @@ static int ssi_hash_finup(struct ahash_req_ctx *state,
int idx = 0;
int rc;
- SSI_LOG_DEBUG("===== %s-finup (%d) ====\n", is_hmac?"hmac":"hash", nbytes);
+ SSI_LOG_DEBUG("===== %s-finup (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes);
CHECK_AND_RETURN_UPON_FIPS_ERROR();
- if (unlikely(ssi_buffer_mgr_map_hash_request_final(ctx->drvdata, state, src , nbytes, 1) != 0)) {
+ if (unlikely(ssi_buffer_mgr_map_hash_request_final(ctx->drvdata, state, src, nbytes, 1) != 0)) {
SSI_LOG_ERR("map_ahash_request_final() failed\n");
return -ENOMEM;
}
@@ -742,7 +742,7 @@ static int ssi_hash_finup(struct ahash_req_ctx *state,
set_cipher_mode(&desc[idx], ctx->hw_mode);
set_dout_dlli(&desc[idx], state->digest_buff_dma_addr,
digestsize, NS_BIT, 0);
- ssi_set_hash_endianity(ctx->hash_mode,&desc[idx]);
+ ssi_set_hash_endianity(ctx->hash_mode, &desc[idx]);
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
idx++;
@@ -792,7 +792,7 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE);
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
- ssi_set_hash_endianity(ctx->hash_mode,&desc[idx]);
+ ssi_set_hash_endianity(ctx->hash_mode, &desc[idx]);
set_cipher_mode(&desc[idx], ctx->hw_mode);
idx++;
@@ -833,7 +833,7 @@ static int ssi_hash_final(struct ahash_req_ctx *state,
int idx = 0;
int rc;
- SSI_LOG_DEBUG("===== %s-final (%d) ====\n", is_hmac?"hmac":"hash", nbytes);
+ SSI_LOG_DEBUG("===== %s-final (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes);
CHECK_AND_RETURN_UPON_FIPS_ERROR();
@@ -890,7 +890,7 @@ static int ssi_hash_final(struct ahash_req_ctx *state,
set_cipher_mode(&desc[idx], ctx->hw_mode);
set_dout_dlli(&desc[idx], state->digest_buff_dma_addr,
digestsize, NS_BIT, 0);
- ssi_set_hash_endianity(ctx->hash_mode,&desc[idx]);
+ ssi_set_hash_endianity(ctx->hash_mode, &desc[idx]);
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
idx++;
@@ -939,7 +939,7 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE);
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
- ssi_set_hash_endianity(ctx->hash_mode,&desc[idx]);
+ ssi_set_hash_endianity(ctx->hash_mode, &desc[idx]);
set_cipher_mode(&desc[idx], ctx->hw_mode);
idx++;
@@ -1057,7 +1057,7 @@ static int ssi_hash_setkey(void *hash,
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
- ssi_set_hash_endianity(ctx->hash_mode,&desc[idx]);
+ ssi_set_hash_endianity(ctx->hash_mode, &desc[idx]);
idx++;
hw_desc_init(&desc[idx]);
@@ -1871,7 +1871,7 @@ static int ssi_ahash_import(struct ahash_request *req, const void *in)
static int ssi_ahash_setkey(struct crypto_ahash *ahash,
const u8 *key, unsigned int keylen)
{
- return ssi_hash_setkey((void *) ahash, key, keylen, false);
+ return ssi_hash_setkey((void *)ahash, key, keylen, false);
}
struct ssi_hash_template {
@@ -2143,7 +2143,7 @@ int ssi_hash_init_sram_digest_consts(struct ssi_drvdata *drvdata)
struct ssi_hash_handle *hash_handle = drvdata->hash_handle;
ssi_sram_addr_t sram_buff_ofs = hash_handle->digest_len_sram_addr;
unsigned int larval_seq_len = 0;
- struct cc_hw_desc larval_seq[CC_DIGEST_SIZE_MAX/sizeof(u32)];
+ struct cc_hw_desc larval_seq[CC_DIGEST_SIZE_MAX / sizeof(u32)];
int rc = 0;
#if (DX_DEV_SHA_MAX > 256)
int i;
diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c
index 67ae1dc..c8c5875 100644
--- a/drivers/staging/ccree/ssi_pm.c
+++ b/drivers/staging/ccree/ssi_pm.c
@@ -31,7 +31,7 @@
#include "ssi_pm.h"
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
#define POWER_DOWN_ENABLE 0x01
#define POWER_DOWN_DISABLE 0x00
@@ -71,14 +71,14 @@ int ssi_power_mgr_runtime_resume(struct device *dev)
}
rc = init_cc_regs(drvdata, false);
- if (rc !=0) {
- SSI_LOG_ERR("init_cc_regs (%x)\n",rc);
+ if (rc != 0) {
+ SSI_LOG_ERR("init_cc_regs (%x)\n", rc);
return rc;
}
rc = ssi_request_mgr_runtime_resume_queue(drvdata);
- if (rc !=0) {
- SSI_LOG_ERR("ssi_request_mgr_runtime_resume_queue (%x)\n",rc);
+ if (rc != 0) {
+ SSI_LOG_ERR("ssi_request_mgr_runtime_resume_queue (%x)\n", rc);
return rc;
}
@@ -126,10 +126,10 @@ int ssi_power_mgr_runtime_put_suspend(struct device *dev)
int ssi_power_mgr_init(struct ssi_drvdata *drvdata)
{
int rc = 0;
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
struct platform_device *plat_dev = drvdata->plat_dev;
/* must be before the enabling to avoid resdundent suspending */
- pm_runtime_set_autosuspend_delay(&plat_dev->dev,SSI_SUSPEND_TIMEOUT);
+ pm_runtime_set_autosuspend_delay(&plat_dev->dev, SSI_SUSPEND_TIMEOUT);
pm_runtime_use_autosuspend(&plat_dev->dev);
/* activate the PM module */
rc = pm_runtime_set_active(&plat_dev->dev);
@@ -143,7 +143,7 @@ int ssi_power_mgr_init(struct ssi_drvdata *drvdata)
void ssi_power_mgr_fini(struct ssi_drvdata *drvdata)
{
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
struct platform_device *plat_dev = drvdata->plat_dev;
pm_runtime_disable(&plat_dev->dev);
diff --git a/drivers/staging/ccree/ssi_pm.h b/drivers/staging/ccree/ssi_pm.h
index 8b0d8be..4874987 100644
--- a/drivers/staging/ccree/ssi_pm.h
+++ b/drivers/staging/ccree/ssi_pm.h
@@ -32,7 +32,7 @@ int ssi_power_mgr_init(struct ssi_drvdata *drvdata);
void ssi_power_mgr_fini(struct ssi_drvdata *drvdata);
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
int ssi_power_mgr_runtime_suspend(struct device *dev);
int ssi_power_mgr_runtime_resume(struct device *dev);
diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c
index 2c6937a..3176578 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -57,7 +57,7 @@ struct ssi_request_mgr_handle {
#else
struct tasklet_struct comptask;
#endif
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
bool is_runtime_suspended;
#endif
};
@@ -81,7 +81,7 @@ void request_mgr_fini(struct ssi_drvdata *drvdata)
}
SSI_LOG_DEBUG("max_used_hw_slots=%d\n", (req_mgr_h->hw_queue_size -
- req_mgr_h->min_free_hw_slots) );
+ req_mgr_h->min_free_hw_slots));
SSI_LOG_DEBUG("max_used_sw_slots=%d\n", req_mgr_h->max_used_sw_slots);
#ifdef COMP_IN_WQ
@@ -101,7 +101,7 @@ int request_mgr_init(struct ssi_drvdata *drvdata)
struct ssi_request_mgr_handle *req_mgr_h;
int rc = 0;
- req_mgr_h = kzalloc(sizeof(struct ssi_request_mgr_handle),GFP_KERNEL);
+ req_mgr_h = kzalloc(sizeof(struct ssi_request_mgr_handle), GFP_KERNEL);
if (req_mgr_h == NULL) {
rc = -ENOMEM;
goto req_mgr_init_err;
@@ -168,13 +168,13 @@ static inline void enqueue_seq(
int i;
for (i = 0; i < seq_len; i++) {
- writel_relaxed(seq[i].word[0], (volatile void __iomem *)(cc_base+CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
- writel_relaxed(seq[i].word[1], (volatile void __iomem *)(cc_base+CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
- writel_relaxed(seq[i].word[2], (volatile void __iomem *)(cc_base+CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
- writel_relaxed(seq[i].word[3], (volatile void __iomem *)(cc_base+CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
- writel_relaxed(seq[i].word[4], (volatile void __iomem *)(cc_base+CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
+ writel_relaxed(seq[i].word[0], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
+ writel_relaxed(seq[i].word[1], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
+ writel_relaxed(seq[i].word[2], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
+ writel_relaxed(seq[i].word[3], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
+ writel_relaxed(seq[i].word[4], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
wmb();
- writel_relaxed(seq[i].word[5], (volatile void __iomem *)(cc_base+CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
+ writel_relaxed(seq[i].word[5], (volatile void __iomem *)(cc_base + CC_REG_OFFSET(CRY_KERNEL, DSCRPTR_QUEUE_WORD0)));
#ifdef DX_DUMP_DESCS
SSI_LOG_DEBUG("desc[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n", i,
seq[i].word[0], seq[i].word[1], seq[i].word[2], seq[i].word[3], seq[i].word[4], seq[i].word[5]);
@@ -215,11 +215,11 @@ static inline int request_mgr_queues_status_check(
return -EBUSY;
}
- if ((likely(req_mgr_h->q_free_slots >= total_seq_len)) ) {
+ if ((likely(req_mgr_h->q_free_slots >= total_seq_len))) {
return 0;
}
/* Wait for space in HW queue. Poll constant num of iterations. */
- for (poll_queue =0; poll_queue < SSI_MAX_POLL_ITER ; poll_queue ++) {
+ for (poll_queue = 0; poll_queue < SSI_MAX_POLL_ITER ; poll_queue++) {
req_mgr_h->q_free_slots =
CC_HAL_READ_REGISTER(
CC_REG_OFFSET(CRY_KERNEL,
@@ -229,7 +229,7 @@ static inline int request_mgr_queues_status_check(
req_mgr_h->min_free_hw_slots = req_mgr_h->q_free_slots;
}
- if (likely (req_mgr_h->q_free_slots >= total_seq_len)) {
+ if (likely(req_mgr_h->q_free_slots >= total_seq_len)) {
/* If there is enough place return */
return 0;
}
@@ -255,8 +255,8 @@ static inline int request_mgr_queues_status_check(
* \param desc The crypto sequence
* \param len The crypto sequence length
* \param is_dout If "true": completion is handled by the caller
- * If "false": this function adds a dummy descriptor completion
- * and waits upon completion signal.
+ * If "false": this function adds a dummy descriptor completion
+ * and waits upon completion signal.
*
* \return int Returns -EINPROGRESS if "is_dout=true"; "0" if "is_dout=false"
*/
@@ -273,13 +273,13 @@ int send_request(
int rc;
unsigned int max_required_seq_len = (total_seq_len +
((ssi_req->ivgen_dma_addr_len == 0) ? 0 :
- SSI_IVPOOL_SEQ_LEN ) +
- ((is_dout == 0 )? 1 : 0));
+ SSI_IVPOOL_SEQ_LEN) +
+ ((is_dout == 0) ? 1 : 0));
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
rc = ssi_power_mgr_runtime_get(&drvdata->plat_dev->dev);
if (rc != 0) {
- SSI_LOG_ERR("ssi_power_mgr_runtime_get returned %x\n",rc);
+ SSI_LOG_ERR("ssi_power_mgr_runtime_get returned %x\n", rc);
return rc;
}
#endif
@@ -294,7 +294,7 @@ int send_request(
rc = request_mgr_queues_status_check(req_mgr_h,
cc_base,
max_required_seq_len);
- if (likely(rc == 0 ))
+ if (likely(rc == 0))
/* There is enough place in the queue */
break;
/* something wrong release the spinlock*/
@@ -304,7 +304,7 @@ int send_request(
/* Any error other than HW queue full
* (SW queue is full)
*/
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
ssi_power_mgr_runtime_put_suspend(&drvdata->plat_dev->dev);
#endif
return rc;
@@ -339,7 +339,7 @@ int send_request(
if (unlikely(rc != 0)) {
SSI_LOG_ERR("Failed to generate IV (rc=%d)\n", rc);
spin_unlock_bh(&req_mgr_h->hw_lock);
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
ssi_power_mgr_runtime_put_suspend(&drvdata->plat_dev->dev);
#endif
return rc;
@@ -348,7 +348,7 @@ int send_request(
total_seq_len += iv_seq_len;
}
- used_sw_slots = ((req_mgr_h->req_queue_head - req_mgr_h->req_queue_tail) & (MAX_REQUEST_QUEUE_SIZE-1));
+ used_sw_slots = ((req_mgr_h->req_queue_head - req_mgr_h->req_queue_tail) & (MAX_REQUEST_QUEUE_SIZE - 1));
if (unlikely(used_sw_slots > req_mgr_h->max_used_sw_slots)) {
req_mgr_h->max_used_sw_slots = used_sw_slots;
}
@@ -412,7 +412,7 @@ int send_request_init(
/* Wait for space in HW and SW FIFO. Poll for as much as FIFO_TIMEOUT. */
rc = request_mgr_queues_status_check(req_mgr_h, cc_base, total_seq_len);
- if (unlikely(rc != 0 )) {
+ if (unlikely(rc != 0)) {
return rc;
}
set_queue_last_ind(&desc[(len - 1)]);
@@ -455,11 +455,11 @@ static void proc_completions(struct ssi_drvdata *drvdata)
struct platform_device *plat_dev = drvdata->plat_dev;
struct ssi_request_mgr_handle * request_mgr_handle =
drvdata->request_mgr_handle;
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
int rc = 0;
#endif
- while(request_mgr_handle->axi_completed) {
+ while (request_mgr_handle->axi_completed) {
request_mgr_handle->axi_completed--;
/* Dequeue request */
@@ -480,7 +480,7 @@ static void proc_completions(struct ssi_drvdata *drvdata)
u32 axi_err;
int i;
SSI_LOG_INFO("Delay\n");
- for (i=0;i<1000000;i++) {
+ for (i = 0; i < 1000000; i++) {
axi_err = READ_REGISTER(drvdata->cc_base + CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR));
}
}
@@ -492,10 +492,10 @@ static void proc_completions(struct ssi_drvdata *drvdata)
request_mgr_handle->req_queue_tail = (request_mgr_handle->req_queue_tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1);
SSI_LOG_DEBUG("Dequeue request tail=%u\n", request_mgr_handle->req_queue_tail);
SSI_LOG_DEBUG("Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed);
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
rc = ssi_power_mgr_runtime_put_suspend(&plat_dev->dev);
if (rc != 0) {
- SSI_LOG_ERR("Failed to set runtime suspension %d\n",rc);
+ SSI_LOG_ERR("Failed to set runtime suspension %d\n", rc);
}
#endif
}
@@ -561,7 +561,7 @@ static void comp_handler(unsigned long devarg)
* resume the queue configuration - no need to take the lock as this happens inside
* the spin lock protection
*/
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
int ssi_request_mgr_runtime_resume_queue(struct ssi_drvdata *drvdata)
{
struct ssi_request_mgr_handle * request_mgr_handle = drvdata->request_mgr_handle;
@@ -570,7 +570,7 @@ int ssi_request_mgr_runtime_resume_queue(struct ssi_drvdata *drvdata)
request_mgr_handle->is_runtime_suspended = false;
spin_unlock_bh(&request_mgr_handle->hw_lock);
- return 0 ;
+ return 0;
}
/*
@@ -600,7 +600,7 @@ bool ssi_request_mgr_is_queue_runtime_suspend(struct ssi_drvdata *drvdata)
struct ssi_request_mgr_handle * request_mgr_handle =
drvdata->request_mgr_handle;
- return request_mgr_handle->is_runtime_suspended;
+ return request_mgr_handle->is_runtime_suspended;
}
#endif
diff --git a/drivers/staging/ccree/ssi_request_mgr.h b/drivers/staging/ccree/ssi_request_mgr.h
index c4036ab..bdbbf89 100644
--- a/drivers/staging/ccree/ssi_request_mgr.h
+++ b/drivers/staging/ccree/ssi_request_mgr.h
@@ -33,8 +33,8 @@ int request_mgr_init(struct ssi_drvdata *drvdata);
* \param desc The crypto sequence
* \param len The crypto sequence length
* \param is_dout If "true": completion is handled by the caller
- * If "false": this function adds a dummy descriptor completion
- * and waits upon completion signal.
+ * If "false": this function adds a dummy descriptor completion
+ * and waits upon completion signal.
*
* \return int Returns -EINPROGRESS if "is_dout=ture"; "0" if "is_dout=false"
*/
@@ -49,7 +49,7 @@ void complete_request(struct ssi_drvdata *drvdata);
void request_mgr_fini(struct ssi_drvdata *drvdata);
-#if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP)
+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
int ssi_request_mgr_runtime_resume_queue(struct ssi_drvdata *drvdata);
int ssi_request_mgr_runtime_suspend_queue(struct ssi_drvdata *drvdata);
diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c
index 69e1ae4..db70300 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -66,7 +66,7 @@ static struct stat_name stat_name_db[MAX_STAT_OP_TYPES] =
.stat_phase_name[STAT_PHASE_5] = "Sequence completion",
.stat_phase_name[STAT_PHASE_6] = "HW cycles",
},
- { .op_type_name = "Setkey",
+ { .op_type_name = "Setkey",
.stat_phase_name[STAT_PHASE_0] = "Init and sanity checks",
.stat_phase_name[STAT_PHASE_1] = "Copy key to ctx",
.stat_phase_name[STAT_PHASE_2] = "Create sequence",
@@ -114,8 +114,8 @@ static void init_db(struct stat_item item[MAX_STAT_OP_TYPES][MAX_STAT_PHASES])
unsigned int i, j;
/* Clear db */
- for (i=0; i<MAX_STAT_OP_TYPES; i++) {
- for (j=0; j<MAX_STAT_PHASES; j++) {
+ for (i = 0; i < MAX_STAT_OP_TYPES; i++) {
+ for (j = 0; j < MAX_STAT_PHASES; j++) {
item[i][j].min = 0xFFFFFFFF;
item[i][j].max = 0;
item[i][j].sum = 0;
@@ -130,7 +130,7 @@ static void update_db(struct stat_item *item, unsigned int result)
item->sum += result;
if (result < item->min)
item->min = result;
- if (result > item->max )
+ if (result > item->max)
item->max = result;
}
@@ -139,8 +139,8 @@ static void display_db(struct stat_item item[MAX_STAT_OP_TYPES][MAX_STAT_PHASES]
unsigned int i, j;
u64 avg;
- for (i=STAT_OP_TYPE_ENCODE; i<MAX_STAT_OP_TYPES; i++) {
- for (j=0; j<MAX_STAT_PHASES; j++) {
+ for (i = STAT_OP_TYPE_ENCODE; i < MAX_STAT_OP_TYPES; i++) {
+ for (j = 0; j < MAX_STAT_PHASES; j++) {
if (item[i][j].count > 0) {
avg = (u64)item[i][j].sum;
do_div(avg, item[i][j].count);
@@ -174,18 +174,18 @@ static ssize_t ssi_sys_stats_cc_db_clear(struct kobject *kobj,
static ssize_t ssi_sys_stat_host_db_show(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
- int i, j ;
+ int i, j;
char line[512];
u32 min_cyc, max_cyc;
u64 avg;
- ssize_t buf_len, tmp_len=0;
+ ssize_t buf_len, tmp_len = 0;
- buf_len = scnprintf(buf,PAGE_SIZE,
+ buf_len = scnprintf(buf, PAGE_SIZE,
"phase\t\t\t\t\t\t\tmin[cy]\tavg[cy]\tmax[cy]\t#samples\n");
- if ( buf_len <0 )/* scnprintf shouldn't return negative value according to its implementation*/
+ if (buf_len < 0)/* scnprintf shouldn't return negative value according to its implementation*/
return buf_len;
- for (i=STAT_OP_TYPE_ENCODE; i<MAX_STAT_OP_TYPES; i++) {
- for (j=0; j<MAX_STAT_PHASES-1; j++) {
+ for (i = STAT_OP_TYPE_ENCODE; i < MAX_STAT_OP_TYPES; i++) {
+ for (j = 0; j < MAX_STAT_PHASES - 1; j++) {
if (stat_host_db[i][j].count > 0) {
avg = (u64)stat_host_db[i][j].sum;
do_div(avg, stat_host_db[i][j].count);
@@ -194,18 +194,18 @@ static ssize_t ssi_sys_stat_host_db_show(struct kobject *kobj,
} else {
avg = min_cyc = max_cyc = 0;
}
- tmp_len = scnprintf(line,512,
+ tmp_len = scnprintf(line, 512,
"%s::%s\t\t\t\t\t%6u\t%6u\t%6u\t%7u\n",
stat_name_db[i].op_type_name,
stat_name_db[i].stat_phase_name[j],
min_cyc, (unsigned int)avg, max_cyc,
stat_host_db[i][j].count);
- if ( tmp_len <0 )/* scnprintf shouldn't return negative value according to its implementation*/
+ if (tmp_len < 0)/* scnprintf shouldn't return negative value according to its implementation*/
return buf_len;
- if ( buf_len + tmp_len >= PAGE_SIZE)
+ if (buf_len + tmp_len >= PAGE_SIZE)
return buf_len;
buf_len += tmp_len;
- strncat(buf, line,512);
+ strncat(buf, line, 512);
}
}
return buf_len;
@@ -218,13 +218,13 @@ static ssize_t ssi_sys_stat_cc_db_show(struct kobject *kobj,
char line[256];
u32 min_cyc, max_cyc;
u64 avg;
- ssize_t buf_len,tmp_len=0;
+ ssize_t buf_len, tmp_len = 0;
- buf_len = scnprintf(buf,PAGE_SIZE,
+ buf_len = scnprintf(buf, PAGE_SIZE,
"phase\tmin[cy]\tavg[cy]\tmax[cy]\t#samples\n");
- if ( buf_len <0 )/* scnprintf shouldn't return negative value according to its implementation*/
+ if (buf_len < 0)/* scnprintf shouldn't return negative value according to its implementation*/
return buf_len;
- for (i=STAT_OP_TYPE_ENCODE; i<MAX_STAT_OP_TYPES; i++) {
+ for (i = STAT_OP_TYPE_ENCODE; i < MAX_STAT_OP_TYPES; i++) {
if (stat_cc_db[i][STAT_PHASE_6].count > 0) {
avg = (u64)stat_cc_db[i][STAT_PHASE_6].sum;
do_div(avg, stat_cc_db[i][STAT_PHASE_6].count);
@@ -233,7 +233,7 @@ static ssize_t ssi_sys_stat_cc_db_show(struct kobject *kobj,
} else {
avg = min_cyc = max_cyc = 0;
}
- tmp_len = scnprintf(line,256,
+ tmp_len = scnprintf(line, 256,
"%s\t%6u\t%6u\t%6u\t%7u\n",
stat_name_db[i].op_type_name,
min_cyc,
@@ -241,13 +241,13 @@ static ssize_t ssi_sys_stat_cc_db_show(struct kobject *kobj,
max_cyc,
stat_cc_db[i][STAT_PHASE_6].count);
- if ( tmp_len < 0 )/* scnprintf shouldn't return negative value according to its implementation*/
+ if (tmp_len < 0)/* scnprintf shouldn't return negative value according to its implementation*/
return buf_len;
- if ( buf_len + tmp_len >= PAGE_SIZE)
+ if (buf_len + tmp_len >= PAGE_SIZE)
return buf_len;
buf_len += tmp_len;
- strncat(buf, line,256);
+ strncat(buf, line, 256);
}
return buf_len;
}
@@ -304,7 +304,7 @@ static ssize_t ssi_sys_regdump_show(struct kobject *kobj,
static ssize_t ssi_sys_help_show(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
- char* help_str[]={
+ char* help_str[] = {
"cat reg_dump ", "Print several of CC register values",
#if defined CC_CYCLE_COUNT
"cat stats_host ", "Print host statistics",
@@ -313,11 +313,11 @@ static ssize_t ssi_sys_help_show(struct kobject *kobj,
"echo <number> > stats_cc ", "Clear CC statistics database",
#endif
};
- int i=0, offset = 0;
+ int i = 0, offset = 0;
offset += scnprintf(buf + offset, PAGE_SIZE - offset, "Usage:\n");
- for ( i = 0; i < ARRAY_SIZE(help_str); i+=2) {
- offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s\t\t%s\n", help_str[i], help_str[i+1]);
+ for (i = 0; i < ARRAY_SIZE(help_str); i += 2) {
+ offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s\t\t%s\n", help_str[i], help_str[i + 1]);
}
return offset;
}
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 02/14] staging: ccree: drop comparsion to true/false
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 01/14] staging: ccree: fix missing or redundant spaces Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 03/14] staging: ccree: fix else placement Gilad Ben-Yossef
` (11 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Fix cases in ccree where explicit comparsion to true/false
was made.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_aead.c | 18 +++++++++---------
drivers/staging/ccree/ssi_buffer_mgr.c | 20 ++++++++++----------
drivers/staging/ccree/ssi_cipher.c | 2 +-
drivers/staging/ccree/ssi_driver.c | 4 ++--
4 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 2e8dc3f..00375b6 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -236,7 +236,7 @@ static void ssi_aead_complete(struct device *dev, void *ssi_req, void __iomem *c
err = -EBADMSG;
}
} else { /*ENCRYPT*/
- if (unlikely(areq_ctx->is_icv_fragmented == true))
+ if (unlikely(areq_ctx->is_icv_fragmented))
ssi_buffer_mgr_copy_scatterlist_portion(
areq_ctx->mac_buf, areq_ctx->dstSgl, areq->cryptlen + areq_ctx->dstOffset,
areq->cryptlen + areq_ctx->dstOffset + ctx->authsize, SSI_SG_FROM_BUF);
@@ -790,7 +790,7 @@ ssi_aead_process_authenc_data_desc(
ssi_sram_addr_t mlli_addr = areq_ctx->assoc.sram_addr;
u32 mlli_nents = areq_ctx->assoc.mlli_nents;
- if (likely(areq_ctx->is_single_pass == true)) {
+ if (likely(areq_ctx->is_single_pass)) {
if (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) {
mlli_addr = areq_ctx->dst.sram_addr;
mlli_nents = areq_ctx->dst.mlli_nents;
@@ -1173,7 +1173,7 @@ static inline void ssi_aead_load_mlli_to_sram(
if (unlikely(
(req_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) ||
(req_ctx->data_buff_type == SSI_DMA_BUF_MLLI) ||
- (req_ctx->is_single_pass == false))) {
+ !req_ctx->is_single_pass)) {
SSI_LOG_DEBUG("Copy-to-sram: mlli_dma=%08x, mlli_size=%u\n",
(unsigned int)ctx->drvdata->mlli_sram_addr,
req_ctx->mlli_params.mlli_len);
@@ -1228,7 +1228,7 @@ static inline void ssi_aead_hmac_authenc(
unsigned int data_flow_mode = ssi_aead_get_data_flow_mode(
direct, ctx->flow_mode, req_ctx->is_single_pass);
- if (req_ctx->is_single_pass == true) {
+ if (req_ctx->is_single_pass) {
/**
* Single-pass flow
*/
@@ -1282,7 +1282,7 @@ ssi_aead_xcbc_authenc(
unsigned int data_flow_mode = ssi_aead_get_data_flow_mode(
direct, ctx->flow_mode, req_ctx->is_single_pass);
- if (req_ctx->is_single_pass == true) {
+ if (req_ctx->is_single_pass) {
/**
* Single-pass flow
*/
@@ -1341,7 +1341,7 @@ static int validate_data_size(struct ssi_aead_ctx *ctx,
if (ctx->cipher_mode == DRV_CIPHER_CCM)
break;
if (ctx->cipher_mode == DRV_CIPHER_GCTR) {
- if (areq_ctx->plaintext_authenticate_only == true)
+ if (areq_ctx->plaintext_authenticate_only)
areq_ctx->is_single_pass = false;
break;
}
@@ -1715,7 +1715,7 @@ static inline void ssi_aead_gcm_setup_gctr_desc(
set_flow_mode(&desc[idx], S_DIN_to_AES);
idx++;
- if ((req_ctx->cryptlen != 0) && (req_ctx->plaintext_authenticate_only == false)) {
+ if ((req_ctx->cryptlen != 0) && (!req_ctx->plaintext_authenticate_only)) {
/* load AES/CTR initial CTR value inc by 2*/
hw_desc_init(&desc[idx]);
set_cipher_mode(&desc[idx], DRV_CIPHER_GCTR);
@@ -1815,7 +1815,7 @@ static inline int ssi_aead_gcm(
//in RFC4543 no data to encrypt. just copy data from src to dest.
- if (req_ctx->plaintext_authenticate_only == true) {
+ if (req_ctx->plaintext_authenticate_only) {
ssi_aead_process_cipher_data_desc(req, BYPASS, desc, seq_size);
ssi_aead_gcm_setup_ghash_desc(req, desc, seq_size);
/* process(ghash) assoc data */
@@ -1913,7 +1913,7 @@ static int config_gcm_context(struct aead_request *req)
memcpy(req_ctx->gcm_iv_inc1, req->iv, 16);
- if (req_ctx->plaintext_authenticate_only == false) {
+ if (!req_ctx->plaintext_authenticate_only) {
__be64 temp64;
temp64 = cpu_to_be64(req->assoclen * 8);
memcpy(&req_ctx->gcm_len_block.lenA, &temp64, sizeof(temp64));
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index 00d95c1..5c46145 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -798,7 +798,7 @@ static inline int ssi_buffer_mgr_aead_chain_iv(
SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
hw_iv_size, req->iv,
(unsigned long long)areq_ctx->gen_ctx.iv_dma_addr);
- if (do_chain == true && areq_ctx->plaintext_authenticate_only == true) { // TODO: what about CTR?? ask Ron
+ if (do_chain && areq_ctx->plaintext_authenticate_only) { // TODO: what about CTR?? ask Ron
struct crypto_aead *tfm = crypto_aead_reqtfm(req);
unsigned int iv_size_to_authenc = crypto_aead_ivsize(tfm);
unsigned int iv_ofs = GCM_BLOCK_RFC4_IV_OFFSET;
@@ -894,7 +894,7 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
else
areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
- if (unlikely((do_chain == true) ||
+ if (unlikely((do_chain) ||
(areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI))) {
SSI_LOG_DEBUG("Chain assoc: buff_type=%s nents=%u\n",
@@ -975,7 +975,7 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
goto prepare_data_mlli_exit;
}
- if (unlikely(areq_ctx->is_icv_fragmented == true)) {
+ if (unlikely(areq_ctx->is_icv_fragmented)) {
/* Backup happens only when ICV is fragmented, ICV
* verification is made by CPU compare in order to simplify
* MAC verification upon request completion
@@ -1033,7 +1033,7 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
goto prepare_data_mlli_exit;
}
- if (unlikely(areq_ctx->is_icv_fragmented == true)) {
+ if (unlikely(areq_ctx->is_icv_fragmented)) {
/* Backup happens only when ICV is fragmented, ICV
* verification is made by CPU compare in order to simplify
* MAC verification upon request completion
@@ -1076,7 +1076,7 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
goto prepare_data_mlli_exit;
}
- if (likely(areq_ctx->is_icv_fragmented == false)) {
+ if (likely(!areq_ctx->is_icv_fragmented)) {
/* Contig. ICV */
areq_ctx->icv_dma_addr = sg_dma_address(
&areq_ctx->dstSgl[areq_ctx->dst.nents - 1]) +
@@ -1200,7 +1200,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
areq_ctx->dstOffset = offset;
if ((src_mapped_nents > 1) ||
(dst_mapped_nents > 1) ||
- (do_chain == true)) {
+ do_chain) {
areq_ctx->data_buff_type = SSI_DMA_BUF_MLLI;
rc = ssi_buffer_mgr_prepare_aead_data_mlli(drvdata, req, sg_data,
&src_last_bytes, &dst_last_bytes, is_last_table);
@@ -1233,7 +1233,7 @@ static void ssi_buffer_mgr_update_aead_mlli_nents(struct ssi_drvdata *drvdata,
areq_ctx->src.sram_addr = drvdata->mlli_sram_addr +
curr_mlli_size;
areq_ctx->dst.sram_addr = areq_ctx->src.sram_addr;
- if (areq_ctx->is_single_pass == false)
+ if (!areq_ctx->is_single_pass)
areq_ctx->assoc.mlli_nents +=
areq_ctx->src.mlli_nents;
} else {
@@ -1246,7 +1246,7 @@ static void ssi_buffer_mgr_update_aead_mlli_nents(struct ssi_drvdata *drvdata,
areq_ctx->src.sram_addr +
areq_ctx->src.mlli_nents *
LLI_ENTRY_BYTE_SIZE;
- if (areq_ctx->is_single_pass == false)
+ if (!areq_ctx->is_single_pass)
areq_ctx->assoc.mlli_nents +=
areq_ctx->src.mlli_nents;
} else {
@@ -1257,7 +1257,7 @@ static void ssi_buffer_mgr_update_aead_mlli_nents(struct ssi_drvdata *drvdata,
areq_ctx->dst.sram_addr +
areq_ctx->dst.mlli_nents *
LLI_ENTRY_BYTE_SIZE;
- if (areq_ctx->is_single_pass == false)
+ if (!areq_ctx->is_single_pass)
areq_ctx->assoc.mlli_nents +=
areq_ctx->dst.mlli_nents;
}
@@ -1399,7 +1399,7 @@ int ssi_buffer_mgr_map_aead_request(
goto aead_map_failure;
}
- if (likely(areq_ctx->is_single_pass == true)) {
+ if (likely(areq_ctx->is_single_pass)) {
/*
* Create MLLI table for:
* (1) Assoc. data
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index 519e04e..1dab3e6 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -839,7 +839,7 @@ static int ssi_blkcipher_process(
desc, &seq_len);
/* do we need to generate IV? */
- if (req_ctx->is_giv == true) {
+ if (req_ctx->is_giv) {
ssi_req.ivgen_dma_addr[0] = req_ctx->gen_ctx.iv_dma_addr;
ssi_req.ivgen_dma_addr_len = 1;
/* set the IV size (8/16 B long)*/
diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c
index 7c94354..05930e8 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -205,13 +205,13 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
cache_params = (drvdata->coherent ? CC_COHERENT_CACHE_PARAMS : 0x0);
val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS));
- if (is_probe == true) {
+ if (is_probe) {
SSI_LOG_INFO("Cache params previous: 0x%08X\n", val);
}
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS),
cache_params);
val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS));
- if (is_probe == true) {
+ if (is_probe) {
SSI_LOG_INFO("Cache params current: 0x%08X (expect: 0x%08X)\n",
val, cache_params);
}
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 03/14] staging: ccree: fix else placement
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 01/14] staging: ccree: fix missing or redundant spaces Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 02/14] staging: ccree: drop comparsion to true/false Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 04/14] staging: ccree: remove redundant blank lines Gilad Ben-Yossef
` (10 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Fix cases where the else clause was not located correctly after the if
brace.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_buffer_mgr.c | 3 +--
drivers/staging/ccree/ssi_pm.c | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index 5c46145..3c74ae3 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -852,8 +852,7 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
sg_index = current_sg->length;
if (sg_index > size_of_assoc) { //the first entry in the scatter list contains all the associated data
mapped_nents++;
- }
- else{
+ } else {
while (sg_index <= size_of_assoc) {
current_sg = sg_next(current_sg);
//if have reached the end of the sgl, then this is unexpected
diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c
index c8c5875..ae1f7f0 100644
--- a/drivers/staging/ccree/ssi_pm.c
+++ b/drivers/staging/ccree/ssi_pm.c
@@ -110,8 +110,7 @@ int ssi_power_mgr_runtime_put_suspend(struct device *dev)
(struct ssi_drvdata *)dev_get_drvdata(dev))) {
pm_runtime_mark_last_busy(dev);
rc = pm_runtime_put_autosuspend(dev);
- }
- else {
+ } else {
/* Something wrong happens*/
BUG();
}
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 04/14] staging: ccree: remove redundant blank lines
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (2 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 03/14] staging: ccree: fix else placement Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 05/14] staging: ccree: no need for braces for single statements Gilad Ben-Yossef
` (9 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Remove redundant blank lines in brace blocks
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_aead.c | 2 --
drivers/staging/ccree/ssi_buffer_mgr.c | 8 --------
drivers/staging/ccree/ssi_cipher.c | 5 -----
drivers/staging/ccree/ssi_driver.c | 1 -
drivers/staging/ccree/ssi_hash.c | 2 --
drivers/staging/ccree/ssi_pm.c | 1 -
drivers/staging/ccree/ssi_request_mgr.c | 1 -
7 files changed, 20 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 00375b6..5782c9d 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -2042,7 +2042,6 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
/* do we need to generate IV? */
if (areq_ctx->backup_giv != NULL) {
-
/* set the DMA mapped IV address*/
if (ctx->cipher_mode == DRV_CIPHER_CTR) {
ssi_req.ivgen_dma_addr[0] = areq_ctx->gen_ctx.iv_dma_addr + CTR_RFC3686_NONCE_SIZE;
@@ -2181,7 +2180,6 @@ static int ssi_aead_decrypt(struct aead_request *req)
req->iv = areq_ctx->backup_iv;
return rc;
-
}
#if SSI_CC_HAS_AES_CCM
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index 3c74ae3..63f057e 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -608,7 +608,6 @@ int ssi_buffer_mgr_map_blkcipher_request(
rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
if (unlikely(rc != 0))
goto ablkcipher_exit;
-
}
SSI_LOG_DEBUG("areq_ctx->dma_buf_type = %s\n",
@@ -877,7 +876,6 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
if (unlikely((mapped_nents + 1) >
LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) {
-
SSI_LOG_ERR("CCM case.Too many fragments. "
"Current %d max %d\n",
(areq_ctx->assoc.nents + 1),
@@ -895,7 +893,6 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
if (unlikely((do_chain) ||
(areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI))) {
-
SSI_LOG_DEBUG("Chain assoc: buff_type=%s nents=%u\n",
GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
areq_ctx->assoc.nents);
@@ -1178,7 +1175,6 @@ static inline int ssi_buffer_mgr_aead_chain_data(
//check where the data starts
while (sg_index <= size_to_skip) {
-
offset -= areq_ctx->dstSgl->length;
areq_ctx->dstSgl = sg_next(areq_ctx->dstSgl);
//if have reached the end of the sgl, then this is unexpected
@@ -1450,7 +1446,6 @@ int ssi_buffer_mgr_map_aead_request(
if (unlikely(
(areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) ||
(areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI))) {
-
mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
if (unlikely(rc != 0)) {
@@ -1528,7 +1523,6 @@ int ssi_buffer_mgr_map_hash_request_final(
} else {
areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI;
}
-
}
/*build mlli */
@@ -1675,7 +1669,6 @@ int ssi_buffer_mgr_map_hash_request_update(
mlli_params) != 0)) {
goto fail_unmap_din;
}
-
}
areq_ctx->buff_index = (areq_ctx->buff_index ^ swap_index);
@@ -1771,7 +1764,6 @@ int ssi_buffer_mgr_fini(struct ssi_drvdata *drvdata)
dma_pool_destroy(buff_mgr_handle->mlli_buffs_pool);
kfree(drvdata->buff_mgr_handle);
drvdata->buff_mgr_handle = NULL;
-
}
return 0;
}
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index 1dab3e6..722b307 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -104,7 +104,6 @@ static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) {
#endif
default:
break;
-
}
return -EINVAL;
}
@@ -158,7 +157,6 @@ static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int siz
#endif /*SSI_CC_HAS_MULTI2*/
default:
break;
-
}
return -EINVAL;
}
@@ -498,7 +496,6 @@ ssi_blkcipher_create_setup_desc(
set_cipher_mode(&desc[*seq_size], cipher_mode);
set_cipher_config0(&desc[*seq_size], direction);
if (flow_mode == S_DIN_to_AES) {
-
if (ssi_is_hw_key(tfm)) {
set_hw_crypto_key(&desc[*seq_size],
ctx_p->hw.key1_slot);
@@ -616,7 +613,6 @@ static inline void ssi_blkcipher_create_multi2_setup_desc(
set_cipher_mode(&desc[*seq_size], ctx_p->cipher_mode);
set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE1);
(*seq_size)++;
-
}
#endif /*SSI_CC_HAS_MULTI2*/
@@ -782,7 +778,6 @@ static int ssi_blkcipher_process(
}
/*For CTS in case of data size aligned to 16 use CBC mode*/
if (((nbytes % AES_BLOCK_SIZE) == 0) && (ctx_p->cipher_mode == DRV_CIPHER_CBC_CTS)) {
-
ctx_p->cipher_mode = DRV_CIPHER_CBC;
cts_restore_flag = 1;
}
diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c
index 05930e8..3168930 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -444,7 +444,6 @@ void fini_cc_regs(struct ssi_drvdata *drvdata)
/* Mask all interrupts */
WRITE_REGISTER(drvdata->cc_base +
CC_REG_OFFSET(HOST_RGF, HOST_IMR), 0xFFFFFFFF);
-
}
static void cleanup_cc_resources(struct platform_device *plat_dev)
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 64e969e..9d5e54d 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -1323,7 +1323,6 @@ static void ssi_hash_free_ctx(struct ssi_hash_ctx *ctx)
}
ctx->key_params.keylen = 0;
-
}
@@ -2365,7 +2364,6 @@ int ssi_hash_free(struct ssi_drvdata *drvdata)
struct ssi_hash_handle *hash_handle = drvdata->hash_handle;
if (hash_handle != NULL) {
-
list_for_each_entry_safe(t_hash_alg, hash_n, &hash_handle->hash_list, entry) {
crypto_unregister_ahash(&t_hash_alg->ahash_alg);
list_del(&t_hash_alg->entry);
diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c
index ae1f7f0..d3ddfb1 100644
--- a/drivers/staging/ccree/ssi_pm.c
+++ b/drivers/staging/ccree/ssi_pm.c
@@ -115,7 +115,6 @@ int ssi_power_mgr_runtime_put_suspend(struct device *dev)
BUG();
}
return rc;
-
}
#endif
diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c
index 3176578..8f7d2ec 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -549,7 +549,6 @@ static void comp_handler(unsigned long devarg)
request_mgr_handle->axi_completed +=
cc_axi_comp_count(cc_base);
}
-
}
/* after verifing that there is nothing to do, Unmask AXI completion interrupt */
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR),
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 05/14] staging: ccree: no need for braces for single statements
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (3 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 04/14] staging: ccree: remove redundant blank lines Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 06/14] staging: ccree: fix unmatched if/else braces Gilad Ben-Yossef
` (8 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Fix several cases of needless braces around single statement blocks.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_aead.c | 38 +++++++-----------
drivers/staging/ccree/ssi_buffer_mgr.c | 70 ++++++++++++++-------------------
drivers/staging/ccree/ssi_cipher.c | 41 +++++++------------
drivers/staging/ccree/ssi_driver.c | 9 +++--
drivers/staging/ccree/ssi_fips.c | 6 +--
drivers/staging/ccree/ssi_fips_ext.c | 6 +--
drivers/staging/ccree/ssi_fips_local.c | 39 +++++++++---------
drivers/staging/ccree/ssi_hash.c | 35 ++++++-----------
drivers/staging/ccree/ssi_ivgen.c | 4 +-
drivers/staging/ccree/ssi_request_mgr.c | 20 ++++------
drivers/staging/ccree/ssi_sysfs.c | 4 +-
11 files changed, 110 insertions(+), 162 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 5782c9d..fdb257d 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -243,11 +243,10 @@ static void ssi_aead_complete(struct device *dev, void *ssi_req, void __iomem *c
/* If an IV was generated, copy it back to the user provided buffer. */
if (areq_ctx->backup_giv != NULL) {
- if (ctx->cipher_mode == DRV_CIPHER_CTR) {
+ if (ctx->cipher_mode == DRV_CIPHER_CTR)
memcpy(areq_ctx->backup_giv, areq_ctx->ctr_iv + CTR_RFC3686_NONCE_SIZE, CTR_RFC3686_IV_SIZE);
- } else if (ctx->cipher_mode == DRV_CIPHER_CCM) {
+ else if (ctx->cipher_mode == DRV_CIPHER_CCM)
memcpy(areq_ctx->backup_giv, areq_ctx->ctr_iv + CCM_BLOCK_IV_OFFSET, CCM_BLOCK_IV_SIZE);
- }
}
}
@@ -521,9 +520,8 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int keyl
if (unlikely(rc != 0))
SSI_LOG_ERR("send_request() failed (rc=%d)\n", rc);
- if (likely(key_dma_addr != 0)) {
+ if (likely(key_dma_addr != 0))
dma_unmap_single(dev, key_dma_addr, keylen, DMA_TO_DEVICE);
- }
return rc;
}
@@ -928,11 +926,10 @@ static inline void ssi_aead_setup_cipher_desc(
set_flow_mode(&desc[idx], ctx->flow_mode);
set_din_type(&desc[idx], DMA_DLLI, req_ctx->gen_ctx.iv_dma_addr,
hw_iv_size, NS_BIT);
- if (ctx->cipher_mode == DRV_CIPHER_CTR) {
+ if (ctx->cipher_mode == DRV_CIPHER_CTR)
set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
- } else {
+ else
set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
- }
set_cipher_mode(&desc[idx], ctx->cipher_mode);
idx++;
@@ -1375,9 +1372,9 @@ static int validate_data_size(struct ssi_aead_ctx *ctx,
static unsigned int format_ccm_a0(u8 *pA0Buff, u32 headerSize)
{
unsigned int len = 0;
- if (headerSize == 0) {
+ if (headerSize == 0)
return 0;
- }
+
if (headerSize < ((1UL << 16) - (1UL << 8))) {
len = 2;
@@ -1498,9 +1495,8 @@ static inline int ssi_aead_ccm(
}
/* process the cipher */
- if (req_ctx->cryptlen != 0) {
+ if (req_ctx->cryptlen != 0)
ssi_aead_process_cipher_data_desc(req, cipher_flow_mode, desc, &idx);
- }
/* Read temporal MAC */
hw_desc_init(&desc[idx]);
@@ -1579,9 +1575,8 @@ static int config_ccm_adata(struct aead_request *req)
*b0 |= 64; /* Enable bit 6 if Adata exists. */
rc = set_msg_len(b0 + 16 - l, cryptlen, l); /* Write L'. */
- if (rc != 0) {
+ if (rc != 0)
return rc;
- }
/* END of "taken from crypto/ccm.c" */
/* l(a) - size of associated data. */
@@ -1861,9 +1856,8 @@ static inline void ssi_aead_dump_gcm(
SSI_LOG_DEBUG("cipher_mode %d, authsize %d, enc_keylen %d, assoclen %d, cryptlen %d\n", \
ctx->cipher_mode, ctx->authsize, ctx->enc_keylen, req->assoclen, req_ctx->cryptlen);
- if (ctx->enckey != NULL) {
+ if (ctx->enckey != NULL)
dump_byte_array("mac key", ctx->enckey, 16);
- }
dump_byte_array("req->iv", req->iv, AES_BLOCK_SIZE);
@@ -1877,13 +1871,11 @@ static inline void ssi_aead_dump_gcm(
dump_byte_array("gcm_len_block", req_ctx->gcm_len_block.lenA, AES_BLOCK_SIZE);
- if (req->src != NULL && req->cryptlen) {
+ if (req->src != NULL && req->cryptlen)
dump_byte_array("req->src", sg_virt(req->src), req->cryptlen + req->assoclen);
- }
- if (req->dst != NULL) {
+ if (req->dst != NULL)
dump_byte_array("req->dst", sg_virt(req->dst), req->cryptlen + ctx->authsize + req->assoclen);
- }
}
#endif
@@ -2083,14 +2075,12 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
#if (SSI_CC_HAS_AES_CCM || SSI_CC_HAS_AES_GCM)
case DRV_HASH_NULL:
#if SSI_CC_HAS_AES_CCM
- if (ctx->cipher_mode == DRV_CIPHER_CCM) {
+ if (ctx->cipher_mode == DRV_CIPHER_CCM)
ssi_aead_ccm(req, desc, &seq_len);
- }
#endif /*SSI_CC_HAS_AES_CCM*/
#if SSI_CC_HAS_AES_GCM
- if (ctx->cipher_mode == DRV_CIPHER_GCTR) {
+ if (ctx->cipher_mode == DRV_CIPHER_GCTR)
ssi_aead_gcm(req, desc, &seq_len);
- }
#endif /*SSI_CC_HAS_AES_GCM*/
break;
#endif
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index 63f057e..9e8a134 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -94,9 +94,8 @@ static unsigned int ssi_buffer_mgr_get_sgl_nents(
sg_list = sg_next(sg_list);
} else {
sg_list = (struct scatterlist *)sg_page(sg_list);
- if (is_chained != NULL) {
+ if (is_chained != NULL)
*is_chained = true;
- }
}
}
SSI_LOG_DEBUG("nents %d last bytes %d\n", nents, *lbytes);
@@ -155,9 +154,8 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli(
/* Verify there is no memory overflow*/
new_nents = (*curr_nents + buff_size / CC_MAX_MLLI_ENTRY_SIZE + 1);
- if (new_nents > MAX_NUM_OF_TOTAL_MLLI_ENTRIES) {
+ if (new_nents > MAX_NUM_OF_TOTAL_MLLI_ENTRIES)
return -ENOMEM;
- }
/*handle buffer longer than 64 kbytes */
while (buff_size > CC_MAX_MLLI_ENTRY_SIZE) {
@@ -201,9 +199,9 @@ static inline int ssi_buffer_mgr_render_scatterlist_to_mlli(
rc = ssi_buffer_mgr_render_buff_to_mlli(
sg_dma_address(curr_sgl) + sglOffset, entry_data_len, curr_nents,
&mlli_entry_p);
- if (rc != 0) {
+ if (rc != 0)
return rc;
- }
+
sglOffset = 0;
}
*mlli_entry_pp = mlli_entry_p;
@@ -244,9 +242,8 @@ static int ssi_buffer_mgr_generate_mlli(
sg_data->entry[i].buffer_dma,
sg_data->total_data_len[i], &total_nents,
&mlli_p);
- if (rc != 0) {
+ if (rc != 0)
return rc;
- }
/* set last bit in the current table */
if (sg_data->mlli_nents[i] != NULL) {
@@ -326,9 +323,8 @@ ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
u32 i, j;
struct scatterlist *l_sg = sg;
for (i = 0; i < nents; i++) {
- if (l_sg == NULL) {
+ if (l_sg == NULL)
break;
- }
if (unlikely(dma_map_sg(dev, l_sg, 1, direction) != 1)) {
SSI_LOG_ERR("dma_map_page() sg buffer failed\n");
goto err;
@@ -340,9 +336,8 @@ ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
err:
/* Restore mapped parts */
for (j = 0; j < i; j++) {
- if (sg == NULL) {
+ if (sg == NULL)
break;
- }
dma_unmap_sg(dev, sg, 1, direction);
sg = sg_next(sg);
}
@@ -687,9 +682,8 @@ void ssi_buffer_mgr_unmap_aead_request(
SSI_LOG_DEBUG("Unmapping src sgl: req->src=%pK areq_ctx->src.nents=%u areq_ctx->assoc.nents=%u assoclen:%u cryptlen=%u\n", sg_virt(req->src), areq_ctx->src.nents, areq_ctx->assoc.nents, req->assoclen, req->cryptlen);
size_to_unmap = req->assoclen + req->cryptlen;
- if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT) {
+ if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT)
size_to_unmap += areq_ctx->req_authsize;
- }
if (areq_ctx->is_gcm4543)
size_to_unmap += crypto_aead_ivsize(tfm);
@@ -705,9 +699,9 @@ void ssi_buffer_mgr_unmap_aead_request(
likely(req->src == req->dst))
{
u32 size_to_skip = req->assoclen;
- if (areq_ctx->is_gcm4543) {
+ if (areq_ctx->is_gcm4543)
size_to_skip += crypto_aead_ivsize(tfm);
- }
+
/* copy mac to a temporary location to deal with possible
* data memory overriding that caused by cache coherence problem.
*/
@@ -736,15 +730,13 @@ static inline int ssi_buffer_mgr_get_aead_icv_nents(
}
for (i = 0 ; i < (sgl_nents - MAX_ICV_NENTS_SUPPORTED) ; i++) {
- if (sgl == NULL) {
+ if (sgl == NULL)
break;
- }
sgl = sg_next(sgl);
}
- if (sgl != NULL) {
+ if (sgl != NULL)
icv_max_size = sgl->length;
- }
if (last_entry_data_size > authsize) {
nents = 0; /* ICV attached to data in last entry (not fragmented!) */
@@ -827,9 +819,8 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
unsigned int sg_index = 0;
u32 size_of_assoc = req->assoclen;
- if (areq_ctx->is_gcm4543) {
+ if (areq_ctx->is_gcm4543)
size_of_assoc += crypto_aead_ivsize(tfm);
- }
if (sg_data == NULL) {
rc = -EINVAL;
@@ -1035,9 +1026,9 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
* MAC verification upon request completion
*/
u32 size_to_skip = req->assoclen;
- if (areq_ctx->is_gcm4543) {
+ if (areq_ctx->is_gcm4543)
size_to_skip += crypto_aead_ivsize(tfm);
- }
+
ssi_buffer_mgr_copy_scatterlist_portion(
areq_ctx->backup_mac, req->src,
size_to_skip + req->cryptlen - areq_ctx->req_authsize,
@@ -1110,9 +1101,10 @@ static inline int ssi_buffer_mgr_aead_chain_data(
bool chained = false;
bool is_gcm4543 = areq_ctx->is_gcm4543;
u32 size_to_skip = req->assoclen;
- if (is_gcm4543) {
+
+ if (is_gcm4543)
size_to_skip += crypto_aead_ivsize(tfm);
- }
+
offset = size_to_skip;
if (sg_data == NULL) {
@@ -1122,9 +1114,8 @@ static inline int ssi_buffer_mgr_aead_chain_data(
areq_ctx->srcSgl = req->src;
areq_ctx->dstSgl = req->dst;
- if (is_gcm4543) {
+ if (is_gcm4543)
size_for_map += crypto_aead_ivsize(tfm);
- }
size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0;
src_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->src, size_for_map, &src_last_bytes, &chained);
@@ -1155,9 +1146,8 @@ static inline int ssi_buffer_mgr_aead_chain_data(
if (req->src != req->dst) {
size_for_map = req->assoclen + req->cryptlen;
size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0;
- if (is_gcm4543) {
+ if (is_gcm4543)
size_for_map += crypto_aead_ivsize(tfm);
- }
rc = ssi_buffer_mgr_map_scatterlist(dev, req->dst, size_for_map,
DMA_BIDIRECTIONAL, &(areq_ctx->dst.nents),
@@ -1285,9 +1275,10 @@ int ssi_buffer_mgr_map_aead_request(
likely(req->src == req->dst))
{
u32 size_to_skip = req->assoclen;
- if (is_gcm4543) {
+
+ if (is_gcm4543)
size_to_skip += crypto_aead_ivsize(tfm);
- }
+
/* copy mac to a temporary location to deal with possible
* data memory overriding that caused by cache coherence problem.
*/
@@ -1381,9 +1372,9 @@ int ssi_buffer_mgr_map_aead_request(
#endif /*SSI_CC_HAS_AES_GCM*/
size_to_map = req->cryptlen + req->assoclen;
- if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT) {
+ if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT)
size_to_map += authsize;
- }
+
if (is_gcm4543)
size_to_map += crypto_aead_ivsize(tfm);
rc = ssi_buffer_mgr_map_scatterlist(dev, req->src,
@@ -1448,9 +1439,8 @@ int ssi_buffer_mgr_map_aead_request(
(areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI))) {
mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
- if (unlikely(rc != 0)) {
+ if (unlikely(rc != 0))
goto aead_map_failure;
- }
ssi_buffer_mgr_update_aead_mlli_nents(drvdata, req);
SSI_LOG_DEBUG("assoc params mn %d\n", areq_ctx->assoc.mlli_nents);
@@ -1549,9 +1539,9 @@ int ssi_buffer_mgr_map_hash_request_final(
dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
unmap_curr_buff:
- if (*curr_buff_cnt != 0) {
+ if (*curr_buff_cnt != 0)
dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
- }
+
return -ENOMEM;
}
@@ -1678,9 +1668,9 @@ int ssi_buffer_mgr_map_hash_request_update(
dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
unmap_curr_buff:
- if (*curr_buff_cnt != 0) {
+ if (*curr_buff_cnt != 0)
dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
- }
+
return -ENOMEM;
}
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index 722b307..c233b7c 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -165,13 +165,11 @@ static unsigned int get_max_keysize(struct crypto_tfm *tfm)
{
struct ssi_crypto_alg *ssi_alg = container_of(tfm->__crt_alg, struct ssi_crypto_alg, crypto_alg);
- if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_ABLKCIPHER) {
+ if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_ABLKCIPHER)
return ssi_alg->crypto_alg.cra_ablkcipher.max_keysize;
- }
- if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_BLKCIPHER) {
+ if ((ssi_alg->crypto_alg.cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_BLKCIPHER)
return ssi_alg->crypto_alg.cra_blkcipher.max_keysize;
- }
return 0;
}
@@ -289,9 +287,8 @@ static int ssi_fips_verify_xts_keys(const u8 *key, unsigned int keylen)
/* Weak key is define as key that its first half (128/256 lsb) equals its second half (128/256 msb) */
int singleKeySize = keylen >> 1;
- if (unlikely(memcmp(key, &key[singleKeySize], singleKeySize) == 0)) {
+ if (unlikely(memcmp(key, &key[singleKeySize], singleKeySize) == 0))
return -ENOEXEC;
- }
#endif /* CCREE_FIPS_SUPPORT */
return 0;
@@ -333,9 +330,8 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
#if SSI_CC_HAS_MULTI2
/*last byte of key buffer is round number and should not be a part of key size*/
- if (ctx_p->flow_mode == S_DIN_to_MULTI2) {
+ if (ctx_p->flow_mode == S_DIN_to_MULTI2)
keylen -= 1;
- }
#endif /*SSI_CC_HAS_MULTI2*/
if (unlikely(validate_keys_sizes(ctx_p, keylen) != 0)) {
@@ -658,9 +654,9 @@ ssi_blkcipher_create_data_desc(
nbytes, NS_BIT);
set_dout_dlli(&desc[*seq_size], sg_dma_address(dst),
nbytes, NS_BIT, (!areq ? 0 : 1));
- if (areq != NULL) {
+ if (areq != NULL)
set_queue_last_ind(&desc[*seq_size]);
- }
+
set_flow_mode(&desc[*seq_size], flow_mode);
(*seq_size)++;
} else {
@@ -707,9 +703,9 @@ ssi_blkcipher_create_data_desc(
req_ctx->out_mlli_nents, NS_BIT,
(!areq ? 0 : 1));
}
- if (areq != NULL) {
+ if (areq != NULL)
set_queue_last_ind(&desc[*seq_size]);
- }
+
set_flow_mode(&desc[*seq_size], flow_mode);
(*seq_size)++;
}
@@ -809,22 +805,13 @@ static int ssi_blkcipher_process(
/* Setup processing */
#if SSI_CC_HAS_MULTI2
- if (ctx_p->flow_mode == S_DIN_to_MULTI2) {
- ssi_blkcipher_create_multi2_setup_desc(tfm,
- req_ctx,
- ivsize,
- desc,
- &seq_len);
- } else
+ if (ctx_p->flow_mode == S_DIN_to_MULTI2)
+ ssi_blkcipher_create_multi2_setup_desc(tfm, req_ctx, ivsize,
+ desc, &seq_len);
+ else
#endif /*SSI_CC_HAS_MULTI2*/
- {
- ssi_blkcipher_create_setup_desc(tfm,
- req_ctx,
- ivsize,
- nbytes,
- desc,
- &seq_len);
- }
+ ssi_blkcipher_create_setup_desc(tfm, req_ctx, ivsize, nbytes,
+ desc, &seq_len);
/* Data processing */
ssi_blkcipher_create_data_desc(tfm,
req_ctx,
diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c
index 3168930..330d24d 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -205,16 +205,17 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
cache_params = (drvdata->coherent ? CC_COHERENT_CACHE_PARAMS : 0x0);
val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS));
- if (is_probe) {
+
+ if (is_probe)
SSI_LOG_INFO("Cache params previous: 0x%08X\n", val);
- }
+
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS),
cache_params);
val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CACHE_PARAMS));
- if (is_probe) {
+
+ if (is_probe)
SSI_LOG_INFO("Cache params current: 0x%08X (expect: 0x%08X)\n",
val, cache_params);
- }
return 0;
}
diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c
index 60a2452..2e01a0a 100644
--- a/drivers/staging/ccree/ssi_fips.c
+++ b/drivers/staging/ccree/ssi_fips.c
@@ -34,9 +34,8 @@ int ssi_fips_get_state(ssi_fips_state_t *p_state)
{
int rc = 0;
- if (p_state == NULL) {
+ if (p_state == NULL)
return -EINVAL;
- }
rc = ssi_fips_ext_get_state(p_state);
@@ -53,9 +52,8 @@ int ssi_fips_get_error(ssi_fips_error_t *p_err)
{
int rc = 0;
- if (p_err == NULL) {
+ if (p_err == NULL)
return -EINVAL;
- }
rc = ssi_fips_ext_get_error(p_err);
diff --git a/drivers/staging/ccree/ssi_fips_ext.c b/drivers/staging/ccree/ssi_fips_ext.c
index aa90ddd..8b14061 100644
--- a/drivers/staging/ccree/ssi_fips_ext.c
+++ b/drivers/staging/ccree/ssi_fips_ext.c
@@ -41,9 +41,8 @@ int ssi_fips_ext_get_state(ssi_fips_state_t *p_state)
{
int rc = 0;
- if (p_state == NULL) {
+ if (p_state == NULL)
return -EINVAL;
- }
*p_state = fips_state;
@@ -60,9 +59,8 @@ int ssi_fips_ext_get_error(ssi_fips_error_t *p_err)
{
int rc = 0;
- if (p_err == NULL) {
+ if (p_err == NULL)
return -EINVAL;
- }
*p_err = fips_error;
diff --git a/drivers/staging/ccree/ssi_fips_local.c b/drivers/staging/ccree/ssi_fips_local.c
index 33a07e4..84d458a1 100644
--- a/drivers/staging/ccree/ssi_fips_local.c
+++ b/drivers/staging/ccree/ssi_fips_local.c
@@ -72,9 +72,9 @@ static enum ssi_fips_error ssi_fips_get_tee_error(struct ssi_drvdata *drvdata)
void __iomem *cc_base = drvdata->cc_base;
regVal = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, GPR_HOST));
- if (regVal == (CC_FIPS_SYNC_TEE_STATUS | CC_FIPS_SYNC_MODULE_OK)) {
+ if (regVal == (CC_FIPS_SYNC_TEE_STATUS | CC_FIPS_SYNC_MODULE_OK))
return CC_REE_FIPS_ERROR_OK;
- }
+
return CC_REE_FIPS_ERROR_FROM_TEE;
}
@@ -87,11 +87,10 @@ static enum ssi_fips_error ssi_fips_get_tee_error(struct ssi_drvdata *drvdata)
static void ssi_fips_update_tee_upon_ree_status(struct ssi_drvdata *drvdata, ssi_fips_error_t err)
{
void __iomem *cc_base = drvdata->cc_base;
- if (err == CC_REE_FIPS_ERROR_OK) {
+ if (err == CC_REE_FIPS_ERROR_OK)
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), (CC_FIPS_SYNC_REE_STATUS | CC_FIPS_SYNC_MODULE_OK));
- } else {
+ else
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), (CC_FIPS_SYNC_REE_STATUS | CC_FIPS_SYNC_MODULE_ERROR));
- }
}
@@ -152,9 +151,8 @@ static void fips_dsr(unsigned long devarg)
if (irq & SSI_GPR0_IRQ_MASK) {
teeFipsError = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, GPR_HOST));
- if (teeFipsError != (CC_FIPS_SYNC_TEE_STATUS | CC_FIPS_SYNC_MODULE_OK)) {
+ if (teeFipsError != (CC_FIPS_SYNC_TEE_STATUS | CC_FIPS_SYNC_MODULE_OK))
ssi_fips_set_error(drvdata, CC_REE_FIPS_ERROR_FROM_TEE);
- }
}
/* after verifing that there is nothing to do, Unmask AXI completion interrupt */
@@ -177,9 +175,9 @@ ssi_fips_error_t cc_fips_run_power_up_tests(struct ssi_drvdata *drvdata)
// the dma_handle is the returned phy address - use it in the HW descriptor
FIPS_DBG("dma_alloc_coherent \n");
cpu_addr_buffer = dma_alloc_coherent(dev, alloc_buff_size, &dma_handle, GFP_KERNEL);
- if (cpu_addr_buffer == NULL) {
+ if (cpu_addr_buffer == NULL)
return CC_REE_FIPS_ERROR_GENERAL;
- }
+
FIPS_DBG("allocated coherent buffer - addr 0x%08X , size = %d \n", (size_t)cpu_addr_buffer, alloc_buff_size);
#if FIPS_POWER_UP_TEST_CIPHER
@@ -269,30 +267,29 @@ int ssi_fips_set_error(struct ssi_drvdata *p_drvdata, ssi_fips_error_t err)
FIPS_LOG("ssi_fips_set_error - fips_error = %d \n", err);
// setting no error is not allowed
- if (err == CC_REE_FIPS_ERROR_OK) {
+ if (err == CC_REE_FIPS_ERROR_OK)
return -ENOEXEC;
- }
+
// If error exists, do not set new error
- if (ssi_fips_get_error(¤t_err) != 0) {
+ if (ssi_fips_get_error(¤t_err) != 0)
return -ENOEXEC;
- }
- if (current_err != CC_REE_FIPS_ERROR_OK) {
+
+ if (current_err != CC_REE_FIPS_ERROR_OK)
return -ENOEXEC;
- }
+
// set REE internal error and state
rc = ssi_fips_ext_set_error(err);
- if (rc != 0) {
+ if (rc != 0)
return -ENOEXEC;
- }
+
rc = ssi_fips_ext_set_state(CC_FIPS_STATE_ERROR);
- if (rc != 0) {
+ if (rc != 0)
return -ENOEXEC;
- }
// push error towards TEE libraray, if it's not TEE error
- if (err != CC_REE_FIPS_ERROR_FROM_TEE) {
+ if (err != CC_REE_FIPS_ERROR_FROM_TEE)
ssi_fips_update_tee_upon_ree_status(p_drvdata, err);
- }
+
return rc;
}
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 9d5e54d..265df94 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -215,11 +215,10 @@ static int ssi_hash_map_request(struct device *dev,
} else { /*sha*/
memcpy(state->digest_buff, ctx->digest_buff, ctx->inter_digestsize);
#if (DX_DEV_SHA_MAX > 256)
- if (unlikely((ctx->hash_mode == DRV_HASH_SHA512) || (ctx->hash_mode == DRV_HASH_SHA384))) {
+ if (unlikely((ctx->hash_mode == DRV_HASH_SHA512) || (ctx->hash_mode == DRV_HASH_SHA384)))
memcpy(state->digest_bytes_len, digest_len_sha512_init, HASH_LEN_SIZE);
- } else {
+ else
memcpy(state->digest_bytes_len, digest_len_init, HASH_LEN_SIZE);
- }
#else
memcpy(state->digest_bytes_len, digest_len_init, HASH_LEN_SIZE);
#endif
@@ -480,11 +479,10 @@ static int ssi_hash_digest(struct ahash_req_ctx *state,
NS_BIT);
} else {
set_din_const(&desc[idx], 0, HASH_LEN_SIZE);
- if (likely(nbytes != 0)) {
+ if (likely(nbytes != 0))
set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED);
- } else {
+ else
set_cipher_do(&desc[idx], DO_PAD);
- }
}
set_flow_mode(&desc[idx], S_DIN_to_HASH);
set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
@@ -553,9 +551,8 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE);
/* TODO */
set_dout_dlli(&desc[idx], state->digest_result_dma_addr, digestsize,
NS_BIT, (async_req ? 1 : 0));
- if (async_req) {
+ if (async_req)
set_queue_last_ind(&desc[idx]);
- }
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
@@ -656,9 +653,8 @@ static int ssi_hash_update(struct ahash_req_ctx *state,
set_cipher_mode(&desc[idx], ctx->hw_mode);
set_dout_dlli(&desc[idx], state->digest_bytes_len_dma_addr,
HASH_LEN_SIZE, NS_BIT, (async_req ? 1 : 0));
- if (async_req) {
+ if (async_req)
set_queue_last_ind(&desc[idx]);
- }
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE1);
idx++;
@@ -786,9 +782,8 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE);
/* TODO */
set_dout_dlli(&desc[idx], state->digest_result_dma_addr, digestsize,
NS_BIT, (async_req ? 1 : 0));
- if (async_req) {
+ if (async_req)
set_queue_last_ind(&desc[idx]);
- }
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
@@ -933,9 +928,8 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE);
hw_desc_init(&desc[idx]);
set_dout_dlli(&desc[idx], state->digest_result_dma_addr, digestsize,
NS_BIT, (async_req ? 1 : 0));
- if (async_req) {
+ if (async_req)
set_queue_last_ind(&desc[idx]);
- }
set_flow_mode(&desc[idx], S_HASH_to_DOUT);
set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
@@ -1423,11 +1417,10 @@ static int ssi_mac_update(struct ahash_request *req)
return -ENOMEM;
}
- if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) {
+ if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC)
ssi_hash_create_xcbc_setup(req, desc, &idx);
- } else {
+ else
ssi_hash_create_cmac_setup(req, desc, &idx);
- }
ssi_hash_create_data_desc(state, ctx, DIN_AES_DOUT, desc, true, &idx);
@@ -1525,11 +1518,10 @@ static int ssi_mac_final(struct ahash_request *req)
idx++;
}
- if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) {
+ if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC)
ssi_hash_create_xcbc_setup(req, desc, &idx);
- } else {
+ else
ssi_hash_create_cmac_setup(req, desc, &idx);
- }
if (state->xcbc_count == 0) {
hw_desc_init(&desc[idx]);
@@ -2506,9 +2498,8 @@ static void ssi_hash_create_data_desc(struct ahash_req_ctx *areq_ctx,
set_flow_mode(&desc[idx], flow_mode);
idx++;
}
- if (is_not_last_data) {
+ if (is_not_last_data)
set_din_not_last_indication(&desc[(idx - 1)]);
- }
/* return updated desc sequence size */
*seq_size = idx;
}
diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c
index 88f2080..d81bf68 100644
--- a/drivers/staging/ccree/ssi_ivgen.c
+++ b/drivers/staging/ccree/ssi_ivgen.c
@@ -143,9 +143,9 @@ int ssi_ivgen_init_sram_pool(struct ssi_drvdata *drvdata)
/* Generate initial pool */
rc = ssi_ivgen_generate_pool(ivgen_ctx, iv_seq, &iv_seq_len);
- if (unlikely(rc != 0)) {
+ if (unlikely(rc != 0))
return rc;
- }
+
/* Fire-and-forget */
return send_request_init(drvdata, iv_seq, iv_seq_len);
}
diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c
index 8f7d2ec..2a39c12 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -215,9 +215,9 @@ static inline int request_mgr_queues_status_check(
return -EBUSY;
}
- if ((likely(req_mgr_h->q_free_slots >= total_seq_len))) {
+ if ((likely(req_mgr_h->q_free_slots >= total_seq_len)))
return 0;
- }
+
/* Wait for space in HW queue. Poll constant num of iterations. */
for (poll_queue = 0; poll_queue < SSI_MAX_POLL_ITER ; poll_queue++) {
req_mgr_h->q_free_slots =
@@ -349,9 +349,8 @@ int send_request(
}
used_sw_slots = ((req_mgr_h->req_queue_head - req_mgr_h->req_queue_tail) & (MAX_REQUEST_QUEUE_SIZE - 1));
- if (unlikely(used_sw_slots > req_mgr_h->max_used_sw_slots)) {
+ if (unlikely(used_sw_slots > req_mgr_h->max_used_sw_slots))
req_mgr_h->max_used_sw_slots = used_sw_slots;
- }
/* Enqueue request - must be locked with HW lock*/
req_mgr_h->req_queue[req_mgr_h->req_queue_head] = *ssi_req;
@@ -412,9 +411,9 @@ int send_request_init(
/* Wait for space in HW and SW FIFO. Poll for as much as FIFO_TIMEOUT. */
rc = request_mgr_queues_status_check(req_mgr_h, cc_base, total_seq_len);
- if (unlikely(rc != 0)) {
+ if (unlikely(rc != 0))
return rc;
- }
+
set_queue_last_ind(&desc[(len - 1)]);
enqueue_seq(cc_base, desc, len);
@@ -480,23 +479,20 @@ static void proc_completions(struct ssi_drvdata *drvdata)
u32 axi_err;
int i;
SSI_LOG_INFO("Delay\n");
- for (i = 0; i < 1000000; i++) {
+ for (i = 0; i < 1000000; i++)
axi_err = READ_REGISTER(drvdata->cc_base + CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR));
- }
}
#endif /* COMPLETION_DELAY */
- if (likely(ssi_req->user_cb != NULL)) {
+ if (likely(ssi_req->user_cb != NULL))
ssi_req->user_cb(&plat_dev->dev, ssi_req->user_arg, drvdata->cc_base);
- }
request_mgr_handle->req_queue_tail = (request_mgr_handle->req_queue_tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1);
SSI_LOG_DEBUG("Dequeue request tail=%u\n", request_mgr_handle->req_queue_tail);
SSI_LOG_DEBUG("Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed);
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
rc = ssi_power_mgr_runtime_put_suspend(&plat_dev->dev);
- if (rc != 0) {
+ if (rc != 0)
SSI_LOG_ERR("Failed to set runtime suspension %d\n", rc);
- }
#endif
}
}
diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c
index db70300..749ec36 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -316,9 +316,9 @@ static ssize_t ssi_sys_help_show(struct kobject *kobj,
int i = 0, offset = 0;
offset += scnprintf(buf + offset, PAGE_SIZE - offset, "Usage:\n");
- for (i = 0; i < ARRAY_SIZE(help_str); i += 2) {
+ for (i = 0; i < ARRAY_SIZE(help_str); i += 2)
offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%s\t\t%s\n", help_str[i], help_str[i + 1]);
- }
+
return offset;
}
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 06/14] staging: ccree: fix unmatched if/else braces
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (4 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 05/14] staging: ccree: no need for braces for single statements Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 07/14] staging: ccree: remove comparisons to NULL Gilad Ben-Yossef
` (7 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Fix mismatched braces between if and else.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_buffer_mgr.c | 3 ++-
drivers/staging/ccree/ssi_cipher.c | 7 +++----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index 9e8a134..f9720fc 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -551,8 +551,9 @@ int ssi_buffer_mgr_map_blkcipher_request(
SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
ivsize, info,
(unsigned long long)req_ctx->gen_ctx.iv_dma_addr);
- } else
+ } else {
req_ctx->gen_ctx.iv_dma_addr = 0;
+ }
/* Map the src SGL */
rc = ssi_buffer_mgr_map_scatterlist(dev, src,
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index c233b7c..88ed777 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -401,8 +401,9 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
/* STAT_PHASE_1: Copy key to ctx */
dma_sync_single_for_cpu(dev, ctx_p->user.key_dma_addr,
max_key_buf_size, DMA_TO_DEVICE);
-#if SSI_CC_HAS_MULTI2
+
if (ctx_p->flow_mode == S_DIN_to_MULTI2) {
+#if SSI_CC_HAS_MULTI2
memcpy(ctx_p->user.key, key, CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE);
ctx_p->key_round_number = key[CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE];
if (ctx_p->key_round_number < CC_MULTI2_MIN_NUM_ROUNDS ||
@@ -410,10 +411,8 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
SSI_LOG_DEBUG("ssi_blkcipher_setkey: SSI_CC_HAS_MULTI2 einval");
return -EINVAL;
- }
- } else
#endif /*SSI_CC_HAS_MULTI2*/
- {
+ } else {
memcpy(ctx_p->user.key, key, keylen);
if (keylen == 24)
memset(ctx_p->user.key + 24, 0, CC_AES_KEY_SIZE_MAX - 24);
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 07/14] staging: ccree: remove comparisons to NULL
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (5 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 06/14] staging: ccree: fix unmatched if/else braces Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 08/14] staging: ccree: fix pointer location Gilad Ben-Yossef
` (6 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Remove explicit comparisons to NULL in ccree driver.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_aead.c | 34 ++++++++++++-------------
drivers/staging/ccree/ssi_buffer_mgr.c | 44 ++++++++++++++++-----------------
drivers/staging/ccree/ssi_cipher.c | 12 ++++-----
drivers/staging/ccree/ssi_driver.c | 20 +++++++--------
drivers/staging/ccree/ssi_fips.c | 4 +--
drivers/staging/ccree/ssi_fips_ext.c | 4 +--
drivers/staging/ccree/ssi_fips_local.c | 10 ++++----
drivers/staging/ccree/ssi_hash.c | 12 ++++-----
drivers/staging/ccree/ssi_ivgen.c | 4 +--
drivers/staging/ccree/ssi_request_mgr.c | 8 +++---
drivers/staging/ccree/ssi_sram_mgr.c | 2 +-
drivers/staging/ccree/ssi_sysfs.c | 2 +-
12 files changed, 78 insertions(+), 78 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index fdb257d..53105dd 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -98,7 +98,7 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
dev = &ctx->drvdata->plat_dev->dev;
/* Unmap enckey buffer */
- if (ctx->enckey != NULL) {
+ if (ctx->enckey) {
dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, ctx->enckey_dma_addr);
SSI_LOG_DEBUG("Freed enckey DMA buffer enckey_dma_addr=0x%llX\n",
(unsigned long long)ctx->enckey_dma_addr);
@@ -107,7 +107,7 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
}
if (ctx->auth_mode == DRV_HASH_XCBC_MAC) { /* XCBC authetication */
- if (ctx->auth_state.xcbc.xcbc_keys != NULL) {
+ if (ctx->auth_state.xcbc.xcbc_keys) {
dma_free_coherent(dev, CC_AES_128_BIT_KEY_SIZE * 3,
ctx->auth_state.xcbc.xcbc_keys,
ctx->auth_state.xcbc.xcbc_keys_dma_addr);
@@ -117,7 +117,7 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
ctx->auth_state.xcbc.xcbc_keys_dma_addr = 0;
ctx->auth_state.xcbc.xcbc_keys = NULL;
} else if (ctx->auth_mode != DRV_HASH_NULL) { /* HMAC auth. */
- if (ctx->auth_state.hmac.ipad_opad != NULL) {
+ if (ctx->auth_state.hmac.ipad_opad) {
dma_free_coherent(dev, 2 * MAX_HMAC_DIGEST_SIZE,
ctx->auth_state.hmac.ipad_opad,
ctx->auth_state.hmac.ipad_opad_dma_addr);
@@ -126,7 +126,7 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
ctx->auth_state.hmac.ipad_opad_dma_addr = 0;
ctx->auth_state.hmac.ipad_opad = NULL;
}
- if (ctx->auth_state.hmac.padded_authkey != NULL) {
+ if (ctx->auth_state.hmac.padded_authkey) {
dma_free_coherent(dev, MAX_HMAC_BLOCK_SIZE,
ctx->auth_state.hmac.padded_authkey,
ctx->auth_state.hmac.padded_authkey_dma_addr);
@@ -160,7 +160,7 @@ static int ssi_aead_init(struct crypto_aead *tfm)
/* Allocate key buffer, cache line aligned */
ctx->enckey = dma_alloc_coherent(dev, AES_MAX_KEY_SIZE,
&ctx->enckey_dma_addr, GFP_KERNEL);
- if (ctx->enckey == NULL) {
+ if (!ctx->enckey) {
SSI_LOG_ERR("Failed allocating key buffer\n");
goto init_failed;
}
@@ -174,7 +174,7 @@ static int ssi_aead_init(struct crypto_aead *tfm)
ctx->auth_state.xcbc.xcbc_keys = dma_alloc_coherent(dev,
CC_AES_128_BIT_KEY_SIZE * 3,
&ctx->auth_state.xcbc.xcbc_keys_dma_addr, GFP_KERNEL);
- if (ctx->auth_state.xcbc.xcbc_keys == NULL) {
+ if (!ctx->auth_state.xcbc.xcbc_keys) {
SSI_LOG_ERR("Failed allocating buffer for XCBC keys\n");
goto init_failed;
}
@@ -183,7 +183,7 @@ static int ssi_aead_init(struct crypto_aead *tfm)
ctx->auth_state.hmac.ipad_opad = dma_alloc_coherent(dev,
2 * MAX_HMAC_DIGEST_SIZE,
&ctx->auth_state.hmac.ipad_opad_dma_addr, GFP_KERNEL);
- if (ctx->auth_state.hmac.ipad_opad == NULL) {
+ if (!ctx->auth_state.hmac.ipad_opad) {
SSI_LOG_ERR("Failed allocating IPAD/OPAD buffer\n");
goto init_failed;
}
@@ -193,7 +193,7 @@ static int ssi_aead_init(struct crypto_aead *tfm)
ctx->auth_state.hmac.padded_authkey = dma_alloc_coherent(dev,
MAX_HMAC_BLOCK_SIZE,
&ctx->auth_state.hmac.padded_authkey_dma_addr, GFP_KERNEL);
- if (ctx->auth_state.hmac.padded_authkey == NULL) {
+ if (!ctx->auth_state.hmac.padded_authkey) {
SSI_LOG_ERR("failed to allocate padded_authkey\n");
goto init_failed;
}
@@ -242,7 +242,7 @@ static void ssi_aead_complete(struct device *dev, void *ssi_req, void __iomem *c
areq->cryptlen + areq_ctx->dstOffset + ctx->authsize, SSI_SG_FROM_BUF);
/* If an IV was generated, copy it back to the user provided buffer. */
- if (areq_ctx->backup_giv != NULL) {
+ if (areq_ctx->backup_giv) {
if (ctx->cipher_mode == DRV_CIPHER_CTR)
memcpy(areq_ctx->backup_giv, areq_ctx->ctr_iv + CTR_RFC3686_NONCE_SIZE, CTR_RFC3686_IV_SIZE);
else if (ctx->cipher_mode == DRV_CIPHER_CCM)
@@ -1848,7 +1848,7 @@ static inline void ssi_aead_dump_gcm(
if (ctx->cipher_mode != DRV_CIPHER_GCTR)
return;
- if (title != NULL) {
+ if (title) {
SSI_LOG_DEBUG("----------------------------------------------------------------------------------");
SSI_LOG_DEBUG("%s\n", title);
}
@@ -1856,7 +1856,7 @@ static inline void ssi_aead_dump_gcm(
SSI_LOG_DEBUG("cipher_mode %d, authsize %d, enc_keylen %d, assoclen %d, cryptlen %d\n", \
ctx->cipher_mode, ctx->authsize, ctx->enc_keylen, req->assoclen, req_ctx->cryptlen);
- if (ctx->enckey != NULL)
+ if (ctx->enckey)
dump_byte_array("mac key", ctx->enckey, 16);
dump_byte_array("req->iv", req->iv, AES_BLOCK_SIZE);
@@ -1871,10 +1871,10 @@ static inline void ssi_aead_dump_gcm(
dump_byte_array("gcm_len_block", req_ctx->gcm_len_block.lenA, AES_BLOCK_SIZE);
- if (req->src != NULL && req->cryptlen)
+ if (req->src && req->cryptlen)
dump_byte_array("req->src", sg_virt(req->src), req->cryptlen + req->assoclen);
- if (req->dst != NULL)
+ if (req->dst)
dump_byte_array("req->dst", sg_virt(req->dst), req->cryptlen + ctx->authsize + req->assoclen);
}
#endif
@@ -1981,7 +1981,7 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
* CTR key to first 4 bytes in CTR IV
*/
memcpy(areq_ctx->ctr_iv, ctx->ctr_nonce, CTR_RFC3686_NONCE_SIZE);
- if (areq_ctx->backup_giv == NULL) /*User none-generated IV*/
+ if (!areq_ctx->backup_giv) /*User none-generated IV*/
memcpy(areq_ctx->ctr_iv + CTR_RFC3686_NONCE_SIZE,
req->iv, CTR_RFC3686_IV_SIZE);
/* Initialize counter portion of counter block */
@@ -2033,7 +2033,7 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
}
/* do we need to generate IV? */
- if (areq_ctx->backup_giv != NULL) {
+ if (areq_ctx->backup_giv) {
/* set the DMA mapped IV address*/
if (ctx->cipher_mode == DRV_CIPHER_CTR) {
ssi_req.ivgen_dma_addr[0] = areq_ctx->gen_ctx.iv_dma_addr + CTR_RFC3686_NONCE_SIZE;
@@ -2685,7 +2685,7 @@ int ssi_aead_free(struct ssi_drvdata *drvdata)
struct ssi_aead_handle *aead_handle =
(struct ssi_aead_handle *)drvdata->aead_handle;
- if (aead_handle != NULL) {
+ if (aead_handle) {
/* Remove registered algs */
list_for_each_entry_safe(t_alg, n, &aead_handle->aead_list, entry) {
crypto_unregister_aead(&t_alg->aead_alg);
@@ -2707,7 +2707,7 @@ int ssi_aead_alloc(struct ssi_drvdata *drvdata)
int alg;
aead_handle = kmalloc(sizeof(struct ssi_aead_handle), GFP_KERNEL);
- if (aead_handle == NULL) {
+ if (!aead_handle) {
rc = -ENOMEM;
goto fail0;
}
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index f9720fc..e060ea1 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -94,7 +94,7 @@ static unsigned int ssi_buffer_mgr_get_sgl_nents(
sg_list = sg_next(sg_list);
} else {
sg_list = (struct scatterlist *)sg_page(sg_list);
- if (is_chained != NULL)
+ if (is_chained)
*is_chained = true;
}
}
@@ -113,7 +113,7 @@ void ssi_buffer_mgr_zero_sgl(struct scatterlist *sgl, u32 data_len)
int sg_index = 0;
while (sg_index <= data_len) {
- if (current_sg == NULL) {
+ if (!current_sg) {
/* reached the end of the sgl --> just return back */
return;
}
@@ -190,7 +190,7 @@ static inline int ssi_buffer_mgr_render_scatterlist_to_mlli(
u32 *mlli_entry_p = *mlli_entry_pp;
s32 rc = 0;
- for ( ; (curr_sgl != NULL) && (sgl_data_len != 0);
+ for ( ; (curr_sgl) && (sgl_data_len != 0);
curr_sgl = sg_next(curr_sgl)) {
u32 entry_data_len =
(sgl_data_len > sg_dma_len(curr_sgl) - sglOffset) ?
@@ -223,7 +223,7 @@ static int ssi_buffer_mgr_generate_mlli(
mlli_params->mlli_virt_addr = dma_pool_alloc(
mlli_params->curr_pool, GFP_KERNEL,
&(mlli_params->mlli_dma_addr));
- if (unlikely(mlli_params->mlli_virt_addr == NULL)) {
+ if (unlikely(!mlli_params->mlli_virt_addr)) {
SSI_LOG_ERR("dma_pool_alloc() failed\n");
rc = -ENOMEM;
goto build_mlli_exit;
@@ -246,7 +246,7 @@ static int ssi_buffer_mgr_generate_mlli(
return rc;
/* set last bit in the current table */
- if (sg_data->mlli_nents[i] != NULL) {
+ if (sg_data->mlli_nents[i]) {
/*Calculate the current MLLI table length for the
*length field in the descriptor
*/
@@ -286,7 +286,7 @@ static inline void ssi_buffer_mgr_add_buffer_entry(
sgl_data->type[index] = DMA_BUFF_TYPE;
sgl_data->is_last[index] = is_last_entry;
sgl_data->mlli_nents[index] = mlli_nents;
- if (sgl_data->mlli_nents[index] != NULL)
+ if (sgl_data->mlli_nents[index])
*sgl_data->mlli_nents[index] = 0;
sgl_data->num_of_buffers++;
}
@@ -311,7 +311,7 @@ static inline void ssi_buffer_mgr_add_scatterlist_entry(
sgl_data->type[index] = DMA_SGL_TYPE;
sgl_data->is_last[index] = is_last_table;
sgl_data->mlli_nents[index] = mlli_nents;
- if (sgl_data->mlli_nents[index] != NULL)
+ if (sgl_data->mlli_nents[index])
*sgl_data->mlli_nents[index] = 0;
sgl_data->num_of_buffers++;
}
@@ -323,7 +323,7 @@ ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
u32 i, j;
struct scatterlist *l_sg = sg;
for (i = 0; i < nents; i++) {
- if (l_sg == NULL)
+ if (!l_sg)
break;
if (unlikely(dma_map_sg(dev, l_sg, 1, direction) != 1)) {
SSI_LOG_ERR("dma_map_page() sg buffer failed\n");
@@ -336,7 +336,7 @@ ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
err:
/* Restore mapped parts */
for (j = 0; j < i; j++) {
- if (sg == NULL)
+ if (!sg)
break;
dma_unmap_sg(dev, sg, 1, direction);
sg = sg_next(sg);
@@ -672,7 +672,7 @@ void ssi_buffer_mgr_unmap_aead_request(
/*In case a pool was set, a table was
*allocated and should be released
*/
- if (areq_ctx->mlli_params.curr_pool != NULL) {
+ if (areq_ctx->mlli_params.curr_pool) {
SSI_LOG_DEBUG("free MLLI buffer: dma=0x%08llX virt=%pK\n",
(unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
areq_ctx->mlli_params.mlli_virt_addr);
@@ -731,12 +731,12 @@ static inline int ssi_buffer_mgr_get_aead_icv_nents(
}
for (i = 0 ; i < (sgl_nents - MAX_ICV_NENTS_SUPPORTED) ; i++) {
- if (sgl == NULL)
+ if (!sgl)
break;
sgl = sg_next(sgl);
}
- if (sgl != NULL)
+ if (sgl)
icv_max_size = sgl->length;
if (last_entry_data_size > authsize) {
@@ -773,7 +773,7 @@ static inline int ssi_buffer_mgr_aead_chain_iv(
struct device *dev = &drvdata->plat_dev->dev;
int rc = 0;
- if (unlikely(req->iv == NULL)) {
+ if (unlikely(!req->iv)) {
areq_ctx->gen_ctx.iv_dma_addr = 0;
goto chain_iv_exit;
}
@@ -823,7 +823,7 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
if (areq_ctx->is_gcm4543)
size_of_assoc += crypto_aead_ivsize(tfm);
- if (sg_data == NULL) {
+ if (!sg_data) {
rc = -EINVAL;
goto chain_assoc_exit;
}
@@ -847,7 +847,7 @@ static inline int ssi_buffer_mgr_aead_chain_assoc(
while (sg_index <= size_of_assoc) {
current_sg = sg_next(current_sg);
//if have reached the end of the sgl, then this is unexpected
- if (current_sg == NULL) {
+ if (!current_sg) {
SSI_LOG_ERR("reached end of sg list. unexpected\n");
BUG();
}
@@ -1108,7 +1108,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
offset = size_to_skip;
- if (sg_data == NULL) {
+ if (!sg_data) {
rc = -EINVAL;
goto chain_data_exit;
}
@@ -1126,7 +1126,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
offset -= areq_ctx->srcSgl->length;
areq_ctx->srcSgl = sg_next(areq_ctx->srcSgl);
//if have reached the end of the sgl, then this is unexpected
- if (areq_ctx->srcSgl == NULL) {
+ if (!areq_ctx->srcSgl) {
SSI_LOG_ERR("reached end of sg list. unexpected\n");
BUG();
}
@@ -1169,7 +1169,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
offset -= areq_ctx->dstSgl->length;
areq_ctx->dstSgl = sg_next(areq_ctx->dstSgl);
//if have reached the end of the sgl, then this is unexpected
- if (areq_ctx->dstSgl == NULL) {
+ if (!areq_ctx->dstSgl) {
SSI_LOG_ERR("reached end of sg list. unexpected\n");
BUG();
}
@@ -1685,7 +1685,7 @@ void ssi_buffer_mgr_unmap_hash_request(
/*In case a pool was set, a table was
*allocated and should be released
*/
- if (areq_ctx->mlli_params.curr_pool != NULL) {
+ if (areq_ctx->mlli_params.curr_pool) {
SSI_LOG_DEBUG("free MLLI buffer: dma=0x%llX virt=%pK\n",
(unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
areq_ctx->mlli_params.mlli_virt_addr);
@@ -1726,7 +1726,7 @@ int ssi_buffer_mgr_init(struct ssi_drvdata *drvdata)
buff_mgr_handle = (struct buff_mgr_handle *)
kmalloc(sizeof(struct buff_mgr_handle), GFP_KERNEL);
- if (buff_mgr_handle == NULL)
+ if (!buff_mgr_handle)
return -ENOMEM;
drvdata->buff_mgr_handle = buff_mgr_handle;
@@ -1737,7 +1737,7 @@ int ssi_buffer_mgr_init(struct ssi_drvdata *drvdata)
LLI_ENTRY_BYTE_SIZE,
MLLI_TABLE_MIN_ALIGNMENT, 0);
- if (unlikely(buff_mgr_handle->mlli_buffs_pool == NULL))
+ if (unlikely(!buff_mgr_handle->mlli_buffs_pool))
goto error;
return 0;
@@ -1751,7 +1751,7 @@ int ssi_buffer_mgr_fini(struct ssi_drvdata *drvdata)
{
struct buff_mgr_handle *buff_mgr_handle = drvdata->buff_mgr_handle;
- if (buff_mgr_handle != NULL) {
+ if (buff_mgr_handle) {
dma_pool_destroy(buff_mgr_handle->mlli_buffs_pool);
kfree(drvdata->buff_mgr_handle);
drvdata->buff_mgr_handle = NULL;
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index 88ed777..1baa215 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -653,7 +653,7 @@ ssi_blkcipher_create_data_desc(
nbytes, NS_BIT);
set_dout_dlli(&desc[*seq_size], sg_dma_address(dst),
nbytes, NS_BIT, (!areq ? 0 : 1));
- if (areq != NULL)
+ if (areq)
set_queue_last_ind(&desc[*seq_size]);
set_flow_mode(&desc[*seq_size], flow_mode);
@@ -702,7 +702,7 @@ ssi_blkcipher_create_data_desc(
req_ctx->out_mlli_nents, NS_BIT,
(!areq ? 0 : 1));
}
- if (areq != NULL)
+ if (areq)
set_queue_last_ind(&desc[*seq_size]);
set_flow_mode(&desc[*seq_size], flow_mode);
@@ -829,8 +829,8 @@ static int ssi_blkcipher_process(
/* STAT_PHASE_3: Lock HW and push sequence */
- rc = send_request(ctx_p->drvdata, &ssi_req, desc, seq_len, (areq == NULL) ? 0 : 1);
- if (areq != NULL) {
+ rc = send_request(ctx_p->drvdata, &ssi_req, desc, seq_len, (!areq) ? 0 : 1);
+ if (areq) {
if (unlikely(rc != -EINPROGRESS)) {
/* Failed to send the request or request completed synchronously */
ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
@@ -1292,7 +1292,7 @@ int ssi_ablkcipher_free(struct ssi_drvdata *drvdata)
struct device *dev;
dev = &drvdata->plat_dev->dev;
- if (blkcipher_handle != NULL) {
+ if (blkcipher_handle) {
/* Remove registered algs */
list_for_each_entry_safe(t_alg, n,
&blkcipher_handle->blkcipher_alg_list,
@@ -1318,7 +1318,7 @@ int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata)
ablkcipher_handle = kmalloc(sizeof(struct ssi_blkcipher_handle),
GFP_KERNEL);
- if (ablkcipher_handle == NULL)
+ if (!ablkcipher_handle)
return -ENOMEM;
drvdata->blkcipher_handle = ablkcipher_handle;
diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c
index 330d24d..5c1d295 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -81,7 +81,7 @@ void dump_byte_array(const char *name, const u8 *the_array, unsigned long size)
const u8 *cur_byte;
char line_buf[80];
- if (the_array == NULL) {
+ if (!the_array) {
SSI_LOG_ERR("cannot dump_byte_array - NULL pointer\n");
return;
}
@@ -231,7 +231,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
u32 signature_val;
int rc = 0;
- if (unlikely(new_drvdata == NULL)) {
+ if (unlikely(!new_drvdata)) {
SSI_LOG_ERR("Failed to allocate drvdata");
rc = -ENOMEM;
goto init_cc_res_err;
@@ -247,7 +247,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
/* Get device resources */
/* First CC registers space */
new_drvdata->res_mem = platform_get_resource(plat_dev, IORESOURCE_MEM, 0);
- if (unlikely(new_drvdata->res_mem == NULL)) {
+ if (unlikely(!new_drvdata->res_mem)) {
SSI_LOG_ERR("Failed getting IO memory resource\n");
rc = -ENODEV;
goto init_cc_res_err;
@@ -258,14 +258,14 @@ static int init_cc_resources(struct platform_device *plat_dev)
(unsigned long long)new_drvdata->res_mem->end);
/* Map registers space */
req_mem_cc_regs = request_mem_region(new_drvdata->res_mem->start, resource_size(new_drvdata->res_mem), "arm_cc7x_regs");
- if (unlikely(req_mem_cc_regs == NULL)) {
+ if (unlikely(!req_mem_cc_regs)) {
SSI_LOG_ERR("Couldn't allocate registers memory region at "
"0x%08X\n", (unsigned int)new_drvdata->res_mem->start);
rc = -EBUSY;
goto init_cc_res_err;
}
cc_base = ioremap(new_drvdata->res_mem->start, resource_size(new_drvdata->res_mem));
- if (unlikely(cc_base == NULL)) {
+ if (unlikely(!cc_base)) {
SSI_LOG_ERR("ioremap[CC](0x%08X,0x%08X) failed\n",
(unsigned int)new_drvdata->res_mem->start, (unsigned int)resource_size(new_drvdata->res_mem));
rc = -ENOMEM;
@@ -277,7 +277,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
/* Then IRQ */
new_drvdata->res_irq = platform_get_resource(plat_dev, IORESOURCE_IRQ, 0);
- if (unlikely(new_drvdata->res_irq == NULL)) {
+ if (unlikely(!new_drvdata->res_irq)) {
SSI_LOG_ERR("Failed getting IRQ resource\n");
rc = -ENODEV;
goto init_cc_res_err;
@@ -302,7 +302,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
if (rc)
goto init_cc_res_err;
- if (new_drvdata->plat_dev->dev.dma_mask == NULL)
+ if (!new_drvdata->plat_dev->dev.dma_mask)
{
new_drvdata->plat_dev->dev.dma_mask = &new_drvdata->plat_dev->dev.coherent_dma_mask;
}
@@ -408,7 +408,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
init_cc_res_err:
SSI_LOG_ERR("Freeing CC HW resources!\n");
- if (new_drvdata != NULL) {
+ if (new_drvdata) {
ssi_aead_free(new_drvdata);
ssi_hash_free(new_drvdata);
ssi_ablkcipher_free(new_drvdata);
@@ -422,7 +422,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
ssi_sysfs_fini();
#endif
- if (req_mem_cc_regs != NULL) {
+ if (req_mem_cc_regs) {
if (irq_registered) {
free_irq(new_drvdata->res_irq->start, new_drvdata);
new_drvdata->res_irq = NULL;
@@ -470,7 +470,7 @@ static void cleanup_cc_resources(struct platform_device *plat_dev)
free_irq(drvdata->res_irq->start, drvdata);
drvdata->res_irq = NULL;
- if (drvdata->cc_base != NULL) {
+ if (drvdata->cc_base) {
iounmap(drvdata->cc_base);
release_mem_region(drvdata->res_mem->start,
resource_size(drvdata->res_mem));
diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c
index 2e01a0a..2b8a616 100644
--- a/drivers/staging/ccree/ssi_fips.c
+++ b/drivers/staging/ccree/ssi_fips.c
@@ -34,7 +34,7 @@ int ssi_fips_get_state(ssi_fips_state_t *p_state)
{
int rc = 0;
- if (p_state == NULL)
+ if (!p_state)
return -EINVAL;
rc = ssi_fips_ext_get_state(p_state);
@@ -52,7 +52,7 @@ int ssi_fips_get_error(ssi_fips_error_t *p_err)
{
int rc = 0;
- if (p_err == NULL)
+ if (!p_err)
return -EINVAL;
rc = ssi_fips_ext_get_error(p_err);
diff --git a/drivers/staging/ccree/ssi_fips_ext.c b/drivers/staging/ccree/ssi_fips_ext.c
index 8b14061..b897c03 100644
--- a/drivers/staging/ccree/ssi_fips_ext.c
+++ b/drivers/staging/ccree/ssi_fips_ext.c
@@ -41,7 +41,7 @@ int ssi_fips_ext_get_state(ssi_fips_state_t *p_state)
{
int rc = 0;
- if (p_state == NULL)
+ if (!p_state)
return -EINVAL;
*p_state = fips_state;
@@ -59,7 +59,7 @@ int ssi_fips_ext_get_error(ssi_fips_error_t *p_err)
{
int rc = 0;
- if (p_err == NULL)
+ if (!p_err)
return -EINVAL;
*p_err = fips_error;
diff --git a/drivers/staging/ccree/ssi_fips_local.c b/drivers/staging/ccree/ssi_fips_local.c
index 84d458a1..c571b85 100644
--- a/drivers/staging/ccree/ssi_fips_local.c
+++ b/drivers/staging/ccree/ssi_fips_local.c
@@ -99,11 +99,11 @@ void ssi_fips_fini(struct ssi_drvdata *drvdata)
{
struct ssi_fips_handle *fips_h = drvdata->fips_handle;
- if (fips_h == NULL)
+ if (!fips_h)
return; /* Not allocated */
#ifdef COMP_IN_WQ
- if (fips_h->workq != NULL) {
+ if (fips_h->workq) {
flush_workqueue(fips_h->workq);
destroy_workqueue(fips_h->workq);
}
@@ -175,7 +175,7 @@ ssi_fips_error_t cc_fips_run_power_up_tests(struct ssi_drvdata *drvdata)
// the dma_handle is the returned phy address - use it in the HW descriptor
FIPS_DBG("dma_alloc_coherent \n");
cpu_addr_buffer = dma_alloc_coherent(dev, alloc_buff_size, &dma_handle, GFP_KERNEL);
- if (cpu_addr_buffer == NULL)
+ if (!cpu_addr_buffer)
return CC_REE_FIPS_ERROR_GENERAL;
FIPS_DBG("allocated coherent buffer - addr 0x%08X , size = %d \n", (size_t)cpu_addr_buffer, alloc_buff_size);
@@ -303,7 +303,7 @@ int ssi_fips_init(struct ssi_drvdata *p_drvdata)
FIPS_DBG("CC FIPS code .. (fips=%d) \n", ssi_fips_support);
fips_h = kzalloc(sizeof(struct ssi_fips_handle), GFP_KERNEL);
- if (fips_h == NULL) {
+ if (!fips_h) {
ssi_fips_set_error(p_drvdata, CC_REE_FIPS_ERROR_GENERAL);
return -ENOMEM;
}
@@ -313,7 +313,7 @@ int ssi_fips_init(struct ssi_drvdata *p_drvdata)
#ifdef COMP_IN_WQ
SSI_LOG_DEBUG("Initializing fips workqueue\n");
fips_h->workq = create_singlethread_workqueue("arm_cc7x_fips_wq");
- if (unlikely(fips_h->workq == NULL)) {
+ if (unlikely(!fips_h->workq)) {
SSI_LOG_ERR("Failed creating fips work queue\n");
ssi_fips_set_error(p_drvdata, CC_REE_FIPS_ERROR_GENERAL);
rc = -ENOMEM;
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 265df94..7a70d87 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -297,17 +297,17 @@ static int ssi_hash_map_request(struct device *dev,
fail1:
kfree(state->digest_buff);
fail_digest_result_buff:
- if (state->digest_result_buff != NULL) {
+ if (state->digest_result_buff) {
kfree(state->digest_result_buff);
state->digest_result_buff = NULL;
}
fail_buff1:
- if (state->buff1 != NULL) {
+ if (state->buff1) {
kfree(state->buff1);
state->buff1 = NULL;
}
fail_buff0:
- if (state->buff0 != NULL) {
+ if (state->buff0) {
kfree(state->buff0);
state->buff0 = NULL;
}
@@ -2249,7 +2249,7 @@ int ssi_hash_alloc(struct ssi_drvdata *drvdata)
int alg;
hash_handle = kzalloc(sizeof(struct ssi_hash_handle), GFP_KERNEL);
- if (hash_handle == NULL) {
+ if (!hash_handle) {
SSI_LOG_ERR("kzalloc failed to allocate %zu B\n",
sizeof(struct ssi_hash_handle));
rc = -ENOMEM;
@@ -2343,7 +2343,7 @@ int ssi_hash_alloc(struct ssi_drvdata *drvdata)
fail:
- if (drvdata->hash_handle != NULL) {
+ if (drvdata->hash_handle) {
kfree(drvdata->hash_handle);
drvdata->hash_handle = NULL;
}
@@ -2355,7 +2355,7 @@ int ssi_hash_free(struct ssi_drvdata *drvdata)
struct ssi_hash_alg *t_hash_alg, *hash_n;
struct ssi_hash_handle *hash_handle = drvdata->hash_handle;
- if (hash_handle != NULL) {
+ if (hash_handle) {
list_for_each_entry_safe(t_hash_alg, hash_n, &hash_handle->hash_list, entry) {
crypto_unregister_ahash(&t_hash_alg->ahash_alg);
list_del(&t_hash_alg->entry);
diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c
index d81bf68..a275151 100644
--- a/drivers/staging/ccree/ssi_ivgen.c
+++ b/drivers/staging/ccree/ssi_ivgen.c
@@ -160,10 +160,10 @@ void ssi_ivgen_fini(struct ssi_drvdata *drvdata)
struct ssi_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle;
struct device *device = &(drvdata->plat_dev->dev);
- if (ivgen_ctx == NULL)
+ if (!ivgen_ctx)
return;
- if (ivgen_ctx->pool_meta != NULL) {
+ if (ivgen_ctx->pool_meta) {
memset(ivgen_ctx->pool_meta, 0, SSI_IVPOOL_META_SIZE);
dma_free_coherent(device, SSI_IVPOOL_META_SIZE,
ivgen_ctx->pool_meta, ivgen_ctx->pool_meta_dma);
diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c
index 2a39c12..ecd4a8b 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -71,7 +71,7 @@ void request_mgr_fini(struct ssi_drvdata *drvdata)
{
struct ssi_request_mgr_handle *req_mgr_h = drvdata->request_mgr_handle;
- if (req_mgr_h == NULL)
+ if (!req_mgr_h)
return; /* Not allocated */
if (req_mgr_h->dummy_comp_buff_dma != 0) {
@@ -102,7 +102,7 @@ int request_mgr_init(struct ssi_drvdata *drvdata)
int rc = 0;
req_mgr_h = kzalloc(sizeof(struct ssi_request_mgr_handle), GFP_KERNEL);
- if (req_mgr_h == NULL) {
+ if (!req_mgr_h) {
rc = -ENOMEM;
goto req_mgr_init_err;
}
@@ -113,7 +113,7 @@ int request_mgr_init(struct ssi_drvdata *drvdata)
#ifdef COMP_IN_WQ
SSI_LOG_DEBUG("Initializing completion workqueue\n");
req_mgr_h->workq = create_singlethread_workqueue("arm_cc7x_wq");
- if (unlikely(req_mgr_h->workq == NULL)) {
+ if (unlikely(!req_mgr_h->workq)) {
SSI_LOG_ERR("Failed creating work queue\n");
rc = -ENOMEM;
goto req_mgr_init_err;
@@ -484,7 +484,7 @@ static void proc_completions(struct ssi_drvdata *drvdata)
}
#endif /* COMPLETION_DELAY */
- if (likely(ssi_req->user_cb != NULL))
+ if (likely(ssi_req->user_cb))
ssi_req->user_cb(&plat_dev->dev, ssi_req->user_arg, drvdata->cc_base);
request_mgr_handle->req_queue_tail = (request_mgr_handle->req_queue_tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1);
SSI_LOG_DEBUG("Dequeue request tail=%u\n", request_mgr_handle->req_queue_tail);
diff --git a/drivers/staging/ccree/ssi_sram_mgr.c b/drivers/staging/ccree/ssi_sram_mgr.c
index c8ab55e..cf03df3 100644
--- a/drivers/staging/ccree/ssi_sram_mgr.c
+++ b/drivers/staging/ccree/ssi_sram_mgr.c
@@ -37,7 +37,7 @@ void ssi_sram_mgr_fini(struct ssi_drvdata *drvdata)
struct ssi_sram_mgr_ctx *smgr_ctx = drvdata->sram_mgr_handle;
/* Free "this" context */
- if (smgr_ctx != NULL) {
+ if (smgr_ctx) {
memset(smgr_ctx, 0, sizeof(struct ssi_sram_mgr_ctx));
kfree(smgr_ctx);
}
diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c
index 749ec36..8de4353 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -408,7 +408,7 @@ static void sys_free_dir(struct sys_dir *sys_dir)
kfree(sys_dir->sys_dir_attr_list);
- if (sys_dir->sys_dir_kobj != NULL)
+ if (sys_dir->sys_dir_kobj)
kobject_put(sys_dir->sys_dir_kobj);
}
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 08/14] staging: ccree: fix pointer location
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (6 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 07/14] staging: ccree: remove comparisons to NULL Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 09/14] staging: ccree: remove custom type tdes_keys_t Gilad Ben-Yossef
` (5 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Fix location of pointer in variables definitions and dereference.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_aead.h | 4 ++--
drivers/staging/ccree/ssi_buffer_mgr.c | 12 ++++++------
drivers/staging/ccree/ssi_cipher.c | 8 ++++----
drivers/staging/ccree/ssi_fips_ll.c | 24 ++++++++++++------------
drivers/staging/ccree/ssi_fips_local.c | 2 +-
drivers/staging/ccree/ssi_hash.c | 2 +-
drivers/staging/ccree/ssi_hash.h | 6 +++---
drivers/staging/ccree/ssi_request_mgr.c | 10 +++++-----
drivers/staging/ccree/ssi_sysfs.c | 4 ++--
9 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.h b/drivers/staging/ccree/ssi_aead.h
index 07cab84..d69e729 100644
--- a/drivers/staging/ccree/ssi_aead.h
+++ b/drivers/staging/ccree/ssi_aead.h
@@ -98,8 +98,8 @@ struct aead_req_ctx {
struct ssi_mlli assoc;
struct ssi_mlli src;
struct ssi_mlli dst;
- struct scatterlist* srcSgl;
- struct scatterlist* dstSgl;
+ struct scatterlist *srcSgl;
+ struct scatterlist *dstSgl;
unsigned int srcOffset;
unsigned int dstOffset;
enum ssi_req_dma_buf_type assoc_buff_type;
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index e060ea1..1b41c12 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -66,7 +66,7 @@ struct buffer_array {
int total_data_len[MAX_NUM_OF_BUFFERS_IN_MLLI];
enum dma_buffer_type type[MAX_NUM_OF_BUFFERS_IN_MLLI];
bool is_last[MAX_NUM_OF_BUFFERS_IN_MLLI];
- u32 * mlli_nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
+ u32 *mlli_nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
};
/**
@@ -409,7 +409,7 @@ static int ssi_buffer_mgr_map_scatterlist(
static inline int
ssi_aead_handle_config_buf(struct device *dev,
struct aead_req_ctx *areq_ctx,
- u8* config_data,
+ u8 *config_data,
struct buffer_array *sg_data,
unsigned int assoclen)
{
@@ -444,7 +444,7 @@ ssi_aead_handle_config_buf(struct device *dev,
static inline int ssi_ahash_handle_curr_buf(struct device *dev,
struct ahash_req_ctx *areq_ctx,
- u8* curr_buff,
+ u8 *curr_buff,
u32 curr_buff_cnt,
struct buffer_array *sg_data)
{
@@ -1460,7 +1460,7 @@ int ssi_buffer_mgr_map_hash_request_final(
{
struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
struct device *dev = &drvdata->plat_dev->dev;
- u8* curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
+ u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
areq_ctx->buff0;
u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
&areq_ctx->buff0_cnt;
@@ -1551,11 +1551,11 @@ int ssi_buffer_mgr_map_hash_request_update(
{
struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
struct device *dev = &drvdata->plat_dev->dev;
- u8* curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
+ u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
areq_ctx->buff0;
u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
&areq_ctx->buff0_cnt;
- u8* next_buff = areq_ctx->buff_index ? areq_ctx->buff0 :
+ u8 *next_buff = areq_ctx->buff_index ? areq_ctx->buff0 :
areq_ctx->buff1;
u32 *next_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff0_cnt :
&areq_ctx->buff1_cnt;
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index 1baa215..b4fc9a6 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -268,11 +268,11 @@ static const u8 zero_buff[] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
static int ssi_fips_verify_3des_keys(const u8 *key, unsigned int keylen)
{
#ifdef CCREE_FIPS_SUPPORT
- tdes_keys_t *tdes_key = (tdes_keys_t*)key;
+ tdes_keys_t *tdes_key = (tdes_keys_t *)key;
/* verify key1 != key2 and key3 != key2*/
- if (unlikely((memcmp((u8*)tdes_key->key1, (u8*)tdes_key->key2, sizeof(tdes_key->key1)) == 0) ||
- (memcmp((u8*)tdes_key->key3, (u8*)tdes_key->key2, sizeof(tdes_key->key3)) == 0))) {
+ if (unlikely((memcmp((u8 *)tdes_key->key1, (u8 *)tdes_key->key2, sizeof(tdes_key->key1)) == 0) ||
+ (memcmp((u8 *)tdes_key->key3, (u8 *)tdes_key->key2, sizeof(tdes_key->key3)) == 0))) {
return -ENOEXEC;
}
#endif /* CCREE_FIPS_SUPPORT */
@@ -342,7 +342,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
if (ssi_is_hw_key(tfm)) {
/* setting HW key slots */
- struct arm_hw_key_info *hki = (struct arm_hw_key_info*)key;
+ struct arm_hw_key_info *hki = (struct arm_hw_key_info *)key;
if (unlikely(ctx_p->flow_mode != S_DIN_to_AES)) {
SSI_LOG_ERR("HW key not supported for non-AES flows\n");
diff --git a/drivers/staging/ccree/ssi_fips_ll.c b/drivers/staging/ccree/ssi_fips_ll.c
index 804384d..4a11f15 100644
--- a/drivers/staging/ccree/ssi_fips_ll.c
+++ b/drivers/staging/ccree/ssi_fips_ll.c
@@ -430,7 +430,7 @@ ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffe
for (i = 0; i < FIPS_CIPHER_NUM_OF_TESTS; ++i)
{
- FipsCipherData *cipherData = (FipsCipherData*)&FipsCipherDataTable[i];
+ FipsCipherData *cipherData = (FipsCipherData *)&FipsCipherDataTable[i];
int rc = 0;
size_t iv_size = cipherData->isAes ? NIST_AES_IV_SIZE : NIST_TDES_IV_SIZE;
@@ -558,7 +558,7 @@ ssi_cmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
for (i = 0; i < FIPS_CMAC_NUM_OF_TESTS; ++i)
{
- FipsCmacData *cmac_data = (FipsCmacData*)&FipsCmacDataTable[i];
+ FipsCmacData *cmac_data = (FipsCmacData *)&FipsCmacDataTable[i];
int rc = 0;
memset(cpu_addr_buffer, 0, sizeof(struct fips_cmac_ctx));
@@ -704,7 +704,7 @@ ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
for (i = 0; i < FIPS_HASH_NUM_OF_TESTS; ++i)
{
- FipsHashData *hash_data = (FipsHashData*)&FipsHashDataTable[i];
+ FipsHashData *hash_data = (FipsHashData *)&FipsHashDataTable[i];
int rc = 0;
enum drv_hash_hw_mode hw_mode = 0;
int digest_size = 0;
@@ -718,20 +718,20 @@ ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
digest_size = CC_SHA1_DIGEST_SIZE;
inter_digestsize = CC_SHA1_DIGEST_SIZE;
/* copy the initial digest into the allocated cache coherent buffer */
- memcpy(virt_ctx->initial_digest, (void*)sha1_init, CC_SHA1_DIGEST_SIZE);
+ memcpy(virt_ctx->initial_digest, (void *)sha1_init, CC_SHA1_DIGEST_SIZE);
break;
case DRV_HASH_SHA256:
hw_mode = DRV_HASH_HW_SHA256;
digest_size = CC_SHA256_DIGEST_SIZE;
inter_digestsize = CC_SHA256_DIGEST_SIZE;
- memcpy(virt_ctx->initial_digest, (void*)sha256_init, CC_SHA256_DIGEST_SIZE);
+ memcpy(virt_ctx->initial_digest, (void *)sha256_init, CC_SHA256_DIGEST_SIZE);
break;
#if (CC_SUPPORT_SHA > 256)
case DRV_HASH_SHA512:
hw_mode = DRV_HASH_HW_SHA512;
digest_size = CC_SHA512_DIGEST_SIZE;
inter_digestsize = CC_SHA512_DIGEST_SIZE;
- memcpy(virt_ctx->initial_digest, (void*)sha512_init, CC_SHA512_DIGEST_SIZE);
+ memcpy(virt_ctx->initial_digest, (void *)sha512_init, CC_SHA512_DIGEST_SIZE);
break;
#endif
default:
@@ -1024,7 +1024,7 @@ ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
for (i = 0; i < FIPS_HMAC_NUM_OF_TESTS; ++i)
{
- FipsHmacData *hmac_data = (FipsHmacData*)&FipsHmacDataTable[i];
+ FipsHmacData *hmac_data = (FipsHmacData *)&FipsHmacDataTable[i];
int rc = 0;
enum drv_hash_hw_mode hw_mode = 0;
int digest_size = 0;
@@ -1039,7 +1039,7 @@ ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
digest_size = CC_SHA1_DIGEST_SIZE;
block_size = CC_SHA1_BLOCK_SIZE;
inter_digestsize = CC_SHA1_DIGEST_SIZE;
- memcpy(virt_ctx->initial_digest, (void*)sha1_init, CC_SHA1_DIGEST_SIZE);
+ memcpy(virt_ctx->initial_digest, (void *)sha1_init, CC_SHA1_DIGEST_SIZE);
memcpy(virt_ctx->digest_bytes_len, digest_len_init, HASH_LEN_SIZE);
break;
case DRV_HASH_SHA256:
@@ -1047,7 +1047,7 @@ ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
digest_size = CC_SHA256_DIGEST_SIZE;
block_size = CC_SHA256_BLOCK_SIZE;
inter_digestsize = CC_SHA256_DIGEST_SIZE;
- memcpy(virt_ctx->initial_digest, (void*)sha256_init, CC_SHA256_DIGEST_SIZE);
+ memcpy(virt_ctx->initial_digest, (void *)sha256_init, CC_SHA256_DIGEST_SIZE);
memcpy(virt_ctx->digest_bytes_len, digest_len_init, HASH_LEN_SIZE);
break;
#if (CC_SUPPORT_SHA > 256)
@@ -1056,7 +1056,7 @@ ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
digest_size = CC_SHA512_DIGEST_SIZE;
block_size = CC_SHA512_BLOCK_SIZE;
inter_digestsize = CC_SHA512_DIGEST_SIZE;
- memcpy(virt_ctx->initial_digest, (void*)sha512_init, CC_SHA512_DIGEST_SIZE);
+ memcpy(virt_ctx->initial_digest, (void *)sha512_init, CC_SHA512_DIGEST_SIZE);
memcpy(virt_ctx->digest_bytes_len, digest_len_sha512_init, HASH_LEN_SIZE);
break;
#endif
@@ -1266,7 +1266,7 @@ ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
for (i = 0; i < FIPS_CCM_NUM_OF_TESTS; ++i)
{
- FipsCcmData *ccmData = (FipsCcmData*)&FipsCcmDataTable[i];
+ FipsCcmData *ccmData = (FipsCcmData *)&FipsCcmDataTable[i];
int rc = 0;
memset(cpu_addr_buffer, 0, sizeof(struct fips_ccm_ctx));
@@ -1566,7 +1566,7 @@ ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
for (i = 0; i < FIPS_GCM_NUM_OF_TESTS; ++i)
{
- FipsGcmData *gcmData = (FipsGcmData*)&FipsGcmDataTable[i];
+ FipsGcmData *gcmData = (FipsGcmData *)&FipsGcmDataTable[i];
int rc = 0;
memset(cpu_addr_buffer, 0, sizeof(struct fips_gcm_ctx));
diff --git a/drivers/staging/ccree/ssi_fips_local.c b/drivers/staging/ccree/ssi_fips_local.c
index c571b85..50d7189 100644
--- a/drivers/staging/ccree/ssi_fips_local.c
+++ b/drivers/staging/ccree/ssi_fips_local.c
@@ -165,7 +165,7 @@ static void fips_dsr(unsigned long devarg)
ssi_fips_error_t cc_fips_run_power_up_tests(struct ssi_drvdata *drvdata)
{
ssi_fips_error_t fips_error = CC_REE_FIPS_ERROR_OK;
- void * cpu_addr_buffer = NULL;
+ void *cpu_addr_buffer = NULL;
dma_addr_t dma_handle;
size_t alloc_buff_size = ssi_fips_max_mem_alloc_size();
struct device *dev = &drvdata->plat_dev->dev;
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 7a70d87..79655bb 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -1358,7 +1358,7 @@ static int ssi_hash_alloc_ctx(struct ssi_hash_ctx *ctx)
static int ssi_ahash_cra_init(struct crypto_tfm *tfm)
{
struct ssi_hash_ctx *ctx = crypto_tfm_ctx(tfm);
- struct hash_alg_common * hash_alg_common =
+ struct hash_alg_common *hash_alg_common =
container_of(tfm->__crt_alg, struct hash_alg_common, base);
struct ahash_alg *ahash_alg =
container_of(hash_alg_common, struct ahash_alg, halg);
diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h
index 0bb99cb..2400e38 100644
--- a/drivers/staging/ccree/ssi_hash.h
+++ b/drivers/staging/ccree/ssi_hash.h
@@ -50,9 +50,9 @@ struct aeshash_state {
/* ahash state */
struct ahash_req_ctx {
- u8* buff0;
- u8* buff1;
- u8* digest_result_buff;
+ u8 *buff0;
+ u8 *buff1;
+ u8 *digest_result_buff;
struct async_gen_req_ctx gen_ctx;
enum ssi_req_dma_buf_type data_dma_buf_type;
u8 *digest_buff;
diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c
index ecd4a8b..f6f7ea8 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -452,7 +452,7 @@ static void proc_completions(struct ssi_drvdata *drvdata)
{
struct ssi_crypto_req *ssi_req;
struct platform_device *plat_dev = drvdata->plat_dev;
- struct ssi_request_mgr_handle * request_mgr_handle =
+ struct ssi_request_mgr_handle *request_mgr_handle =
drvdata->request_mgr_handle;
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
int rc = 0;
@@ -511,7 +511,7 @@ static void comp_handler(unsigned long devarg)
{
struct ssi_drvdata *drvdata = (struct ssi_drvdata *)devarg;
void __iomem *cc_base = drvdata->cc_base;
- struct ssi_request_mgr_handle * request_mgr_handle =
+ struct ssi_request_mgr_handle *request_mgr_handle =
drvdata->request_mgr_handle;
u32 irq;
@@ -559,7 +559,7 @@ static void comp_handler(unsigned long devarg)
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
int ssi_request_mgr_runtime_resume_queue(struct ssi_drvdata *drvdata)
{
- struct ssi_request_mgr_handle * request_mgr_handle = drvdata->request_mgr_handle;
+ struct ssi_request_mgr_handle *request_mgr_handle = drvdata->request_mgr_handle;
spin_lock_bh(&request_mgr_handle->hw_lock);
request_mgr_handle->is_runtime_suspended = false;
@@ -574,7 +574,7 @@ int ssi_request_mgr_runtime_resume_queue(struct ssi_drvdata *drvdata)
*/
int ssi_request_mgr_runtime_suspend_queue(struct ssi_drvdata *drvdata)
{
- struct ssi_request_mgr_handle * request_mgr_handle =
+ struct ssi_request_mgr_handle *request_mgr_handle =
drvdata->request_mgr_handle;
/* lock the send_request */
@@ -592,7 +592,7 @@ int ssi_request_mgr_runtime_suspend_queue(struct ssi_drvdata *drvdata)
bool ssi_request_mgr_is_queue_runtime_suspend(struct ssi_drvdata *drvdata)
{
- struct ssi_request_mgr_handle * request_mgr_handle =
+ struct ssi_request_mgr_handle *request_mgr_handle =
drvdata->request_mgr_handle;
return request_mgr_handle->is_runtime_suspended;
diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c
index 8de4353..75c9a89 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -285,7 +285,7 @@ static ssize_t ssi_sys_regdump_show(struct kobject *kobj,
{
struct ssi_drvdata *drvdata = sys_get_drvdata();
u32 register_value;
- void __iomem* cc_base = drvdata->cc_base;
+ void __iomem *cc_base = drvdata->cc_base;
int offset = 0;
register_value = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_SIGNATURE));
@@ -304,7 +304,7 @@ static ssize_t ssi_sys_regdump_show(struct kobject *kobj,
static ssize_t ssi_sys_help_show(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
- char* help_str[] = {
+ char *help_str[] = {
"cat reg_dump ", "Print several of CC register values",
#if defined CC_CYCLE_COUNT
"cat stats_host ", "Print host statistics",
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 09/14] staging: ccree: remove custom type tdes_keys_t
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (7 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 08/14] staging: ccree: fix pointer location Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 10/14] staging: ccree: remove custom type ssi_fips_error_t Gilad Ben-Yossef
` (4 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Replace references to type tdes_keys_t with struct tdes_keys.
_
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_cipher.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index b4fc9a6..eb3e8e6 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -253,11 +253,11 @@ static void ssi_blkcipher_exit(struct crypto_tfm *tfm)
}
-typedef struct tdes_keys {
+struct tdes_keys {
u8 key1[DES_KEY_SIZE];
u8 key2[DES_KEY_SIZE];
u8 key3[DES_KEY_SIZE];
-} tdes_keys_t;
+};
static const u8 zero_buff[] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
@@ -268,7 +268,7 @@ static const u8 zero_buff[] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
static int ssi_fips_verify_3des_keys(const u8 *key, unsigned int keylen)
{
#ifdef CCREE_FIPS_SUPPORT
- tdes_keys_t *tdes_key = (tdes_keys_t *)key;
+ struct tdes_keys *tdes_key = (struct tdes_keys *)key;
/* verify key1 != key2 and key3 != key2*/
if (unlikely((memcmp((u8 *)tdes_key->key1, (u8 *)tdes_key->key2, sizeof(tdes_key->key1)) == 0) ||
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 10/14] staging: ccree: remove custom type ssi_fips_error_t
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (8 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 09/14] staging: ccree: remove custom type tdes_keys_t Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 11/14] staging: ccree: remove custom type ssi_fips_state_t Gilad Ben-Yossef
` (3 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Replace custom type ssi_fips_error_t with underlying enum.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_fips.c | 4 ++--
drivers/staging/ccree/ssi_fips.h | 6 +++---
drivers/staging/ccree/ssi_fips_ext.c | 6 +++---
drivers/staging/ccree/ssi_fips_ll.c | 30 +++++++++++++++---------------
drivers/staging/ccree/ssi_fips_local.c | 28 ++++++++++++++--------------
drivers/staging/ccree/ssi_fips_local.h | 2 +-
6 files changed, 38 insertions(+), 38 deletions(-)
diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c
index 2b8a616..948ea49 100644
--- a/drivers/staging/ccree/ssi_fips.c
+++ b/drivers/staging/ccree/ssi_fips.c
@@ -24,7 +24,7 @@
extern int ssi_fips_ext_get_state(ssi_fips_state_t *p_state);
-extern int ssi_fips_ext_get_error(ssi_fips_error_t *p_err);
+extern int ssi_fips_ext_get_error(enum cc_fips_error *p_err);
/*
* This function returns the REE FIPS state.
@@ -48,7 +48,7 @@ EXPORT_SYMBOL(ssi_fips_get_state);
* This function returns the REE FIPS error.
* It should be called by kernel module.
*/
-int ssi_fips_get_error(ssi_fips_error_t *p_err)
+int ssi_fips_get_error(enum cc_fips_error *p_err)
{
int rc = 0;
diff --git a/drivers/staging/ccree/ssi_fips.h b/drivers/staging/ccree/ssi_fips.h
index 2fdb1b9..d1cd489 100644
--- a/drivers/staging/ccree/ssi_fips.h
+++ b/drivers/staging/ccree/ssi_fips.h
@@ -30,7 +30,7 @@ typedef enum ssi_fips_state {
} ssi_fips_state_t;
-typedef enum ssi_fips_error {
+enum cc_fips_error {
CC_REE_FIPS_ERROR_OK = 0,
CC_REE_FIPS_ERROR_GENERAL,
CC_REE_FIPS_ERROR_FROM_TEE,
@@ -53,12 +53,12 @@ typedef enum ssi_fips_error {
CC_REE_FIPS_ERROR_HMAC_SHA512_PUT,
CC_REE_FIPS_ERROR_ROM_CHECKSUM,
CC_REE_FIPS_ERROR_RESERVE32B = S32_MAX
-} ssi_fips_error_t;
+};
int ssi_fips_get_state(ssi_fips_state_t *p_state);
-int ssi_fips_get_error(ssi_fips_error_t *p_err);
+int ssi_fips_get_error(enum cc_fips_error *p_err);
#endif /*__SSI_FIPS_H__*/
diff --git a/drivers/staging/ccree/ssi_fips_ext.c b/drivers/staging/ccree/ssi_fips_ext.c
index b897c03..aab2805 100644
--- a/drivers/staging/ccree/ssi_fips_ext.c
+++ b/drivers/staging/ccree/ssi_fips_ext.c
@@ -29,7 +29,7 @@ module_param(tee_error, bool, 0644);
MODULE_PARM_DESC(tee_error, "Simulate TEE library failure flag: 0 - no error (default), 1 - TEE error occured ");
static ssi_fips_state_t fips_state = CC_FIPS_STATE_NOT_SUPPORTED;
-static ssi_fips_error_t fips_error = CC_REE_FIPS_ERROR_OK;
+static enum cc_fips_error fips_error = CC_REE_FIPS_ERROR_OK;
/*
* This function returns the FIPS REE state.
@@ -55,7 +55,7 @@ int ssi_fips_ext_get_state(ssi_fips_state_t *p_state)
* the error value is stored.
* The reference code uses global variable.
*/
-int ssi_fips_ext_get_error(ssi_fips_error_t *p_err)
+int ssi_fips_ext_get_error(enum cc_fips_error *p_err)
{
int rc = 0;
@@ -85,7 +85,7 @@ int ssi_fips_ext_set_state(ssi_fips_state_t state)
* the error value is stored.
* The reference code uses global variable.
*/
-int ssi_fips_ext_set_error(ssi_fips_error_t err)
+int ssi_fips_ext_set_error(enum cc_fips_error err)
{
fips_error = err;
return 0;
diff --git a/drivers/staging/ccree/ssi_fips_ll.c b/drivers/staging/ccree/ssi_fips_ll.c
index 4a11f15..cbb0fe2 100644
--- a/drivers/staging/ccree/ssi_fips_ll.c
+++ b/drivers/staging/ccree/ssi_fips_ll.c
@@ -271,7 +271,7 @@ static const FipsGcmData FipsGcmDataTable[] = {
#define FIPS_GCM_NUM_OF_TESTS (sizeof(FipsGcmDataTable) / sizeof(FipsGcmData))
-static inline ssi_fips_error_t
+static inline enum cc_fips_error
FIPS_CipherToFipsError(enum drv_cipher_mode mode, bool is_aes)
{
switch (mode)
@@ -415,10 +415,10 @@ ssi_cipher_fips_run_test(struct ssi_drvdata *drvdata,
}
-ssi_fips_error_t
+enum cc_fips_error
ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer)
{
- ssi_fips_error_t error = CC_REE_FIPS_ERROR_OK;
+ enum cc_fips_error error = CC_REE_FIPS_ERROR_OK;
size_t i;
struct fips_cipher_ctx *virt_ctx = (struct fips_cipher_ctx *)cpu_addr_buffer;
@@ -544,10 +544,10 @@ ssi_cmac_fips_run_test(struct ssi_drvdata *drvdata,
return rc;
}
-ssi_fips_error_t
+enum cc_fips_error
ssi_cmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer)
{
- ssi_fips_error_t error = CC_REE_FIPS_ERROR_OK;
+ enum cc_fips_error error = CC_REE_FIPS_ERROR_OK;
size_t i;
struct fips_cmac_ctx *virt_ctx = (struct fips_cmac_ctx *)cpu_addr_buffer;
@@ -604,7 +604,7 @@ ssi_cmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
}
-static inline ssi_fips_error_t
+static inline enum cc_fips_error
FIPS_HashToFipsError(enum drv_hash_mode hash_mode)
{
switch (hash_mode) {
@@ -690,10 +690,10 @@ ssi_hash_fips_run_test(struct ssi_drvdata *drvdata,
return rc;
}
-ssi_fips_error_t
+enum cc_fips_error
ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer)
{
- ssi_fips_error_t error = CC_REE_FIPS_ERROR_OK;
+ enum cc_fips_error error = CC_REE_FIPS_ERROR_OK;
size_t i;
struct fips_hash_ctx *virt_ctx = (struct fips_hash_ctx *)cpu_addr_buffer;
@@ -780,7 +780,7 @@ ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
}
-static inline ssi_fips_error_t
+static inline enum cc_fips_error
FIPS_HmacToFipsError(enum drv_hash_mode hash_mode)
{
switch (hash_mode) {
@@ -1006,10 +1006,10 @@ ssi_hmac_fips_run_test(struct ssi_drvdata *drvdata,
return rc;
}
-ssi_fips_error_t
+enum cc_fips_error
ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer)
{
- ssi_fips_error_t error = CC_REE_FIPS_ERROR_OK;
+ enum cc_fips_error error = CC_REE_FIPS_ERROR_OK;
size_t i;
struct fips_hmac_ctx *virt_ctx = (struct fips_hmac_ctx *)cpu_addr_buffer;
@@ -1248,10 +1248,10 @@ ssi_ccm_fips_run_test(struct ssi_drvdata *drvdata,
return rc;
}
-ssi_fips_error_t
+enum cc_fips_error
ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer)
{
- ssi_fips_error_t error = CC_REE_FIPS_ERROR_OK;
+ enum cc_fips_error error = CC_REE_FIPS_ERROR_OK;
size_t i;
struct fips_ccm_ctx *virt_ctx = (struct fips_ccm_ctx *)cpu_addr_buffer;
@@ -1546,10 +1546,10 @@ ssi_gcm_fips_run_test(struct ssi_drvdata *drvdata,
return rc;
}
-ssi_fips_error_t
+enum cc_fips_error
ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer)
{
- ssi_fips_error_t error = CC_REE_FIPS_ERROR_OK;
+ enum cc_fips_error error = CC_REE_FIPS_ERROR_OK;
size_t i;
struct fips_gcm_ctx *virt_ctx = (struct fips_gcm_ctx *)cpu_addr_buffer;
diff --git a/drivers/staging/ccree/ssi_fips_local.c b/drivers/staging/ccree/ssi_fips_local.c
index 50d7189..dfc871d 100644
--- a/drivers/staging/ccree/ssi_fips_local.c
+++ b/drivers/staging/ccree/ssi_fips_local.c
@@ -51,17 +51,17 @@ struct ssi_fips_handle {
extern int ssi_fips_get_state(ssi_fips_state_t *p_state);
-extern int ssi_fips_get_error(ssi_fips_error_t *p_err);
+extern int ssi_fips_get_error(enum cc_fips_error *p_err);
extern int ssi_fips_ext_set_state(ssi_fips_state_t state);
-extern int ssi_fips_ext_set_error(ssi_fips_error_t err);
+extern int ssi_fips_ext_set_error(enum cc_fips_error err);
/* FIPS power-up tests */
-extern ssi_fips_error_t ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
-extern ssi_fips_error_t ssi_cmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
-extern ssi_fips_error_t ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
-extern ssi_fips_error_t ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
-extern ssi_fips_error_t ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
-extern ssi_fips_error_t ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
+extern enum cc_fips_error ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
+extern enum cc_fips_error ssi_cmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
+extern enum cc_fips_error ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
+extern enum cc_fips_error ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
+extern enum cc_fips_error ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
+extern enum cc_fips_error ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
extern size_t ssi_fips_max_mem_alloc_size(void);
@@ -84,7 +84,7 @@ static enum ssi_fips_error ssi_fips_get_tee_error(struct ssi_drvdata *drvdata)
* By writing the error state to HOST_GPR0 register. The function is called from
* driver entry point so no need to protect by mutex.
*/
-static void ssi_fips_update_tee_upon_ree_status(struct ssi_drvdata *drvdata, ssi_fips_error_t err)
+static void ssi_fips_update_tee_upon_ree_status(struct ssi_drvdata *drvdata, enum cc_fips_error err)
{
void __iomem *cc_base = drvdata->cc_base;
if (err == CC_REE_FIPS_ERROR_OK)
@@ -162,9 +162,9 @@ static void fips_dsr(unsigned long devarg)
}
-ssi_fips_error_t cc_fips_run_power_up_tests(struct ssi_drvdata *drvdata)
+enum cc_fips_error cc_fips_run_power_up_tests(struct ssi_drvdata *drvdata)
{
- ssi_fips_error_t fips_error = CC_REE_FIPS_ERROR_OK;
+ enum cc_fips_error fips_error = CC_REE_FIPS_ERROR_OK;
void *cpu_addr_buffer = NULL;
dma_addr_t dma_handle;
size_t alloc_buff_size = ssi_fips_max_mem_alloc_size();
@@ -259,10 +259,10 @@ int ssi_fips_set_state(ssi_fips_state_t state)
/* The function sets the REE FIPS error, and pushes the error to TEE library. *
* It should be used when any of the KAT tests fails.
*/
-int ssi_fips_set_error(struct ssi_drvdata *p_drvdata, ssi_fips_error_t err)
+int ssi_fips_set_error(struct ssi_drvdata *p_drvdata, enum cc_fips_error err)
{
int rc = 0;
- ssi_fips_error_t current_err;
+ enum cc_fips_error current_err;
FIPS_LOG("ssi_fips_set_error - fips_error = %d \n", err);
@@ -297,7 +297,7 @@ int ssi_fips_set_error(struct ssi_drvdata *p_drvdata, ssi_fips_error_t err)
/* The function called once at driver entry point .*/
int ssi_fips_init(struct ssi_drvdata *p_drvdata)
{
- ssi_fips_error_t rc = CC_REE_FIPS_ERROR_OK;
+ enum cc_fips_error rc = CC_REE_FIPS_ERROR_OK;
struct ssi_fips_handle *fips_h;
FIPS_DBG("CC FIPS code .. (fips=%d) \n", ssi_fips_support);
diff --git a/drivers/staging/ccree/ssi_fips_local.h b/drivers/staging/ccree/ssi_fips_local.h
index fa09084..0fbb1e0 100644
--- a/drivers/staging/ccree/ssi_fips_local.h
+++ b/drivers/staging/ccree/ssi_fips_local.h
@@ -53,7 +53,7 @@ typedef enum CC_FipsSyncStatus {
int ssi_fips_init(struct ssi_drvdata *p_drvdata);
void ssi_fips_fini(struct ssi_drvdata *drvdata);
int ssi_fips_check_fips_error(void);
-int ssi_fips_set_error(struct ssi_drvdata *p_drvdata, ssi_fips_error_t err);
+int ssi_fips_set_error(struct ssi_drvdata *p_drvdata, enum cc_fips_error err);
void fips_handler(struct ssi_drvdata *drvdata);
#else /* CONFIG_CC7XXREE_FIPS_SUPPORT */
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 11/14] staging: ccree: remove custom type ssi_fips_state_t
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (9 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 10/14] staging: ccree: remove custom type ssi_fips_error_t Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 12/14] staging: ccree: remove unused type CCFipsSyncStatus_t Gilad Ben-Yossef
` (2 subsequent siblings)
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Replace custom type ssi_fips_state_t with underlying enum.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_fips.c | 4 ++--
drivers/staging/ccree/ssi_fips.h | 6 +++---
drivers/staging/ccree/ssi_fips_ext.c | 6 +++---
drivers/staging/ccree/ssi_fips_local.c | 8 ++++----
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c
index 948ea49..d34d9ef 100644
--- a/drivers/staging/ccree/ssi_fips.c
+++ b/drivers/staging/ccree/ssi_fips.c
@@ -23,14 +23,14 @@
#include "ssi_fips.h"
-extern int ssi_fips_ext_get_state(ssi_fips_state_t *p_state);
+extern int ssi_fips_ext_get_state(enum cc_fips_state_t *p_state);
extern int ssi_fips_ext_get_error(enum cc_fips_error *p_err);
/*
* This function returns the REE FIPS state.
* It should be called by kernel module.
*/
-int ssi_fips_get_state(ssi_fips_state_t *p_state)
+int ssi_fips_get_state(enum cc_fips_state_t *p_state)
{
int rc = 0;
diff --git a/drivers/staging/ccree/ssi_fips.h b/drivers/staging/ccree/ssi_fips.h
index d1cd489..ce5fa45 100644
--- a/drivers/staging/ccree/ssi_fips.h
+++ b/drivers/staging/ccree/ssi_fips.h
@@ -22,12 +22,12 @@
* @brief This file contains FIPS related defintions and APIs.
*/
-typedef enum ssi_fips_state {
+enum cc_fips_state {
CC_FIPS_STATE_NOT_SUPPORTED = 0,
CC_FIPS_STATE_SUPPORTED,
CC_FIPS_STATE_ERROR,
CC_FIPS_STATE_RESERVE32B = S32_MAX
-} ssi_fips_state_t;
+};
enum cc_fips_error {
@@ -57,7 +57,7 @@ enum cc_fips_error {
-int ssi_fips_get_state(ssi_fips_state_t *p_state);
+int ssi_fips_get_state(enum cc_fips_state *p_state);
int ssi_fips_get_error(enum cc_fips_error *p_err);
#endif /*__SSI_FIPS_H__*/
diff --git a/drivers/staging/ccree/ssi_fips_ext.c b/drivers/staging/ccree/ssi_fips_ext.c
index aab2805..295aeb6 100644
--- a/drivers/staging/ccree/ssi_fips_ext.c
+++ b/drivers/staging/ccree/ssi_fips_ext.c
@@ -28,7 +28,7 @@ static bool tee_error;
module_param(tee_error, bool, 0644);
MODULE_PARM_DESC(tee_error, "Simulate TEE library failure flag: 0 - no error (default), 1 - TEE error occured ");
-static ssi_fips_state_t fips_state = CC_FIPS_STATE_NOT_SUPPORTED;
+static enum cc_fips_state_t fips_state = CC_FIPS_STATE_NOT_SUPPORTED;
static enum cc_fips_error fips_error = CC_REE_FIPS_ERROR_OK;
/*
@@ -37,7 +37,7 @@ static enum cc_fips_error fips_error = CC_REE_FIPS_ERROR_OK;
* the state value is stored.
* The reference code uses global variable.
*/
-int ssi_fips_ext_get_state(ssi_fips_state_t *p_state)
+int ssi_fips_ext_get_state(enum cc_fips_state_t *p_state)
{
int rc = 0;
@@ -73,7 +73,7 @@ int ssi_fips_ext_get_error(enum cc_fips_error *p_err)
* the state value is stored.
* The reference code uses global variable.
*/
-int ssi_fips_ext_set_state(ssi_fips_state_t state)
+int ssi_fips_ext_set_state(enum cc_fips_state_t state)
{
fips_state = state;
return 0;
diff --git a/drivers/staging/ccree/ssi_fips_local.c b/drivers/staging/ccree/ssi_fips_local.c
index dfc871d..9b84876 100644
--- a/drivers/staging/ccree/ssi_fips_local.c
+++ b/drivers/staging/ccree/ssi_fips_local.c
@@ -50,9 +50,9 @@ struct ssi_fips_handle {
};
-extern int ssi_fips_get_state(ssi_fips_state_t *p_state);
+extern int ssi_fips_get_state(enum cc_fips_state_t *p_state);
extern int ssi_fips_get_error(enum cc_fips_error *p_err);
-extern int ssi_fips_ext_set_state(ssi_fips_state_t state);
+extern int ssi_fips_ext_set_state(enum cc_fips_state_t state);
extern int ssi_fips_ext_set_error(enum cc_fips_error err);
/* FIPS power-up tests */
@@ -234,7 +234,7 @@ enum cc_fips_error cc_fips_run_power_up_tests(struct ssi_drvdata *drvdata)
*/
int ssi_fips_check_fips_error(void)
{
- ssi_fips_state_t fips_state;
+ enum cc_fips_state_t fips_state;
if (ssi_fips_get_state(&fips_state) != 0) {
FIPS_LOG("ssi_fips_get_state FAILED, returning.. \n");
@@ -251,7 +251,7 @@ int ssi_fips_check_fips_error(void)
/* The function sets the REE FIPS state.*
* It should be used while driver is being loaded.
*/
-int ssi_fips_set_state(ssi_fips_state_t state)
+int ssi_fips_set_state(enum cc_fips_state_t state)
{
return ssi_fips_ext_set_state(state);
}
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 12/14] staging: ccree: remove unused type CCFipsSyncStatus_t
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (10 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 11/14] staging: ccree: remove custom type ssi_fips_state_t Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 13/14] staging: ccree: remove/add (un)needed blank lines Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 14/14] staging: ccree: fix block comment style Gilad Ben-Yossef
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
The CCFipsSyncStatus_t type was not being used in the code.
Remove it.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_fips_local.h | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/drivers/staging/ccree/ssi_fips_local.h b/drivers/staging/ccree/ssi_fips_local.h
index 0fbb1e0..4bc7f37 100644
--- a/drivers/staging/ccree/ssi_fips_local.h
+++ b/drivers/staging/ccree/ssi_fips_local.h
@@ -23,16 +23,6 @@
#include "ssi_fips.h"
struct ssi_drvdata;
-// IG - how to make 1 file for TEE and REE
-typedef enum CC_FipsSyncStatus {
- CC_FIPS_SYNC_MODULE_OK = 0x0,
- CC_FIPS_SYNC_MODULE_ERROR = 0x1,
- CC_FIPS_SYNC_REE_STATUS = 0x4,
- CC_FIPS_SYNC_TEE_STATUS = 0x8,
- CC_FIPS_SYNC_STATUS_RESERVE32B = S32_MAX
-} CCFipsSyncStatus_t;
-
-
#define CHECK_AND_RETURN_UPON_FIPS_ERROR() {\
if (ssi_fips_check_fips_error() != 0) {\
return -ENOEXEC;\
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 13/14] staging: ccree: remove/add (un)needed blank lines
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (11 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 12/14] staging: ccree: remove unused type CCFipsSyncStatus_t Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 14/14] staging: ccree: fix block comment style Gilad Ben-Yossef
13 siblings, 0 replies; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Remove or add blank lines as needed to match coding style.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/ssi_aead.c | 20 +++++--------------
drivers/staging/ccree/ssi_aead.h | 4 ----
drivers/staging/ccree/ssi_buffer_mgr.c | 7 ++++---
drivers/staging/ccree/ssi_buffer_mgr.h | 1 -
drivers/staging/ccree/ssi_cipher.c | 17 +++-------------
drivers/staging/ccree/ssi_cipher.h | 6 ------
drivers/staging/ccree/ssi_driver.c | 4 +---
drivers/staging/ccree/ssi_fips.c | 2 --
drivers/staging/ccree/ssi_fips.h | 3 ---
drivers/staging/ccree/ssi_fips_data.h | 8 --------
drivers/staging/ccree/ssi_fips_ext.c | 2 --
drivers/staging/ccree/ssi_fips_ll.c | 35 +++++++++------------------------
drivers/staging/ccree/ssi_fips_local.c | 14 +------------
drivers/staging/ccree/ssi_fips_local.h | 4 ++--
drivers/staging/ccree/ssi_hash.c | 12 ++++-------
drivers/staging/ccree/ssi_ivgen.c | 1 -
drivers/staging/ccree/ssi_ivgen.h | 1 -
drivers/staging/ccree/ssi_pm.c | 5 -----
drivers/staging/ccree/ssi_pm.h | 3 ---
drivers/staging/ccree/ssi_request_mgr.c | 9 +++------
drivers/staging/ccree/ssi_sram_mgr.c | 2 --
drivers/staging/ccree/ssi_sram_mgr.h | 1 -
drivers/staging/ccree/ssi_sysfs.c | 4 ----
drivers/staging/ccree/ssi_sysfs.h | 1 +
24 files changed, 33 insertions(+), 133 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index 53105dd..1fc0b05 100644
--- a/drivers/staging/ccree/ssi_aead.c
+++ b/drivers/staging/ccree/ssi_aead.c
@@ -49,7 +49,6 @@
#define AES_CCM_RFC4309_NONCE_SIZE 3
#define MAX_NONCE_SIZE CTR_RFC3686_NONCE_SIZE
-
/* Value of each ICV_CMP byte (of 8) in case of success */
#define ICV_VERIF_OK 0x01
@@ -209,7 +208,6 @@ static int ssi_aead_init(struct crypto_aead *tfm)
return -ENOMEM;
}
-
static void ssi_aead_complete(struct device *dev, void *ssi_req, void __iomem *cc_base)
{
struct aead_request *areq = (struct aead_request *)ssi_req;
@@ -402,6 +400,7 @@ static int validate_keys_sizes(struct ssi_aead_ctx *ctx)
return 0; /* All tests of keys sizes passed */
}
+
/* This function prepers the user key so it can pass to the hmac processing
* (copy to intenral buffer or hash in case of key longer than block
*/
@@ -526,7 +525,6 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int keyl
return rc;
}
-
static int
ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen)
{
@@ -594,7 +592,6 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen)
goto badkey;
}
-
/* STAT_PHASE_2: Create sequence */
switch (ctx->auth_mode) {
@@ -613,7 +610,6 @@ ssi_aead_setkey(struct crypto_aead *tfm, const u8 *key, unsigned int keylen)
goto badkey;
}
-
/* STAT_PHASE_3: Submit sequence to HW */
if (seq_len > 0) { /* For CCM there is no sequence to setup the key */
@@ -1372,6 +1368,7 @@ static int validate_data_size(struct ssi_aead_ctx *ctx,
static unsigned int format_ccm_a0(u8 *pA0Buff, u32 headerSize)
{
unsigned int len = 0;
+
if (headerSize == 0)
return 0;
@@ -1424,7 +1421,6 @@ static inline int ssi_aead_ccm(
unsigned int cipher_flow_mode;
dma_addr_t mac_result;
-
if (req_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) {
cipher_flow_mode = AES_to_HASH_and_DOUT;
mac_result = req_ctx->mac_buf_dma_addr;
@@ -1481,7 +1477,6 @@ static inline int ssi_aead_ccm(
set_aes_not_hash_mode(&desc[idx]);
idx++;
-
/* process assoc data */
if (req->assoclen > 0) {
ssi_aead_create_assoc_desc(req, DIN_HASH, desc, &idx);
@@ -1556,6 +1551,7 @@ static int config_ccm_adata(struct aead_request *req)
req->cryptlen :
(req->cryptlen - ctx->authsize);
int rc;
+
memset(req_ctx->mac_buf, 0, AES_BLOCK_SIZE);
memset(req_ctx->ccm_config, 0, AES_BLOCK_SIZE * 3);
@@ -1808,7 +1804,6 @@ static inline int ssi_aead_gcm(
cipher_flow_mode = AES_to_HASH_and_DOUT;
}
-
//in RFC4543 no data to encrypt. just copy data from src to dest.
if (req_ctx->plaintext_authenticate_only) {
ssi_aead_process_cipher_data_desc(req, BYPASS, desc, seq_size);
@@ -1904,15 +1899,16 @@ static int config_gcm_context(struct aead_request *req)
memcpy(req->iv + 12, &counter, 4);
memcpy(req_ctx->gcm_iv_inc1, req->iv, 16);
-
if (!req_ctx->plaintext_authenticate_only) {
__be64 temp64;
+
temp64 = cpu_to_be64(req->assoclen * 8);
memcpy(&req_ctx->gcm_len_block.lenA, &temp64, sizeof(temp64));
temp64 = cpu_to_be64(cryptlen * 8);
memcpy(&req_ctx->gcm_len_block.lenC, &temp64, 8);
} else { //rfc4543=> all data(AAD,IV,Plain) are considered additional data that is nothing is encrypted.
__be64 temp64;
+
temp64 = cpu_to_be64((req->assoclen + GCM_BLOCK_RFC4_IV_SIZE + cryptlen) * 8);
memcpy(&req_ctx->gcm_len_block.lenA, &temp64, sizeof(temp64));
temp64 = 0;
@@ -1934,7 +1930,6 @@ static void ssi_rfc4_gcm_process(struct aead_request *req)
req->assoclen -= GCM_BLOCK_RFC4_IV_SIZE;
}
-
#endif /*SSI_CC_HAS_AES_GCM*/
static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction direct)
@@ -1948,7 +1943,6 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
struct device *dev = &ctx->drvdata->plat_dev->dev;
struct ssi_crypto_req ssi_req = {};
-
SSI_LOG_DEBUG("%s context=%p req=%p iv=%p src=%p src_ofs=%d dst=%p dst_ofs=%d cryptolen=%d\n",
((direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? "Encrypt" : "Decrypt"), ctx, req, req->iv,
sg_virt(req->src), req->src->offset, sg_virt(req->dst), req->dst->offset, req->cryptlen);
@@ -1973,7 +1967,6 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
areq_ctx->req_authsize = ctx->authsize;
areq_ctx->cipher_mode = ctx->cipher_mode;
-
/* STAT_PHASE_1: Map buffers */
if (ctx->cipher_mode == DRV_CIPHER_CTR) {
@@ -2057,7 +2050,6 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
ssi_req.ivgen_size = crypto_aead_ivsize(tfm);
}
-
/* STAT_PHASE_2: Create sequence */
/* Load MLLI tables to SRAM if necessary */
@@ -2091,7 +2083,6 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
goto exit;
}
-
/* STAT_PHASE_3: Lock HW and push sequence */
rc = send_request(ctx->drvdata, &ssi_req, desc, seq_len, 1);
@@ -2101,7 +2092,6 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
ssi_buffer_mgr_unmap_aead_request(dev, req);
}
-
exit:
return rc;
}
diff --git a/drivers/staging/ccree/ssi_aead.h b/drivers/staging/ccree/ssi_aead.h
index d69e729..39cc633 100644
--- a/drivers/staging/ccree/ssi_aead.h
+++ b/drivers/staging/ccree/ssi_aead.h
@@ -25,13 +25,11 @@
#include <crypto/algapi.h>
#include <crypto/ctr.h>
-
/* mac_cmp - HW writes 8 B but all bytes hold the same value */
#define ICV_CMP_SIZE 8
#define CCM_CONFIG_BUF_SIZE (AES_BLOCK_SIZE * 3)
#define MAX_MAC_SIZE MAX(SHA256_DIGEST_SIZE, AES_BLOCK_SIZE)
-
/* defines for AES GCM configuration buffer */
#define GCM_BLOCK_LEN_SIZE 8
@@ -40,8 +38,6 @@
#define GCM_BLOCK_RFC4_NONCE_OFFSET 0
#define GCM_BLOCK_RFC4_NONCE_SIZE 4
-
-
/* Offsets into AES CCM configuration buffer */
#define CCM_B0_OFFSET 0
#define CCM_A0_OFFSET 16
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c
index 1b41c12..b35871e 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -42,7 +42,6 @@
#define GET_DMA_BUFFER_TYPE(buff_type)
#endif
-
enum dma_buffer_type {
DMA_NULL_TYPE = -1,
DMA_SGL_TYPE = 1,
@@ -80,6 +79,7 @@ static unsigned int ssi_buffer_mgr_get_sgl_nents(
struct scatterlist *sg_list, unsigned int nbytes, u32 *lbytes, bool *is_chained)
{
unsigned int nents = 0;
+
while (nbytes != 0) {
if (sg_is_chain(sg_list)) {
SSI_LOG_ERR("Unexpected chained entry "
@@ -181,7 +181,6 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli(
return 0;
}
-
static inline int ssi_buffer_mgr_render_scatterlist_to_mlli(
struct scatterlist *sgl, u32 sgl_data_len, u32 sglOffset, u32 *curr_nents,
u32 **mlli_entry_pp)
@@ -322,6 +321,7 @@ ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
{
u32 i, j;
struct scatterlist *l_sg = sg;
+
for (i = 0; i < nents; i++) {
if (!l_sg)
break;
@@ -441,7 +441,6 @@ ssi_aead_handle_config_buf(struct device *dev,
return 0;
}
-
static inline int ssi_ahash_handle_curr_buf(struct device *dev,
struct ahash_req_ctx *areq_ctx,
u8 *curr_buff,
@@ -700,6 +699,7 @@ void ssi_buffer_mgr_unmap_aead_request(
likely(req->src == req->dst))
{
u32 size_to_skip = req->assoclen;
+
if (areq_ctx->is_gcm4543)
size_to_skip += crypto_aead_ivsize(tfm);
@@ -1027,6 +1027,7 @@ static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
* MAC verification upon request completion
*/
u32 size_to_skip = req->assoclen;
+
if (areq_ctx->is_gcm4543)
size_to_skip += crypto_aead_ivsize(tfm);
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.h b/drivers/staging/ccree/ssi_buffer_mgr.h
index bb5f8dc..41f5223 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.h
+++ b/drivers/staging/ccree/ssi_buffer_mgr.h
@@ -26,7 +26,6 @@
#include "ssi_config.h"
#include "ssi_driver.h"
-
enum ssi_req_dma_buf_type {
SSI_DMA_BUF_NULL = 0,
SSI_DMA_BUF_DLLI,
diff --git a/drivers/staging/ccree/ssi_cipher.c b/drivers/staging/ccree/ssi_cipher.c
index eb3e8e6..cd2eafc 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -47,6 +47,7 @@ struct cc_user_key_info {
u8 *key;
dma_addr_t key_dma_addr;
};
+
struct cc_hw_key_info {
enum cc_hw_crypto_key key1_slot;
enum cc_hw_crypto_key key2_slot;
@@ -67,7 +68,6 @@ struct ssi_ablkcipher_ctx {
static void ssi_ablkcipher_complete(struct device *dev, void *ssi_req, void __iomem *cc_base);
-
static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) {
switch (ctx_p->flow_mode) {
case S_DIN_to_AES:
@@ -108,7 +108,6 @@ static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) {
return -EINVAL;
}
-
static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int size) {
switch (ctx_p->flow_mode) {
case S_DIN_to_AES:
@@ -252,7 +251,6 @@ static void ssi_blkcipher_exit(struct crypto_tfm *tfm)
SSI_LOG_DEBUG("Free key buffer in context. key=@%p\n", ctx_p->user.key);
}
-
struct tdes_keys {
u8 key1[DES_KEY_SIZE];
u8 key2[DES_KEY_SIZE];
@@ -396,8 +394,6 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
return -EINVAL;
}
-
-
/* STAT_PHASE_1: Copy key to ctx */
dma_sync_single_for_cpu(dev, ctx_p->user.key_dma_addr,
max_key_buf_size, DMA_TO_DEVICE);
@@ -422,6 +418,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
int key_len = keylen >> 1;
int err;
SHASH_DESC_ON_STACK(desc, ctx_p->shash_tfm);
+
desc->tfm = ctx_p->shash_tfm;
err = crypto_shash_digest(desc, ctx_p->user.key, key_len, ctx_p->user.key + key_len);
@@ -435,7 +432,6 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
max_key_buf_size, DMA_TO_DEVICE);
ctx_p->keylen = keylen;
-
SSI_LOG_DEBUG("ssi_blkcipher_setkey: return safely");
return 0;
}
@@ -598,7 +594,6 @@ static inline void ssi_blkcipher_create_multi2_setup_desc(
set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE0);
(*seq_size)++;
-
/* Set state */
hw_desc_init(&desc[*seq_size]);
set_din_type(&desc[*seq_size], DMA_DLLI, req_ctx->gen_ctx.iv_dma_addr,
@@ -724,7 +719,6 @@ static int ssi_blkcipher_complete(struct device *dev,
ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
-
/*Set the inflight couter value to local variable*/
inflight_counter = ctx_p->drvdata->inflight_counter;
/*Decrease the inflight counter*/
@@ -790,7 +784,6 @@ static int ssi_blkcipher_process(
/* Setup request context */
req_ctx->gen_ctx.op_type = direction;
-
/* STAT_PHASE_1: Map buffers */
rc = ssi_buffer_mgr_map_blkcipher_request(ctx_p->drvdata, req_ctx, ivsize, nbytes, info, src, dst);
@@ -799,7 +792,6 @@ static int ssi_blkcipher_process(
goto exit_process;
}
-
/* STAT_PHASE_2: Create sequence */
/* Setup processing */
@@ -878,7 +870,6 @@ static int ssi_ablkcipher_init(struct crypto_tfm *tfm)
return ssi_blkcipher_init(tfm);
}
-
static int ssi_ablkcipher_setkey(struct crypto_ablkcipher *tfm,
const u8 *key,
unsigned int keylen)
@@ -911,7 +902,6 @@ static int ssi_ablkcipher_decrypt(struct ablkcipher_request *req)
return ssi_blkcipher_process(tfm, req_ctx, req->dst, req->src, req->nbytes, req->info, ivsize, (void *)req, DRV_CRYPTO_DIRECTION_DECRYPT);
}
-
/* DX Block cipher alg */
static struct ssi_alg_template blkcipher_algs[] = {
/* Async template */
@@ -1290,6 +1280,7 @@ int ssi_ablkcipher_free(struct ssi_drvdata *drvdata)
struct ssi_blkcipher_handle *blkcipher_handle =
drvdata->blkcipher_handle;
struct device *dev;
+
dev = &drvdata->plat_dev->dev;
if (blkcipher_handle) {
@@ -1307,8 +1298,6 @@ int ssi_ablkcipher_free(struct ssi_drvdata *drvdata)
return 0;
}
-
-
int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata)
{
struct ssi_blkcipher_handle *ablkcipher_handle;
diff --git a/drivers/staging/ccree/ssi_cipher.h b/drivers/staging/ccree/ssi_cipher.h
index 22d7b43..296b375 100644
--- a/drivers/staging/ccree/ssi_cipher.h
+++ b/drivers/staging/ccree/ssi_cipher.h
@@ -26,7 +26,6 @@
#include "ssi_driver.h"
#include "ssi_buffer_mgr.h"
-
/* Crypto cipher flags */
#define CC_CRYPTO_CIPHER_KEY_KFDE0 (1 << 0)
#define CC_CRYPTO_CIPHER_KEY_KFDE1 (1 << 1)
@@ -36,7 +35,6 @@
#define CC_CRYPTO_CIPHER_KEY_KFDE_MASK (CC_CRYPTO_CIPHER_KEY_KFDE0 | CC_CRYPTO_CIPHER_KEY_KFDE1 | CC_CRYPTO_CIPHER_KEY_KFDE2 | CC_CRYPTO_CIPHER_KEY_KFDE3)
-
struct blkcipher_req_ctx {
struct async_gen_req_ctx gen_ctx;
enum ssi_req_dma_buf_type dma_buf_type;
@@ -49,8 +47,6 @@ struct blkcipher_req_ctx {
struct mlli_params mlli_params;
};
-
-
int ssi_ablkcipher_alloc(struct ssi_drvdata *drvdata);
int ssi_ablkcipher_free(struct ssi_drvdata *drvdata);
@@ -63,7 +59,6 @@ int ssi_ablkcipher_free(struct ssi_drvdata *drvdata);
CRYPTO_ALG_BULK_DU_4096)
#endif /* CRYPTO_ALG_BULK_MASK */
-
#ifdef CRYPTO_TFM_REQ_HW_KEY
static inline bool ssi_is_hw_key(struct crypto_tfm *tfm)
@@ -85,5 +80,4 @@ static inline bool ssi_is_hw_key(struct crypto_tfm *tfm)
#endif /* CRYPTO_TFM_REQ_HW_KEY */
-
#endif /*__SSI_CIPHER_H__*/
diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c
index 5c1d295..78709b92 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -73,7 +73,6 @@
#include "ssi_pm.h"
#include "ssi_fips_local.h"
-
#ifdef DX_DUMP_BYTES
void dump_byte_array(const char *name, const u8 *the_array, unsigned long size)
{
@@ -274,7 +273,6 @@ static int init_cc_resources(struct platform_device *plat_dev)
SSI_LOG_DEBUG("CC registers mapped from %pa to 0x%p\n", &new_drvdata->res_mem->start, cc_base);
new_drvdata->cc_base = cc_base;
-
/* Then IRQ */
new_drvdata->res_irq = platform_get_resource(plat_dev, IORESOURCE_IRQ, 0);
if (unlikely(!new_drvdata->res_irq)) {
@@ -546,6 +544,7 @@ static int cc7x_remove(struct platform_device *plat_dev)
return 0;
}
+
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
static struct dev_pm_ops arm_cc7x_driver_pm = {
SET_RUNTIME_PM_OPS(ssi_power_mgr_runtime_suspend, ssi_power_mgr_runtime_resume, NULL)
@@ -558,7 +557,6 @@ static struct dev_pm_ops arm_cc7x_driver_pm = {
#define DX_DRIVER_RUNTIME_PM NULL
#endif
-
#ifdef CONFIG_OF
static const struct of_device_id arm_cc7x_dev_of_match[] = {
{.compatible = "arm,cryptocell-712-ree"},
diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c
index d34d9ef..fdc40f3 100644
--- a/drivers/staging/ccree/ssi_fips.c
+++ b/drivers/staging/ccree/ssi_fips.c
@@ -14,7 +14,6 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-
/**************************************************************
* This file defines the driver FIPS APIs *
**************************************************************/
@@ -22,7 +21,6 @@
#include <linux/module.h>
#include "ssi_fips.h"
-
extern int ssi_fips_ext_get_state(enum cc_fips_state_t *p_state);
extern int ssi_fips_ext_get_error(enum cc_fips_error *p_err);
diff --git a/drivers/staging/ccree/ssi_fips.h b/drivers/staging/ccree/ssi_fips.h
index ce5fa45..4f5c6a9 100644
--- a/drivers/staging/ccree/ssi_fips.h
+++ b/drivers/staging/ccree/ssi_fips.h
@@ -29,7 +29,6 @@ enum cc_fips_state {
CC_FIPS_STATE_RESERVE32B = S32_MAX
};
-
enum cc_fips_error {
CC_REE_FIPS_ERROR_OK = 0,
CC_REE_FIPS_ERROR_GENERAL,
@@ -55,8 +54,6 @@ enum cc_fips_error {
CC_REE_FIPS_ERROR_RESERVE32B = S32_MAX
};
-
-
int ssi_fips_get_state(enum cc_fips_state *p_state);
int ssi_fips_get_error(enum cc_fips_error *p_err);
diff --git a/drivers/staging/ccree/ssi_fips_data.h b/drivers/staging/ccree/ssi_fips_data.h
index 27b2866..c41671d 100644
--- a/drivers/staging/ccree/ssi_fips_data.h
+++ b/drivers/staging/ccree/ssi_fips_data.h
@@ -98,14 +98,12 @@
#define NIST_AES_192_CTR_CIPHER { 0x1a, 0xbc, 0x93, 0x24, 0x17, 0x52, 0x1c, 0xa2, 0x4f, 0x2b, 0x04, 0x59, 0xfe, 0x7e, 0x6e, 0x0b }
#define NIST_AES_256_CTR_CIPHER { 0x60, 0x1e, 0xc3, 0x13, 0x77, 0x57, 0x89, 0xa5, 0xb7, 0xa7, 0xf5, 0x04, 0xbb, 0xf3, 0xd2, 0x28 }
-
#define RFC3962_AES_128_KEY { 0x63, 0x68, 0x69, 0x63, 0x6b, 0x65, 0x6e, 0x20, 0x74, 0x65, 0x72, 0x69, 0x79, 0x61, 0x6b, 0x69 }
#define RFC3962_AES_VECTOR_SIZE 17
#define RFC3962_AES_PLAIN_DATA { 0x49, 0x20, 0x77, 0x6f, 0x75, 0x6c, 0x64, 0x20, 0x6c, 0x69, 0x6b, 0x65, 0x20, 0x74, 0x68, 0x65, 0x20 }
#define RFC3962_AES_CBC_CTS_IV { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
#define RFC3962_AES_128_CBC_CTS_CIPHER { 0xc6, 0x35, 0x35, 0x68, 0xf2, 0xbf, 0x8c, 0xb4, 0xd8, 0xa5, 0x80, 0x36, 0x2d, 0xa7, 0xff, 0x7f, 0x97 }
-
#define NIST_AES_256_XTS_KEY { 0xa1, 0xb9, 0x0c, 0xba, 0x3f, 0x06, 0xac, 0x35, 0x3b, 0x2c, 0x34, 0x38, 0x76, 0x08, 0x17, 0x62, \
0x09, 0x09, 0x23, 0x02, 0x6e, 0x91, 0x77, 0x18, 0x15, 0xf2, 0x9d, 0xab, 0x01, 0x93, 0x2f, 0x2f }
#define NIST_AES_256_XTS_IV { 0x4f, 0xae, 0xf7, 0x11, 0x7c, 0xda, 0x59, 0xc6, 0x6e, 0x4b, 0x92, 0x01, 0x3e, 0x76, 0x8a, 0xd5 }
@@ -124,7 +122,6 @@
#define NIST_AES_512_XTS_CIPHER { 0xcb, 0xaa, 0xd0, 0xe2, 0xf6, 0xce, 0xa3, 0xf5, 0x0b, 0x37, 0xf9, 0x34, 0xd4, 0x6a, 0x9b, 0x13, \
0x0b, 0x9d, 0x54, 0xf0, 0x7e, 0x34, 0xf3, 0x6a, 0xf7, 0x93, 0xe8, 0x6f, 0x73, 0xc6, 0xd7, 0xdb }
-
/* NIST AES-CMAC */
#define NIST_AES_128_CMAC_KEY { 0x67, 0x08, 0xc9, 0x88, 0x7b, 0x84, 0x70, 0x84, 0xf1, 0x23, 0xd3, 0xdd, 0x9c, 0x3a, 0x81, 0x36 }
#define NIST_AES_128_CMAC_PLAIN_DATA { 0xa8, 0xde, 0x55, 0x17, 0x0c, 0x6d, 0xc0, 0xd8, 0x0d, 0xe3, 0x2f, 0x50, 0x8b, 0xf4, 0x9b, 0x70 }
@@ -147,7 +144,6 @@
#define NIST_AES_256_CMAC_VECTOR_SIZE 16
#define NIST_AES_256_CMAC_OUTPUT_SIZE 10
-
/* NIST TDES */
#define TDES_NUM_OF_KEYS 3
#define NIST_TDES_VECTOR_SIZE 8
@@ -168,7 +164,6 @@
#define NIST_TDES_CBC3_PLAIN_DATA { 0x3b, 0xb7, 0xa7, 0xdb, 0xa3, 0xd5, 0x92, 0x91 }
#define NIST_TDES_CBC3_CIPHER { 0x5b, 0x84, 0x24, 0xd2, 0x39, 0x3e, 0x55, 0xa2 }
-
/* NIST AES-CCM */
#define NIST_AESCCM_128_BIT_KEY_SIZE 16
#define NIST_AESCCM_192_BIT_KEY_SIZE 24
@@ -207,7 +202,6 @@
#define NIST_AESCCM_256_CIPHER { 0xcc, 0x17, 0xbf, 0x87, 0x94, 0xc8, 0x43, 0x45, 0x7d, 0x89, 0x93, 0x91, 0x89, 0x8e, 0xd2, 0x2a }
#define NIST_AESCCM_256_MAC { 0x6f, 0x9d, 0x28, 0xfc, 0xb6, 0x42, 0x34, 0xe1, 0xcd, 0x79, 0x3c, 0x41, 0x44, 0xf1, 0xda, 0x50 }
-
/* NIST AES-GCM */
#define NIST_AESGCM_128_BIT_KEY_SIZE 16
#define NIST_AESGCM_192_BIT_KEY_SIZE 24
@@ -241,7 +235,6 @@
#define NIST_AESGCM_256_CIPHER { 0x42, 0x6e, 0x0e, 0xfc, 0x69, 0x3b, 0x7b, 0xe1, 0xf3, 0x01, 0x8d, 0xb7, 0xdd, 0xbb, 0x7e, 0x4d }
#define NIST_AESGCM_256_MAC { 0xee, 0x82, 0x57, 0x79, 0x5b, 0xe6, 0xa1, 0x16, 0x4d, 0x7e, 0x1d, 0x2d, 0x6c, 0xac, 0x77, 0xa7 }
-
/* NIST HASH */
#define NIST_SHA_MSG_SIZE 16
@@ -259,7 +252,6 @@
0x8f, 0x2b, 0xa9, 0x1c, 0x3a, 0x9f, 0x0c, 0x16, 0x53, 0xc4, 0xbf, 0x0a, 0xda, 0x35, 0x64, 0x55, \
0xea, 0x36, 0xfd, 0x31, 0xf8, 0xe7, 0x3e, 0x39, 0x51, 0xca, 0xd4, 0xeb, 0xba, 0x8c, 0x6e, 0x04 }
-
/* NIST HMAC */
#define NIST_HMAC_MSG_SIZE 128
diff --git a/drivers/staging/ccree/ssi_fips_ext.c b/drivers/staging/ccree/ssi_fips_ext.c
index 295aeb6..e7bf184 100644
--- a/drivers/staging/ccree/ssi_fips_ext.c
+++ b/drivers/staging/ccree/ssi_fips_ext.c
@@ -23,7 +23,6 @@
#include "ssi_fips_local.h"
#include "ssi_driver.h"
-
static bool tee_error;
module_param(tee_error, bool, 0644);
MODULE_PARM_DESC(tee_error, "Simulate TEE library failure flag: 0 - no error (default), 1 - TEE error occured ");
@@ -91,4 +90,3 @@ int ssi_fips_ext_set_error(enum cc_fips_error err)
return 0;
}
-
diff --git a/drivers/staging/ccree/ssi_fips_ll.c b/drivers/staging/ccree/ssi_fips_ll.c
index cbb0fe2..3557e20 100644
--- a/drivers/staging/ccree/ssi_fips_ll.c
+++ b/drivers/staging/ccree/ssi_fips_ll.c
@@ -27,7 +27,6 @@
#include "ssi_hash.h"
#include "ssi_request_mgr.h"
-
static const u32 digest_len_init[] = {
0x00000040, 0x00000000, 0x00000000, 0x00000000 };
static const u32 sha1_init[] = {
@@ -43,7 +42,6 @@ static const u64 sha512_init[] = {
SHA512_H3, SHA512_H2, SHA512_H1, SHA512_H0 };
#endif
-
#define NIST_CIPHER_AES_MAX_VECTOR_SIZE 32
struct fips_cipher_ctx {
@@ -65,7 +63,6 @@ typedef struct _FipsCipherData {
size_t dataInSize;
} FipsCipherData;
-
struct fips_cmac_ctx {
u8 key[AES_256_BIT_KEY_SIZE];
u8 din[NIST_CIPHER_AES_MAX_VECTOR_SIZE];
@@ -82,7 +79,6 @@ typedef struct _FipsCmacData {
size_t mac_res_size;
} FipsCmacData;
-
struct fips_hash_ctx {
u8 initial_digest[CC_DIGEST_SIZE_MAX];
u8 din[NIST_SHA_MSG_SIZE];
@@ -96,7 +92,6 @@ typedef struct _FipsHashData {
u8 mac_res[CC_DIGEST_SIZE_MAX];
} FipsHashData;
-
/* note that the hmac key length must be equal or less than block size (block size is 64 up to sha256 and 128 for sha384/512) */
struct fips_hmac_ctx {
u8 initial_digest[CC_DIGEST_SIZE_MAX];
@@ -117,7 +112,6 @@ typedef struct _FipsHmacData {
u8 mac_res[CC_DIGEST_SIZE_MAX];
} FipsHmacData;
-
#define FIPS_CCM_B0_A0_ADATA_SIZE (NIST_AESCCM_IV_SIZE + NIST_AESCCM_IV_SIZE + NIST_AESCCM_ADATA_SIZE)
struct fips_ccm_ctx {
@@ -144,7 +138,6 @@ typedef struct _FipsCcmData {
u8 macResOut[NIST_AESCCM_TAG_SIZE];
} FipsCcmData;
-
struct fips_gcm_ctx {
u8 adata[NIST_AESGCM_ADATA_SIZE];
u8 key[CC_AES_KEY_SIZE_MAX];
@@ -171,7 +164,6 @@ typedef struct _FipsGcmData {
u8 macResOut[NIST_AESGCM_TAG_SIZE];
} FipsGcmData;
-
typedef union _fips_ctx {
struct fips_cipher_ctx cipher;
struct fips_cmac_ctx cmac;
@@ -181,7 +173,6 @@ typedef union _fips_ctx {
struct fips_gcm_ctx gcm;
} fips_ctx;
-
/* test data tables */
static const FipsCipherData FipsCipherDataTable[] = {
/* AES */
@@ -223,6 +214,7 @@ static const FipsCipherData FipsCipherDataTable[] = {
{ 0, NIST_TDES_CBC3_KEY, CC_DRV_DES_TRIPLE_KEY_SIZE, NIST_TDES_CBC3_IV, DRV_CRYPTO_DIRECTION_ENCRYPT, DRV_CIPHER_CBC, NIST_TDES_CBC3_PLAIN_DATA, NIST_TDES_CBC3_CIPHER, NIST_TDES_VECTOR_SIZE },
{ 0, NIST_TDES_CBC3_KEY, CC_DRV_DES_TRIPLE_KEY_SIZE, NIST_TDES_CBC3_IV, DRV_CRYPTO_DIRECTION_DECRYPT, DRV_CIPHER_CBC, NIST_TDES_CBC3_CIPHER, NIST_TDES_CBC3_PLAIN_DATA, NIST_TDES_VECTOR_SIZE },
};
+
#define FIPS_CIPHER_NUM_OF_TESTS (sizeof(FipsCipherDataTable) / sizeof(FipsCipherData))
static const FipsCmacData FipsCmacDataTable[] = {
@@ -230,6 +222,7 @@ static const FipsCmacData FipsCmacDataTable[] = {
{ DRV_CRYPTO_DIRECTION_ENCRYPT, NIST_AES_192_CMAC_KEY, AES_192_BIT_KEY_SIZE, NIST_AES_192_CMAC_PLAIN_DATA, NIST_AES_192_CMAC_VECTOR_SIZE, NIST_AES_192_CMAC_MAC, NIST_AES_192_CMAC_OUTPUT_SIZE },
{ DRV_CRYPTO_DIRECTION_ENCRYPT, NIST_AES_256_CMAC_KEY, AES_256_BIT_KEY_SIZE, NIST_AES_256_CMAC_PLAIN_DATA, NIST_AES_256_CMAC_VECTOR_SIZE, NIST_AES_256_CMAC_MAC, NIST_AES_256_CMAC_OUTPUT_SIZE },
};
+
#define FIPS_CMAC_NUM_OF_TESTS (sizeof(FipsCmacDataTable) / sizeof(FipsCmacData))
static const FipsHashData FipsHashDataTable[] = {
@@ -239,6 +232,7 @@ static const FipsHashData FipsHashDataTable[] = {
// { DRV_HASH_SHA512, NIST_SHA_512_MSG, NIST_SHA_MSG_SIZE, NIST_SHA_512_MD },
#endif
};
+
#define FIPS_HASH_NUM_OF_TESTS (sizeof(FipsHashDataTable) / sizeof(FipsHashData))
static const FipsHmacData FipsHmacDataTable[] = {
@@ -248,6 +242,7 @@ static const FipsHmacData FipsHmacDataTable[] = {
// { DRV_HASH_SHA512, NIST_HMAC_SHA512_KEY, NIST_HMAC_SHA512_KEY_SIZE, NIST_HMAC_SHA512_MSG, NIST_HMAC_MSG_SIZE, NIST_HMAC_SHA512_MD },
#endif
};
+
#define FIPS_HMAC_NUM_OF_TESTS (sizeof(FipsHmacDataTable) / sizeof(FipsHmacData))
static const FipsCcmData FipsCcmDataTable[] = {
@@ -258,6 +253,7 @@ static const FipsCcmData FipsCcmDataTable[] = {
{ DRV_CRYPTO_DIRECTION_ENCRYPT, NIST_AESCCM_256_KEY, NIST_AESCCM_256_BIT_KEY_SIZE, NIST_AESCCM_256_NONCE, NIST_AESCCM_256_ADATA, NIST_AESCCM_ADATA_SIZE, NIST_AESCCM_256_PLAIN_TEXT, NIST_AESCCM_TEXT_SIZE, NIST_AESCCM_256_CIPHER, NIST_AESCCM_TAG_SIZE, NIST_AESCCM_256_MAC },
{ DRV_CRYPTO_DIRECTION_DECRYPT, NIST_AESCCM_256_KEY, NIST_AESCCM_256_BIT_KEY_SIZE, NIST_AESCCM_256_NONCE, NIST_AESCCM_256_ADATA, NIST_AESCCM_ADATA_SIZE, NIST_AESCCM_256_CIPHER, NIST_AESCCM_TEXT_SIZE, NIST_AESCCM_256_PLAIN_TEXT, NIST_AESCCM_TAG_SIZE, NIST_AESCCM_256_MAC },
};
+
#define FIPS_CCM_NUM_OF_TESTS (sizeof(FipsCcmDataTable) / sizeof(FipsCcmData))
static const FipsGcmData FipsGcmDataTable[] = {
@@ -268,8 +264,8 @@ static const FipsGcmData FipsGcmDataTable[] = {
{ DRV_CRYPTO_DIRECTION_ENCRYPT, NIST_AESGCM_256_KEY, NIST_AESGCM_256_BIT_KEY_SIZE, NIST_AESGCM_256_IV, NIST_AESGCM_256_ADATA, NIST_AESGCM_ADATA_SIZE, NIST_AESGCM_256_PLAIN_TEXT, NIST_AESGCM_TEXT_SIZE, NIST_AESGCM_256_CIPHER, NIST_AESGCM_TAG_SIZE, NIST_AESGCM_256_MAC },
{ DRV_CRYPTO_DIRECTION_DECRYPT, NIST_AESGCM_256_KEY, NIST_AESGCM_256_BIT_KEY_SIZE, NIST_AESGCM_256_IV, NIST_AESGCM_256_ADATA, NIST_AESGCM_ADATA_SIZE, NIST_AESGCM_256_CIPHER, NIST_AESGCM_TEXT_SIZE, NIST_AESGCM_256_PLAIN_TEXT, NIST_AESGCM_TAG_SIZE, NIST_AESGCM_256_MAC },
};
-#define FIPS_GCM_NUM_OF_TESTS (sizeof(FipsGcmDataTable) / sizeof(FipsGcmData))
+#define FIPS_GCM_NUM_OF_TESTS (sizeof(FipsGcmDataTable) / sizeof(FipsGcmData))
static inline enum cc_fips_error
FIPS_CipherToFipsError(enum drv_cipher_mode mode, bool is_aes)
@@ -295,7 +291,6 @@ FIPS_CipherToFipsError(enum drv_cipher_mode mode, bool is_aes)
return CC_REE_FIPS_ERROR_GENERAL;
}
-
static inline int
ssi_cipher_fips_run_test(struct ssi_drvdata *drvdata,
bool is_aes,
@@ -414,7 +409,6 @@ ssi_cipher_fips_run_test(struct ssi_drvdata *drvdata,
return rc;
}
-
enum cc_fips_error
ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer)
{
@@ -479,7 +473,6 @@ ssi_cipher_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffe
return error;
}
-
static inline int
ssi_cmac_fips_run_test(struct ssi_drvdata *drvdata,
dma_addr_t key_dma_addr,
@@ -519,7 +512,6 @@ ssi_cmac_fips_run_test(struct ssi_drvdata *drvdata,
set_flow_mode(&desc[idx], S_DIN_to_AES);
idx++;
-
//ssi_hash_create_data_desc(state, ctx, DIN_AES_DOUT, desc, false, &idx);
hw_desc_init(&desc[idx]);
set_din_type(&desc[idx], DMA_DLLI, din_dma_addr, din_len, NS_BIT);
@@ -603,7 +595,6 @@ ssi_cmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
return error;
}
-
static inline enum cc_fips_error
FIPS_HashToFipsError(enum drv_hash_mode hash_mode)
{
@@ -779,7 +770,6 @@ ssi_hash_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
return error;
}
-
static inline enum cc_fips_error
FIPS_HmacToFipsError(enum drv_hash_mode hash_mode)
{
@@ -867,7 +857,6 @@ ssi_hmac_fips_run_test(struct ssi_drvdata *drvdata,
set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
idx++;
-
/* Load the hash current length*/
hw_desc_init(&desc[idx]);
set_cipher_mode(&desc[idx], hw_mode);
@@ -981,7 +970,6 @@ ssi_hmac_fips_run_test(struct ssi_drvdata *drvdata,
set_flow_mode(&desc[idx], DIN_HASH);
idx++;
-
/* Get final MAC result */
hw_desc_init(&desc[idx]);
set_cipher_mode(&desc[idx], hw_mode);
@@ -1112,7 +1100,6 @@ ssi_hmac_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
return error;
}
-
static inline int
ssi_ccm_fips_run_test(struct ssi_drvdata *drvdata,
enum drv_crypto_direction direction,
@@ -1277,6 +1264,7 @@ ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
{
/* build B0 -- B0, nonce, l(m) */
__be16 data = cpu_to_be16(NIST_AESCCM_TEXT_SIZE);
+
virt_ctx->b0_a0_adata[0] = NIST_AESCCM_B0_VAL;
memcpy(virt_ctx->b0_a0_adata + 1, ccmData->nonce, NIST_AESCCM_NONCE_SIZE);
memcpy(virt_ctx->b0_a0_adata + 14, (u8 *)&data, sizeof(__be16));
@@ -1340,7 +1328,6 @@ ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
return error;
}
-
static inline int
ssi_gcm_fips_run_test(struct ssi_drvdata *drvdata,
enum drv_crypto_direction direction,
@@ -1439,8 +1426,6 @@ ssi_gcm_fips_run_test(struct ssi_drvdata *drvdata,
set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
idx++;
-
-
///////////////////////////////// 2 ////////////////////////////////////
/* prcess(ghash) assoc data */
// if (req->assoclen > 0)
@@ -1452,7 +1437,6 @@ ssi_gcm_fips_run_test(struct ssi_drvdata *drvdata,
set_flow_mode(&desc[idx], DIN_HASH);
idx++;
-
///////////////////////////////// 3 ////////////////////////////////////
// ssi_aead_gcm_setup_gctr_desc(req, desc, seq_size);
///////////////////////////////// 3 ////////////////////////////////////
@@ -1478,7 +1462,6 @@ ssi_gcm_fips_run_test(struct ssi_drvdata *drvdata,
set_flow_mode(&desc[idx], S_DIN_to_AES);
idx++;
-
///////////////////////////////// 4 ////////////////////////////////////
/* process(gctr+ghash) */
// if (req_ctx->cryptlen != 0)
@@ -1491,7 +1474,6 @@ ssi_gcm_fips_run_test(struct ssi_drvdata *drvdata,
set_flow_mode(&desc[idx], cipher_flow_mode);
idx++;
-
///////////////////////////////// 5 ////////////////////////////////////
// ssi_aead_process_gcm_result_desc(req, desc, seq_size);
///////////////////////////////// 5 ////////////////////////////////////
@@ -1579,6 +1561,7 @@ ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
/* len_block */
{
__be64 len_bits;
+
len_bits = cpu_to_be64(gcmData->adataSize * 8);
memcpy(virt_ctx->len_block, &len_bits, sizeof(len_bits));
len_bits = cpu_to_be64(gcmData->dataInSize * 8);
@@ -1587,6 +1570,7 @@ ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
/* iv_inc1, iv_inc2 */
{
__be32 counter = cpu_to_be32(1);
+
memcpy(virt_ctx->iv_inc1, gcmData->iv, NIST_AESGCM_IV_SIZE);
memcpy(virt_ctx->iv_inc1 + NIST_AESGCM_IV_SIZE, &counter, sizeof(counter));
counter = cpu_to_be32(2);
@@ -1651,7 +1635,6 @@ ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer,
return error;
}
-
size_t ssi_fips_max_mem_alloc_size(void)
{
FIPS_DBG("sizeof(struct fips_cipher_ctx) %d \n", sizeof(struct fips_cipher_ctx));
diff --git a/drivers/staging/ccree/ssi_fips_local.c b/drivers/staging/ccree/ssi_fips_local.c
index 9b84876..aefb71d 100644
--- a/drivers/staging/ccree/ssi_fips_local.c
+++ b/drivers/staging/ccree/ssi_fips_local.c
@@ -26,7 +26,6 @@
#include "ssi_driver.h"
#include "cc_hal.h"
-
#define FIPS_POWER_UP_TEST_CIPHER 1
#define FIPS_POWER_UP_TEST_CMAC 1
#define FIPS_POWER_UP_TEST_HASH 1
@@ -49,7 +48,6 @@ struct ssi_fips_handle {
#endif
};
-
extern int ssi_fips_get_state(enum cc_fips_state_t *p_state);
extern int ssi_fips_get_error(enum cc_fips_error *p_err);
extern int ssi_fips_ext_set_state(enum cc_fips_state_t state);
@@ -64,7 +62,6 @@ extern enum cc_fips_error ssi_ccm_fips_power_up_tests(struct ssi_drvdata *drvdat
extern enum cc_fips_error ssi_gcm_fips_power_up_tests(struct ssi_drvdata *drvdata, void *cpu_addr_buffer, dma_addr_t dma_coherent_buffer);
extern size_t ssi_fips_max_mem_alloc_size(void);
-
/* The function called once at driver entry point to check whether TEE FIPS error occured.*/
static enum ssi_fips_error ssi_fips_get_tee_error(struct ssi_drvdata *drvdata)
{
@@ -78,7 +75,6 @@ static enum ssi_fips_error ssi_fips_get_tee_error(struct ssi_drvdata *drvdata)
return CC_REE_FIPS_ERROR_FROM_TEE;
}
-
/*
* This function should push the FIPS REE library status towards the TEE library.
* By writing the error state to HOST_GPR0 register. The function is called from
@@ -87,14 +83,13 @@ static enum ssi_fips_error ssi_fips_get_tee_error(struct ssi_drvdata *drvdata)
static void ssi_fips_update_tee_upon_ree_status(struct ssi_drvdata *drvdata, enum cc_fips_error err)
{
void __iomem *cc_base = drvdata->cc_base;
+
if (err == CC_REE_FIPS_ERROR_OK)
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), (CC_FIPS_SYNC_REE_STATUS | CC_FIPS_SYNC_MODULE_OK));
else
CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_GPR0), (CC_FIPS_SYNC_REE_STATUS | CC_FIPS_SYNC_MODULE_ERROR));
}
-
-
void ssi_fips_fini(struct ssi_drvdata *drvdata)
{
struct ssi_fips_handle *fips_h = drvdata->fips_handle;
@@ -127,8 +122,6 @@ void fips_handler(struct ssi_drvdata *drvdata)
#endif
}
-
-
#ifdef COMP_IN_WQ
static void fips_wq_handler(struct work_struct *work)
{
@@ -161,7 +154,6 @@ static void fips_dsr(unsigned long devarg)
CC_REG_OFFSET(HOST_RGF, HOST_IMR)) & ~irq);
}
-
enum cc_fips_error cc_fips_run_power_up_tests(struct ssi_drvdata *drvdata)
{
enum cc_fips_error fips_error = CC_REE_FIPS_ERROR_OK;
@@ -227,8 +219,6 @@ enum cc_fips_error cc_fips_run_power_up_tests(struct ssi_drvdata *drvdata)
return fips_error;
}
-
-
/* The function checks if FIPS supported and FIPS error exists.*
* It should be used in every driver API.
*/
@@ -247,7 +237,6 @@ int ssi_fips_check_fips_error(void)
return 0;
}
-
/* The function sets the REE FIPS state.*
* It should be used while driver is being loaded.
*/
@@ -293,7 +282,6 @@ int ssi_fips_set_error(struct ssi_drvdata *p_drvdata, enum cc_fips_error err)
return rc;
}
-
/* The function called once at driver entry point .*/
int ssi_fips_init(struct ssi_drvdata *p_drvdata)
{
diff --git a/drivers/staging/ccree/ssi_fips_local.h b/drivers/staging/ccree/ssi_fips_local.h
index 4bc7f37..8c7994f 100644
--- a/drivers/staging/ccree/ssi_fips_local.h
+++ b/drivers/staging/ccree/ssi_fips_local.h
@@ -17,7 +17,6 @@
#ifndef __SSI_FIPS_LOCAL_H__
#define __SSI_FIPS_LOCAL_H__
-
#ifdef CONFIG_CCX7REE_FIPS_SUPPORT
#include "ssi_fips.h"
@@ -28,11 +27,13 @@ struct ssi_drvdata;
return -ENOEXEC;\
} \
}
+
#define CHECK_AND_RETURN_VOID_UPON_FIPS_ERROR() {\
if (ssi_fips_check_fips_error() != 0) {\
return;\
} \
}
+
#define SSI_FIPS_INIT(p_drvData) (ssi_fips_init(p_drvData))
#define SSI_FIPS_FINI(p_drvData) (ssi_fips_fini(p_drvData))
@@ -62,6 +63,5 @@ void fips_handler(struct ssi_drvdata *drvdata);
#endif /* CONFIG_CC7XXREE_FIPS_SUPPORT */
-
#endif /*__SSI_FIPS_LOCAL_H__*/
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 79655bb..ae8f36a 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -83,7 +83,6 @@ struct ssi_hash_alg {
struct ahash_alg ahash_alg;
};
-
struct hash_key_req_ctx {
u32 keylen;
dma_addr_t key_dma_addr;
@@ -97,6 +96,7 @@ struct ssi_hash_ctx {
*/
u8 digest_buff[SSI_MAX_HASH_DIGEST_SIZE] ____cacheline_aligned;
u8 opad_tmp_keys_buff[SSI_MAX_HASH_OPAD_TMP_KEYS_SIZE] ____cacheline_aligned;
+
dma_addr_t opad_tmp_keys_dma_addr ____cacheline_aligned;
dma_addr_t digest_buff_dma_addr;
/* use for hmac with key large then mode block size */
@@ -429,7 +429,6 @@ static int ssi_hash_digest(struct ahash_req_ctx *state,
int idx = 0;
int rc = 0;
-
SSI_LOG_DEBUG("===== %s-digest (%d) ====\n", is_hmac ? "hmac" : "hash", nbytes);
CHECK_AND_RETURN_UPON_FIPS_ERROR();
@@ -962,6 +961,7 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE);
static int ssi_hash_init(struct ahash_req_ctx *state, struct ssi_hash_ctx *ctx)
{
struct device *dev = &ctx->drvdata->plat_dev->dev;
+
state->xcbc_count = 0;
CHECK_AND_RETURN_UPON_FIPS_ERROR();
@@ -1164,7 +1164,6 @@ static int ssi_hash_setkey(void *hash,
return rc;
}
-
static int ssi_xcbc_setkey(struct crypto_ahash *ahash,
const u8 *key, unsigned int keylen)
{
@@ -1252,11 +1251,13 @@ static int ssi_xcbc_setkey(struct crypto_ahash *ahash,
return rc;
}
+
#if SSI_CC_HAS_CMAC
static int ssi_cmac_setkey(struct crypto_ahash *ahash,
const u8 *key, unsigned int keylen)
{
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+
SSI_LOG_DEBUG("===== setkey (%d) ====\n", keylen);
CHECK_AND_RETURN_UPON_FIPS_ERROR();
@@ -1289,7 +1290,6 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash,
ctx->key_params.keylen = keylen;
-
return 0;
}
#endif
@@ -1319,7 +1319,6 @@ static void ssi_hash_free_ctx(struct ssi_hash_ctx *ctx)
ctx->key_params.keylen = 0;
}
-
static int ssi_hash_alloc_ctx(struct ssi_hash_ctx *ctx)
{
struct device *dev = &ctx->drvdata->plat_dev->dev;
@@ -1365,7 +1364,6 @@ static int ssi_ahash_cra_init(struct crypto_tfm *tfm)
struct ssi_hash_alg *ssi_alg =
container_of(ahash_alg, struct ssi_hash_alg, ahash_alg);
-
CHECK_AND_RETURN_UPON_FIPS_ERROR();
crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
sizeof(struct ahash_req_ctx));
@@ -1462,7 +1460,6 @@ static int ssi_mac_final(struct ahash_request *req)
u32 rem_cnt = state->buff_index ? state->buff1_cnt :
state->buff0_cnt;
-
CHECK_AND_RETURN_UPON_FIPS_ERROR();
if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) {
keySize = CC_AES_128_BIT_KEY_SIZE;
@@ -1501,7 +1498,6 @@ static int ssi_mac_final(struct ahash_request *req)
set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
idx++;
-
/* Initiate decryption of block state to previous block_state-XOR-M[n] */
hw_desc_init(&desc[idx]);
set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr,
diff --git a/drivers/staging/ccree/ssi_ivgen.c b/drivers/staging/ccree/ssi_ivgen.c
index a275151..5ff3368 100644
--- a/drivers/staging/ccree/ssi_ivgen.c
+++ b/drivers/staging/ccree/ssi_ivgen.c
@@ -296,4 +296,3 @@ int ssi_ivgen_getiv(
return 0;
}
-
diff --git a/drivers/staging/ccree/ssi_ivgen.h b/drivers/staging/ccree/ssi_ivgen.h
index d466124..961aea4 100644
--- a/drivers/staging/ccree/ssi_ivgen.h
+++ b/drivers/staging/ccree/ssi_ivgen.h
@@ -19,7 +19,6 @@
#include "cc_hw_queue_defs.h"
-
#define SSI_IVPOOL_SEQ_LEN 8
/*!
diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c
index d3ddfb1..52a8ed5 100644
--- a/drivers/staging/ccree/ssi_pm.c
+++ b/drivers/staging/ccree/ssi_pm.c
@@ -14,7 +14,6 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-
#include "ssi_config.h"
#include <linux/kernel.h>
#include <linux/platform_device.h>
@@ -30,13 +29,11 @@
#include "ssi_hash.h"
#include "ssi_pm.h"
-
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
#define POWER_DOWN_ENABLE 0x01
#define POWER_DOWN_DISABLE 0x00
-
int ssi_power_mgr_runtime_suspend(struct device *dev)
{
struct ssi_drvdata *drvdata =
@@ -119,8 +116,6 @@ int ssi_power_mgr_runtime_put_suspend(struct device *dev)
#endif
-
-
int ssi_power_mgr_init(struct ssi_drvdata *drvdata)
{
int rc = 0;
diff --git a/drivers/staging/ccree/ssi_pm.h b/drivers/staging/ccree/ssi_pm.h
index 4874987..63673f6 100644
--- a/drivers/staging/ccree/ssi_pm.h
+++ b/drivers/staging/ccree/ssi_pm.h
@@ -20,14 +20,11 @@
#ifndef __SSI_POWER_MGR_H__
#define __SSI_POWER_MGR_H__
-
#include "ssi_config.h"
#include "ssi_driver.h"
-
#define SSI_SUSPEND_TIMEOUT 3000
-
int ssi_power_mgr_init(struct ssi_drvdata *drvdata);
void ssi_power_mgr_fini(struct ssi_drvdata *drvdata);
diff --git a/drivers/staging/ccree/ssi_request_mgr.c b/drivers/staging/ccree/ssi_request_mgr.c
index f6f7ea8..46d9396 100644
--- a/drivers/staging/ccree/ssi_request_mgr.c
+++ b/drivers/staging/ccree/ssi_request_mgr.c
@@ -50,6 +50,7 @@ struct ssi_request_mgr_handle {
u8 *dummy_comp_buff;
dma_addr_t dummy_comp_buff_dma;
struct cc_hw_desc monitor_desc;
+
volatile unsigned long monitor_lock;
#ifdef COMP_IN_WQ
struct workqueue_struct *workq;
@@ -135,7 +136,6 @@ int request_mgr_init(struct ssi_drvdata *drvdata)
req_mgr_h->min_free_hw_slots = req_mgr_h->hw_queue_size;
req_mgr_h->max_used_sw_slots = 0;
-
/* Allocate DMA word for "dummy" completion descriptor use */
req_mgr_h->dummy_comp_buff = dma_alloc_coherent(&drvdata->plat_dev->dev,
sizeof(u32), &req_mgr_h->dummy_comp_buff_dma, GFP_KERNEL);
@@ -192,10 +192,10 @@ static inline void enqueue_seq(
static void request_mgr_complete(struct device *dev, void *dx_compl_h, void __iomem *cc_base)
{
struct completion *this_compl = dx_compl_h;
+
complete(this_compl);
}
-
static inline int request_mgr_queues_status_check(
struct ssi_request_mgr_handle *req_mgr_h,
void __iomem *cc_base,
@@ -389,7 +389,6 @@ int send_request(
}
}
-
/*!
* Enqueue caller request to crypto hardware during init process.
* assume this function is not called in middle of a flow,
@@ -426,7 +425,6 @@ int send_request_init(
return 0;
}
-
void complete_request(struct ssi_drvdata *drvdata)
{
struct ssi_request_mgr_handle *request_mgr_handle =
@@ -478,6 +476,7 @@ static void proc_completions(struct ssi_drvdata *drvdata)
{
u32 axi_err;
int i;
+
SSI_LOG_INFO("Delay\n");
for (i = 0; i < 1000000; i++)
axi_err = READ_REGISTER(drvdata->cc_base + CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR));
@@ -516,8 +515,6 @@ static void comp_handler(unsigned long devarg)
u32 irq;
-
-
irq = (drvdata->irq & SSI_COMP_IRQ_MASK);
if (irq & SSI_COMP_IRQ_MASK) {
diff --git a/drivers/staging/ccree/ssi_sram_mgr.c b/drivers/staging/ccree/ssi_sram_mgr.c
index cf03df3..e05c0c1 100644
--- a/drivers/staging/ccree/ssi_sram_mgr.c
+++ b/drivers/staging/ccree/ssi_sram_mgr.c
@@ -17,7 +17,6 @@
#include "ssi_driver.h"
#include "ssi_sram_mgr.h"
-
/**
* struct ssi_sram_mgr_ctx -Internal RAM context manager
* @sram_free_offset: the offset to the non-allocated area
@@ -26,7 +25,6 @@ struct ssi_sram_mgr_ctx {
ssi_sram_addr_t sram_free_offset;
};
-
/**
* ssi_sram_mgr_fini() - Cleanup SRAM pool.
*
diff --git a/drivers/staging/ccree/ssi_sram_mgr.h b/drivers/staging/ccree/ssi_sram_mgr.h
index ece6359..9ba1d59 100644
--- a/drivers/staging/ccree/ssi_sram_mgr.h
+++ b/drivers/staging/ccree/ssi_sram_mgr.h
@@ -17,7 +17,6 @@
#ifndef __SSI_SRAM_MGR_H__
#define __SSI_SRAM_MGR_H__
-
#ifndef SSI_CC_SRAM_SIZE
#define SSI_CC_SRAM_SIZE 4096
#endif
diff --git a/drivers/staging/ccree/ssi_sysfs.c b/drivers/staging/ccree/ssi_sysfs.c
index 75c9a89..dbcd163 100644
--- a/drivers/staging/ccree/ssi_sysfs.c
+++ b/drivers/staging/ccree/ssi_sysfs.c
@@ -108,7 +108,6 @@ static DEFINE_SPINLOCK(stat_lock);
static struct stat_item stat_host_db[MAX_STAT_OP_TYPES][MAX_STAT_PHASES];
static struct stat_item stat_cc_db[MAX_STAT_OP_TYPES][MAX_STAT_PHASES];
-
static void init_db(struct stat_item item[MAX_STAT_OP_TYPES][MAX_STAT_PHASES])
{
unsigned int i, j;
@@ -152,7 +151,6 @@ static void display_db(struct stat_item item[MAX_STAT_OP_TYPES][MAX_STAT_PHASES]
}
}
-
/**************************************
* Attributes show functions section *
**************************************/
@@ -278,8 +276,6 @@ void display_all_stat_db(void)
}
#endif /*CC_CYCLE_COUNT*/
-
-
static ssize_t ssi_sys_regdump_show(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
diff --git a/drivers/staging/ccree/ssi_sysfs.h b/drivers/staging/ccree/ssi_sysfs.h
index 4893e01..44ae3d4 100644
--- a/drivers/staging/ccree/ssi_sysfs.h
+++ b/drivers/staging/ccree/ssi_sysfs.h
@@ -36,6 +36,7 @@ enum stat_phase {
STAT_PHASE_6,
MAX_STAT_PHASES,
};
+
enum stat_op {
STAT_OP_TYPE_NULL = 0,
STAT_OP_TYPE_ENCODE,
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH 14/14] staging: ccree: fix block comment style
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
` (12 preceding siblings ...)
2017-06-27 7:27 ` [PATCH 13/14] staging: ccree: remove/add (un)needed blank lines Gilad Ben-Yossef
@ 2017-06-27 7:27 ` Gilad Ben-Yossef
2017-06-29 14:38 ` Frans Klaver
13 siblings, 1 reply; 16+ messages in thread
From: Gilad Ben-Yossef @ 2017-06-27 7:27 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-crypto, driverdev-devel, devel, linux-kernel
Cc: Ofir Drang
Align block comments according to coding style.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---
drivers/staging/ccree/cc_hw_queue_defs.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h b/drivers/staging/ccree/cc_hw_queue_defs.h
index f11487a..e6b8cea 100644
--- a/drivers/staging/ccree/cc_hw_queue_defs.h
+++ b/drivers/staging/ccree/cc_hw_queue_defs.h
@@ -23,8 +23,8 @@
#include <linux/bitfield.h>
/******************************************************************************
-* DEFINITIONS
-******************************************************************************/
+ * DEFINITIONS
+ ******************************************************************************/
#define HW_DESC_SIZE_WORDS 6
#define HW_QUEUE_SLOTS_MAX 15 /* Max. available slots in HW queue */
@@ -70,8 +70,8 @@
#define WORD5_DOUT_ADDR_HIGH CC_GENMASK(5, DOUT_ADDR_HIGH)
/******************************************************************************
-* TYPE DEFINITIONS
-******************************************************************************/
+ * TYPE DEFINITIONS
+ ******************************************************************************/
struct cc_hw_desc {
union {
--
2.1.4
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH 14/14] staging: ccree: fix block comment style
2017-06-27 7:27 ` [PATCH 14/14] staging: ccree: fix block comment style Gilad Ben-Yossef
@ 2017-06-29 14:38 ` Frans Klaver
0 siblings, 0 replies; 16+ messages in thread
From: Frans Klaver @ 2017-06-29 14:38 UTC (permalink / raw)
To: Gilad Ben-Yossef
Cc: Greg Kroah-Hartman, linux-crypto, driverdev-devel, driverdevel,
linux-kernel, Ofir Drang
On Tue, Jun 27, 2017 at 9:27 AM, Gilad Ben-Yossef <gilad@benyossef.com> wrote:
> Align block comments according to coding style.
>
> Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
> ---
> drivers/staging/ccree/cc_hw_queue_defs.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/staging/ccree/cc_hw_queue_defs.h b/drivers/staging/ccree/cc_hw_queue_defs.h
> index f11487a..e6b8cea 100644
> --- a/drivers/staging/ccree/cc_hw_queue_defs.h
> +++ b/drivers/staging/ccree/cc_hw_queue_defs.h
> @@ -23,8 +23,8 @@
> #include <linux/bitfield.h>
>
> /******************************************************************************
> -* DEFINITIONS
> -******************************************************************************/
> + * DEFINITIONS
> + ******************************************************************************/
I think if you change to the preferred block comment format, you
should also drop these lines full of asterisks. I'm not sure why a
multi-line comment is warranted here, anyway.
Frans
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2017-06-29 14:38 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-06-27 7:27 [PATCH 00/14] staging: ccree: coding style fixes Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 01/14] staging: ccree: fix missing or redundant spaces Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 02/14] staging: ccree: drop comparsion to true/false Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 03/14] staging: ccree: fix else placement Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 04/14] staging: ccree: remove redundant blank lines Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 05/14] staging: ccree: no need for braces for single statements Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 06/14] staging: ccree: fix unmatched if/else braces Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 07/14] staging: ccree: remove comparisons to NULL Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 08/14] staging: ccree: fix pointer location Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 09/14] staging: ccree: remove custom type tdes_keys_t Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 10/14] staging: ccree: remove custom type ssi_fips_error_t Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 11/14] staging: ccree: remove custom type ssi_fips_state_t Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 12/14] staging: ccree: remove unused type CCFipsSyncStatus_t Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 13/14] staging: ccree: remove/add (un)needed blank lines Gilad Ben-Yossef
2017-06-27 7:27 ` [PATCH 14/14] staging: ccree: fix block comment style Gilad Ben-Yossef
2017-06-29 14:38 ` Frans Klaver
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).