* [PATCH v2 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault
@ 2019-04-22 7:10 Vivek Gautam
2019-04-23 11:12 ` Robin Murphy
2019-04-23 11:19 ` Will Deacon
0 siblings, 2 replies; 4+ messages in thread
From: Vivek Gautam @ 2019-04-22 7:10 UTC (permalink / raw)
To: joro, will.deacon, robin.murphy, iommu
Cc: vivek.gautam, linux-kernel, linux-arm-kernel, linux-arm-msm,
bjorn.andersson
Bits[15:0] in CBFRSYNRA register contain information about
StreamID of the incoming transaction that generated the
fault. Dump CBFRSYNRA register to get this info.
This is specially useful in a distributed SMMU architecture
where multiple masters are connected to the SMMU.
SID information helps to quickly identify the faulting
master device.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v1:
- Addressed review comments, given by Bjorn, for nits.
drivers/iommu/arm-smmu-regs.h | 2 ++
drivers/iommu/arm-smmu.c | 7 +++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h
index a1226e4ab5f8..e9132a926761 100644
--- a/drivers/iommu/arm-smmu-regs.h
+++ b/drivers/iommu/arm-smmu-regs.h
@@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg {
#define CBAR_IRPTNDX_SHIFT 24
#define CBAR_IRPTNDX_MASK 0xff
+#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2))
+
#define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2))
#define CBA2R_RW64_32BIT (0 << 0)
#define CBA2R_RW64_64BIT (1 << 0)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 045d93884164..e000473f8205 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
struct arm_smmu_device *smmu = smmu_domain->smmu;
+ void __iomem *gr1_base = ARM_SMMU_GR1(smmu);
void __iomem *cb_base;
+ u32 cbfrsynra;
cb_base = ARM_SMMU_CB(smmu, cfg->cbndx);
fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR);
@@ -585,10 +587,11 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0);
iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR);
+ cbfrsynra = readl_relaxed(gr1_base + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx));
dev_err_ratelimited(smmu->dev,
- "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n",
- fsr, iova, fsynr, cfg->cbndx);
+ "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n",
+ fsr, iova, fsynr, cbfrsynra, cfg->cbndx);
writel(fsr, cb_base + ARM_SMMU_CB_FSR);
return IRQ_HANDLED;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault
2019-04-22 7:10 [PATCH v2 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault Vivek Gautam
@ 2019-04-23 11:12 ` Robin Murphy
2019-04-23 11:16 ` Ard Biesheuvel
2019-04-23 11:19 ` Will Deacon
1 sibling, 1 reply; 4+ messages in thread
From: Robin Murphy @ 2019-04-23 11:12 UTC (permalink / raw)
To: Vivek Gautam, joro, will.deacon, iommu
Cc: linux-kernel, linux-arm-kernel, linux-arm-msm, bjorn.andersson
On 22/04/2019 08:10, Vivek Gautam wrote:
> Bits[15:0] in CBFRSYNRA register contain information about
> StreamID of the incoming transaction that generated the
> fault. Dump CBFRSYNRA register to get this info.
> This is specially useful in a distributed SMMU architecture
> where multiple masters are connected to the SMMU.
> SID information helps to quickly identify the faulting
> master device.
>
> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>
> Changes since v1:
> - Addressed review comments, given by Bjorn, for nits.
>
> drivers/iommu/arm-smmu-regs.h | 2 ++
> drivers/iommu/arm-smmu.c | 7 +++++--
> 2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h
> index a1226e4ab5f8..e9132a926761 100644
> --- a/drivers/iommu/arm-smmu-regs.h
> +++ b/drivers/iommu/arm-smmu-regs.h
> @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg {
> #define CBAR_IRPTNDX_SHIFT 24
> #define CBAR_IRPTNDX_MASK 0xff
>
> +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2))
> +
> #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2))
> #define CBA2R_RW64_32BIT (0 << 0)
> #define CBA2R_RW64_64BIT (1 << 0)
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index 045d93884164..e000473f8205 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
> struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
> struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
> struct arm_smmu_device *smmu = smmu_domain->smmu;
> + void __iomem *gr1_base = ARM_SMMU_GR1(smmu);
> void __iomem *cb_base;
> + u32 cbfrsynra;
Nit: I would simply add to the existing "u32 fsr, fsynr;" declaration,
but that's the sort of thing that could hopefully be fixed up when
applying (or otherwise I might bulldoze it anyway in my eventual rework
of register accesses throughout the driver). Regardless,
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> cb_base = ARM_SMMU_CB(smmu, cfg->cbndx);
> fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR);
> @@ -585,10 +587,11 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
>
> fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0);
> iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR);
> + cbfrsynra = readl_relaxed(gr1_base + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx));
>
> dev_err_ratelimited(smmu->dev,
> - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n",
> - fsr, iova, fsynr, cfg->cbndx);
> + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n",
> + fsr, iova, fsynr, cbfrsynra, cfg->cbndx);
>
> writel(fsr, cb_base + ARM_SMMU_CB_FSR);
> return IRQ_HANDLED;
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault
2019-04-23 11:12 ` Robin Murphy
@ 2019-04-23 11:16 ` Ard Biesheuvel
0 siblings, 0 replies; 4+ messages in thread
From: Ard Biesheuvel @ 2019-04-23 11:16 UTC (permalink / raw)
To: Robin Murphy
Cc: Vivek Gautam,
list@263.net:IOMMU DRIVERS
<iommu@lists.linux-foundation.org>,
Joerg Roedel <joro@8bytes.org>,,
Will Deacon,
list@263.net:IOMMU DRIVERS
<iommu@lists.linux-foundation.org>,
Joerg Roedel <joro@8bytes.org>,,
linux-arm-msm, Linux Kernel Mailing List, linux-arm-kernel,
Bjorn Andersson
On Tue, 23 Apr 2019 at 13:13, Robin Murphy <robin.murphy@arm.com> wrote:
>
> On 22/04/2019 08:10, Vivek Gautam wrote:
> > Bits[15:0] in CBFRSYNRA register contain information about
> > StreamID of the incoming transaction that generated the
> > fault. Dump CBFRSYNRA register to get this info.
> > This is specially useful in a distributed SMMU architecture
> > where multiple masters are connected to the SMMU.
> > SID information helps to quickly identify the faulting
> > master device.
> >
> > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > ---
> >
> > Changes since v1:
> > - Addressed review comments, given by Bjorn, for nits.
> >
> > drivers/iommu/arm-smmu-regs.h | 2 ++
> > drivers/iommu/arm-smmu.c | 7 +++++--
> > 2 files changed, 7 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h
> > index a1226e4ab5f8..e9132a926761 100644
> > --- a/drivers/iommu/arm-smmu-regs.h
> > +++ b/drivers/iommu/arm-smmu-regs.h
> > @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg {
> > #define CBAR_IRPTNDX_SHIFT 24
> > #define CBAR_IRPTNDX_MASK 0xff
> >
> > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2))
> > +
> > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2))
> > #define CBA2R_RW64_32BIT (0 << 0)
> > #define CBA2R_RW64_64BIT (1 << 0)
> > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> > index 045d93884164..e000473f8205 100644
> > --- a/drivers/iommu/arm-smmu.c
> > +++ b/drivers/iommu/arm-smmu.c
> > @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
> > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
> > struct arm_smmu_cfg *cfg = &smmu_domain->cfg;
> > struct arm_smmu_device *smmu = smmu_domain->smmu;
> > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu);
> > void __iomem *cb_base;
> > + u32 cbfrsynra;
>
> Nit: I would simply add to the existing "u32 fsr, fsynr;" declaration,
> but that's the sort of thing that could hopefully be fixed up when
> applying (or otherwise I might bulldoze it anyway in my eventual rework
> of register accesses throughout the driver). Regardless,
>
> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
>
> > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx);
> > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR);
> > @@ -585,10 +587,11 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
> >
> > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0);
> > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR);
> > + cbfrsynra = readl_relaxed(gr1_base + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx));
> >
> > dev_err_ratelimited(smmu->dev,
> > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n",
> > - fsr, iova, fsynr, cfg->cbndx);
> > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n",
> > + fsr, iova, fsynr, cbfrsynra, cfg->cbndx);
> >
> > writel(fsr, cb_base + ARM_SMMU_CB_FSR);
> > return IRQ_HANDLED;
> >
>
This is something I've had to hack up locally in the past, so
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault
2019-04-22 7:10 [PATCH v2 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault Vivek Gautam
2019-04-23 11:12 ` Robin Murphy
@ 2019-04-23 11:19 ` Will Deacon
1 sibling, 0 replies; 4+ messages in thread
From: Will Deacon @ 2019-04-23 11:19 UTC (permalink / raw)
To: Vivek Gautam
Cc: joro, robin.murphy, iommu, linux-kernel, linux-arm-kernel,
linux-arm-msm, bjorn.andersson
On Mon, Apr 22, 2019 at 12:40:36PM +0530, Vivek Gautam wrote:
> Bits[15:0] in CBFRSYNRA register contain information about
> StreamID of the incoming transaction that generated the
> fault. Dump CBFRSYNRA register to get this info.
> This is specially useful in a distributed SMMU architecture
> where multiple masters are connected to the SMMU.
> SID information helps to quickly identify the faulting
> master device.
>
> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>
> Changes since v1:
> - Addressed review comments, given by Bjorn, for nits.
Thanks, applied with minor fixup from Robin and Acks.
Will
^ permalink raw reply [flat|nested] 4+ messages in thread
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2019-04-22 7:10 [PATCH v2 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault Vivek Gautam
2019-04-23 11:12 ` Robin Murphy
2019-04-23 11:16 ` Ard Biesheuvel
2019-04-23 11:19 ` Will Deacon
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