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* [PATCH V1 0/3] High baud rate supports of F81866/F81216H
@ 2017-10-03  3:08 Ji-Ze Hong (Peter Hong)
  2017-10-03  3:08 ` [PATCH V1 1/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81866 Ji-Ze Hong (Peter Hong)
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Ji-Ze Hong (Peter Hong) @ 2017-10-03  3:08 UTC (permalink / raw)
  To: gregkh, jslaby
  Cc: rel+kernel, linux-serial, linux-kernel, peter_hong,
	Ji-Ze Hong (Peter Hong)

The Fintek F81866/F81216H support high baud rate and it's up to 1.5Mbps
with 24MHz clock source. It's also support 500Kbps via 24MHz clock too.

We'll implements clock source checking in function fintek_8250_set_termios().

Ji-Ze Hong (Peter Hong) (3):
  serial: 8250_fintek: UART dynamic clocksource on Fintek F81866
  serial: 8250_fintek: UART dynamic clocksource on Fintek F81216H
  serial: 8250_fintek: fix warning reported from smatch

 drivers/tty/serial/8250/8250_fintek.c | 84 ++++++++++++++++++++++++++++++++++-
 1 file changed, 83 insertions(+), 1 deletion(-)

-- 
1.9.1

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH V1 1/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81866
  2017-10-03  3:08 [PATCH V1 0/3] High baud rate supports of F81866/F81216H Ji-Ze Hong (Peter Hong)
@ 2017-10-03  3:08 ` Ji-Ze Hong (Peter Hong)
  2017-10-03  3:08 ` [PATCH V1 2/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81216H Ji-Ze Hong (Peter Hong)
  2017-10-03  3:08 ` [PATCH V1 3/3] serial: 8250_fintek: fix warning reported from smatch Ji-Ze Hong (Peter Hong)
  2 siblings, 0 replies; 4+ messages in thread
From: Ji-Ze Hong (Peter Hong) @ 2017-10-03  3:08 UTC (permalink / raw)
  To: gregkh, jslaby
  Cc: rel+kernel, linux-serial, linux-kernel, peter_hong,
	Ji-Ze Hong (Peter Hong)

The F81866 had 4 clocksource 1.8432/18.432/14.769/24MHz and baud rates can
be up to 1.5Mbits with 24MHz. We'll implements the dynamic clocksource in
fintek_8250_set_termios().

Signed-off-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
---
 drivers/tty/serial/8250/8250_fintek.c | 54 +++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
index e500f7d..53ea353 100644
--- a/drivers/tty/serial/8250/8250_fintek.c
+++ b/drivers/tty/serial/8250/8250_fintek.c
@@ -287,6 +287,59 @@ static void fintek_8250_goto_highspeed(struct uart_8250_port *uart,
 	}
 }
 
+void fintek_8250_set_termios(struct uart_port *port, struct ktermios *termios,
+			struct ktermios *old)
+{
+	struct fintek_8250 *pdata = port->private_data;
+	unsigned int baud = tty_termios_baud_rate(termios);
+	int i;
+	static u32 baudrate_table[] = {115200, 921600, 1152000, 1500000};
+	static u8 clock_table[] = { F81866_UART_CLK_1_8432MHZ,
+			F81866_UART_CLK_14_769MHZ, F81866_UART_CLK_18_432MHZ,
+			F81866_UART_CLK_24MHZ };
+
+	for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) {
+		if (baud > baudrate_table[i] || baudrate_table[i] % baud != 0)
+			continue;
+
+		if (port->uartclk == baudrate_table[i] * 16)
+			break;
+
+		if (fintek_8250_enter_key(pdata->base_port, pdata->key))
+			continue;
+
+		port->uartclk = baudrate_table[i] * 16;
+
+		sio_write_reg(pdata, LDN, pdata->index);
+		sio_write_mask_reg(pdata, F81866_UART_CLK,
+				F81866_UART_CLK_MASK, clock_table[i]);
+
+		fintek_8250_exit_key(pdata->base_port);
+		break;
+	}
+
+	if (i == ARRAY_SIZE(baudrate_table)) {
+		baud = tty_termios_baud_rate(old);
+		tty_termios_encode_baud_rate(termios, baud, baud);
+	}
+
+	serial8250_do_set_termios(port, termios, old);
+}
+
+static void fintek_8250_set_termios_handler(struct uart_8250_port *uart)
+{
+	struct fintek_8250 *pdata = uart->port.private_data;
+
+	switch (pdata->pid) {
+	case CHIP_ID_F81866:
+		uart->port.set_termios = fintek_8250_set_termios;
+		break;
+
+	default:
+		break;
+	}
+}
+
 static int probe_setup_port(struct fintek_8250 *pdata,
 					struct uart_8250_port *uart)
 {
@@ -373,6 +426,7 @@ int fintek_8250_probe(struct uart_8250_port *uart)
 	memcpy(pdata, &probe_data, sizeof(probe_data));
 	uart->port.private_data = pdata;
 	fintek_8250_set_rs485_handler(uart);
+	fintek_8250_set_termios_handler(uart);
 
 	return 0;
 }
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH V1 2/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81216H
  2017-10-03  3:08 [PATCH V1 0/3] High baud rate supports of F81866/F81216H Ji-Ze Hong (Peter Hong)
  2017-10-03  3:08 ` [PATCH V1 1/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81866 Ji-Ze Hong (Peter Hong)
@ 2017-10-03  3:08 ` Ji-Ze Hong (Peter Hong)
  2017-10-03  3:08 ` [PATCH V1 3/3] serial: 8250_fintek: fix warning reported from smatch Ji-Ze Hong (Peter Hong)
  2 siblings, 0 replies; 4+ messages in thread
From: Ji-Ze Hong (Peter Hong) @ 2017-10-03  3:08 UTC (permalink / raw)
  To: gregkh, jslaby
  Cc: rel+kernel, linux-serial, linux-kernel, peter_hong,
	Ji-Ze Hong (Peter Hong)

The F81216H had 4 clocksource 1.8432/18.432/14.769/24MHzand  baud rates can
be up to 1.5Mbits with 24MHz. The register value and mask is the same with
F81866. But F81866 register address is F2h, F81216H is F0h.

We'll implements the dynamic clocksource in fintek_8250_set_termios().

Signed-off-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
---
 drivers/tty/serial/8250/8250_fintek.c | 32 ++++++++++++++++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
index 53ea353..f3b622f 100644
--- a/drivers/tty/serial/8250/8250_fintek.c
+++ b/drivers/tty/serial/8250/8250_fintek.c
@@ -40,6 +40,16 @@
 #define IRQ_LEVEL_LOW	0
 #define IRQ_EDGE_HIGH	BIT(5)
 
+/*
+ * F81216H clock source register, the value and mask is the same with F81866,
+ * but it's on F0h.
+ *
+ * Clock speeds for UART (register F0h)
+ * 00: 1.8432MHz.
+ * 01: 18.432MHz.
+ * 10: 24MHz.
+ * 11: 14.769MHz.
+ */
 #define RS485  0xF0
 #define RTS_INVERT BIT(5)
 #define RS485_URA BIT(4)
@@ -293,11 +303,28 @@ void fintek_8250_set_termios(struct uart_port *port, struct ktermios *termios,
 	struct fintek_8250 *pdata = port->private_data;
 	unsigned int baud = tty_termios_baud_rate(termios);
 	int i;
+	u8 reg;
 	static u32 baudrate_table[] = {115200, 921600, 1152000, 1500000};
 	static u8 clock_table[] = { F81866_UART_CLK_1_8432MHZ,
 			F81866_UART_CLK_14_769MHZ, F81866_UART_CLK_18_432MHZ,
 			F81866_UART_CLK_24MHZ };
 
+	switch (pdata->pid) {
+	case CHIP_ID_F81216H:
+		reg = RS485;
+		break;
+	case CHIP_ID_F81866:
+		reg = F81866_UART_CLK;
+		break;
+	default:
+		/* Don't change clocksource with unknown PID */
+		dev_warn(port->dev,
+			"%s: pid: %x Not support. use default set_termios.\n",
+			__func__, pdata->pid);
+		serial8250_do_set_termios(port, termios, old);
+		return;
+	}
+
 	for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) {
 		if (baud > baudrate_table[i] || baudrate_table[i] % baud != 0)
 			continue;
@@ -311,8 +338,8 @@ void fintek_8250_set_termios(struct uart_port *port, struct ktermios *termios,
 		port->uartclk = baudrate_table[i] * 16;
 
 		sio_write_reg(pdata, LDN, pdata->index);
-		sio_write_mask_reg(pdata, F81866_UART_CLK,
-				F81866_UART_CLK_MASK, clock_table[i]);
+		sio_write_mask_reg(pdata, reg, F81866_UART_CLK_MASK,
+				clock_table[i]);
 
 		fintek_8250_exit_key(pdata->base_port);
 		break;
@@ -331,6 +358,7 @@ static void fintek_8250_set_termios_handler(struct uart_8250_port *uart)
 	struct fintek_8250 *pdata = uart->port.private_data;
 
 	switch (pdata->pid) {
+	case CHIP_ID_F81216H:
 	case CHIP_ID_F81866:
 		uart->port.set_termios = fintek_8250_set_termios;
 		break;
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH V1 3/3] serial: 8250_fintek: fix warning reported from smatch
  2017-10-03  3:08 [PATCH V1 0/3] High baud rate supports of F81866/F81216H Ji-Ze Hong (Peter Hong)
  2017-10-03  3:08 ` [PATCH V1 1/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81866 Ji-Ze Hong (Peter Hong)
  2017-10-03  3:08 ` [PATCH V1 2/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81216H Ji-Ze Hong (Peter Hong)
@ 2017-10-03  3:08 ` Ji-Ze Hong (Peter Hong)
  2 siblings, 0 replies; 4+ messages in thread
From: Ji-Ze Hong (Peter Hong) @ 2017-10-03  3:08 UTC (permalink / raw)
  To: gregkh, jslaby
  Cc: rel+kernel, linux-serial, linux-kernel, peter_hong,
	Ji-Ze Hong (Peter Hong)

This patch is fix the warning reported by smatch as following:

drivers/tty/serial/8250/8250_fintek.c:294 fintek_8250_goto_highspeed()
warn: inconsistent indenting

Signed-off-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
---
 drivers/tty/serial/8250/8250_fintek.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
index f3b622f..96cc45f 100644
--- a/drivers/tty/serial/8250/8250_fintek.c
+++ b/drivers/tty/serial/8250/8250_fintek.c
@@ -290,7 +290,7 @@ static void fintek_8250_goto_highspeed(struct uart_8250_port *uart,
 			F81866_UART_CLK_MASK,
 			F81866_UART_CLK_14_769MHZ);
 
-			uart->port.uartclk = 921600 * 16;
+		uart->port.uartclk = 921600 * 16;
 		break;
 	default: /* leave clock speed untouched */
 		break;
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2017-10-03  3:10 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-10-03  3:08 [PATCH V1 0/3] High baud rate supports of F81866/F81216H Ji-Ze Hong (Peter Hong)
2017-10-03  3:08 ` [PATCH V1 1/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81866 Ji-Ze Hong (Peter Hong)
2017-10-03  3:08 ` [PATCH V1 2/3] serial: 8250_fintek: UART dynamic clocksource on Fintek F81216H Ji-Ze Hong (Peter Hong)
2017-10-03  3:08 ` [PATCH V1 3/3] serial: 8250_fintek: fix warning reported from smatch Ji-Ze Hong (Peter Hong)

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