* [PATCH v3 0/5] ARM: davinci: convert to common clock framework
@ 2017-12-09 2:15 David Lechner
2017-12-09 2:15 ` [PATCH v3 1/5] ARM: davinci: move davinci_clk_init() to init_time David Lechner
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: David Lechner, Sekhar Nori, Kevin Hilman, linux-kernel
This series takes the first steps towards moving mach-davinci to the common
clock framework.
Basically, this series does some cleanup and rearranging to get things
ready for the conversion. Then in "ARM: davinci: convert to common clock
framework" we actually make the conversion. This is done by just creating
a thin layer around the existing mach clock code.
There is certainly more to be done to make full use of the common clock
framework, but this seems like the smallest logical set of patches to get
CONFIG_COMMON_CLK switched on. Otherwise, I think we would end up with a
series of 20+ patches that would be harder to review.
I have tested this on LEGO MINDSTORMS EV3 (TI AM1808), so I am confident
that I haven't broken anything (too badly) in da850. But, I don't have
other hardware to test.
v3 changes:
* Remove leftovers from rebasing in "ARM: davinci: don't use static clk_lookup"
(fixes compile error)
v2 changes:
* Dropped "ARM: davinci: clean up map_io functions" - will resend as separate
patch series
* Reworked remaining patches so that there is less shuffling around
David Lechner (5):
ARM: davinci: move davinci_clk_init() to init_time
ARM: davinci: don't use static clk_lookup
ARM: davinci: make davinci_clk_reset() static
ARM: davinci: convert to common clock framework
ARM: davinci: remove clock debugfs
arch/arm/Kconfig | 2 +-
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 11 +-
arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 2 +-
arch/arm/mach-davinci/board-sffsdr.c | 2 +-
arch/arm/mach-davinci/clock.c | 299 +++++++++-------------------
arch/arm/mach-davinci/clock.h | 48 +++--
arch/arm/mach-davinci/da830.c | 215 ++++++++++----------
arch/arm/mach-davinci/da850.c | 290 ++++++++++++++-------------
arch/arm/mach-davinci/da8xx-dt.c | 2 +-
arch/arm/mach-davinci/davinci.h | 4 +
arch/arm/mach-davinci/devices-da8xx.c | 9 +-
arch/arm/mach-davinci/dm355.c | 182 ++++++++---------
arch/arm/mach-davinci/dm365.c | 240 +++++++++++-----------
arch/arm/mach-davinci/dm644x.c | 162 +++++++--------
arch/arm/mach-davinci/dm646x.c | 172 ++++++++--------
arch/arm/mach-davinci/include/mach/clock.h | 3 -
arch/arm/mach-davinci/include/mach/common.h | 1 -
arch/arm/mach-davinci/include/mach/da8xx.h | 3 +
arch/arm/mach-davinci/usb-da8xx.c | 57 +++---
27 files changed, 815 insertions(+), 905 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 1/5] ARM: davinci: move davinci_clk_init() to init_time
2017-12-09 2:15 [PATCH v3 0/5] ARM: davinci: convert to common clock framework David Lechner
@ 2017-12-09 2:15 ` David Lechner
2017-12-09 2:15 ` [PATCH v3 2/5] ARM: davinci: don't use static clk_lookup David Lechner
` (3 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: David Lechner, Sekhar Nori, Kevin Hilman, linux-kernel
This moves the call of davinci_clk_init() from map_io to init_time for all
boards.
This is the proper place to init clocks. This is also done in preparation
for moving to the common clock framework.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 11 +++++++----
arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 2 +-
arch/arm/mach-davinci/board-sffsdr.c | 2 +-
arch/arm/mach-davinci/da830.c | 4 ++++
arch/arm/mach-davinci/da850.c | 4 ++++
arch/arm/mach-davinci/da8xx-dt.c | 2 +-
arch/arm/mach-davinci/davinci.h | 4 ++++
arch/arm/mach-davinci/dm355.c | 5 +++++
arch/arm/mach-davinci/dm365.c | 5 +++++
arch/arm/mach-davinci/dm644x.c | 5 +++++
arch/arm/mach-davinci/dm646x.c | 5 +++++
arch/arm/mach-davinci/include/mach/da8xx.h | 3 +++
20 files changed, 53 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index f673cd7..2cc5426 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -638,7 +638,7 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
.atag_offset = 0x100,
.map_io = da830_evm_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da830_init_time,
.init_machine = da830_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index cbde003..458f26d 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1481,7 +1481,7 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
.atag_offset = 0x100,
.map_io = da850_evm_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = da850_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 62e7bc3..2b4d553 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -416,7 +416,7 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
.atag_offset = 0x100,
.map_io = dm355_evm_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm355_init_time,
.init_machine = dm355_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index be99724..69399d7 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -271,7 +271,7 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
.atag_offset = 0x100,
.map_io = dm355_leopard_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm355_init_time,
.init_machine = dm355_leopard_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index e75741f..e414cb9 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -774,7 +774,7 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.atag_offset = 0x100,
.map_io = dm365_evm_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm365_init_time,
.init_machine = dm365_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index b07c9b1..6b26786 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -817,7 +817,7 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
.atag_offset = 0x100,
.map_io = davinci_evm_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index cb0a41e..b3b81a8 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -721,9 +721,12 @@ static void __init evm_init_i2c(void)
static void __init davinci_map_io(void)
{
dm646x_init();
+}
- if (machine_is_davinci_dm6467tevm())
- davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
+static void __init dm6467t_evm_init_time(void)
+{
+ dm646x_init_time();
+ davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
}
#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
@@ -797,7 +800,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm646x_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
@@ -808,7 +811,7 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm6467t_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index b73ce7b..c930c31 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -570,7 +570,7 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
.atag_offset = 0x100,
.map_io = mityomapl138_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = mityomapl138_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 0c02aaa..925ada1 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -227,7 +227,7 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
.atag_offset = 0x100,
.map_io = davinci_ntosd2_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_ntosd2_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index a3e7807..c1277b3 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -334,7 +334,7 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
.atag_offset = 0x100,
.map_io = omapl138_hawk_map_io,
.init_irq = cp_intc_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = omapl138_hawk_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index d85accf..4038de8 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -150,7 +150,7 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
.atag_offset = 0x100,
.map_io = davinci_sffsdr_map_io,
.init_irq = davinci_irq_init,
- .init_time = davinci_timer_init,
+ .init_time = dm644x_init_time,
.init_machine = davinci_sffsdr_init,
.init_late = davinci_init_late,
.dma_zone_size = SZ_128M,
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index bd88470..4c95bac 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1220,6 +1220,10 @@ void __init da830_init(void)
da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
+}
+void __init da830_init_time(void)
+{
davinci_clk_init(davinci_soc_info_da830.cpu_clks);
+ davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 07d6f0e..14c0579 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1392,6 +1392,10 @@ void __init da850_init(void)
v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
v &= ~CFGCHIP3_PLL1_MASTER_LOCK;
__raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
+}
+void __init da850_init_time(void)
+{
davinci_clk_init(davinci_soc_info_da850.cpu_clks);
+ davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index f06db67..3630f0a 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -96,7 +96,7 @@ static const char *const da850_boards_compat[] __initconst = {
DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
.map_io = da850_init,
- .init_time = davinci_timer_init,
+ .init_time = da850_init_time,
.init_machine = da850_init_machine,
.dt_compat = da850_boards_compat,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index c62b90c..d70f4d9 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -83,6 +83,7 @@ int davinci_init_wdt(void);
/* DM355 function declarations */
void dm355_init(void);
+void dm355_init_time(void);
void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
void dm355_init_asp1(u32 evt_enable);
@@ -91,6 +92,7 @@ int dm355_gpio_register(void);
/* DM365 function declarations */
void dm365_init(void);
+void dm365_init_time(void);
void dm365_init_asp(void);
void dm365_init_vc(void);
void dm365_init_ks(struct davinci_ks_platform_data *pdata);
@@ -102,12 +104,14 @@ int dm365_gpio_register(void);
/* DM644x function declarations */
void dm644x_init(void);
+void dm644x_init_time(void);
void dm644x_init_asp(void);
int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
int dm644x_gpio_register(void);
/* DM646x function declarations */
void dm646x_init(void);
+void dm646x_init_time(void);
void dm646x_init_mcasp0(struct snd_platform_data *pdata);
void dm646x_init_mcasp1(struct snd_platform_data *pdata);
int dm646x_init_edma(struct edma_rsv_info *rsv);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index bd50367..67fc2d4 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -1043,7 +1043,12 @@ void __init dm355_init(void)
{
davinci_common_init(&davinci_soc_info_dm355);
davinci_map_sysmod();
+}
+
+void __init dm355_init_time(void)
+{
davinci_clk_init(davinci_soc_info_dm355.cpu_clks);
+ davinci_timer_init();
}
int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 8be04ec..99958e6 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1166,7 +1166,12 @@ void __init dm365_init(void)
{
davinci_common_init(&davinci_soc_info_dm365);
davinci_map_sysmod();
+}
+
+void __init dm365_init_time(void)
+{
davinci_clk_init(davinci_soc_info_dm365.cpu_clks);
+ davinci_timer_init();
}
static struct resource dm365_vpss_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index b437c37..903cfeb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -931,7 +931,12 @@ void __init dm644x_init(void)
{
davinci_common_init(&davinci_soc_info_dm644x);
davinci_map_sysmod();
+}
+
+void __init dm644x_init_time(void)
+{
davinci_clk_init(davinci_soc_info_dm644x.cpu_clks);
+ davinci_timer_init();
}
int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index da21353..6136d35 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -956,7 +956,12 @@ void __init dm646x_init(void)
{
davinci_common_init(&davinci_soc_info_dm646x);
davinci_map_sysmod();
+}
+
+void __init dm646x_init_time(void)
+{
davinci_clk_init(davinci_soc_info_dm646x.cpu_clks);
+ davinci_timer_init();
}
static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 93ff156..dd12e39 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -87,7 +87,10 @@ extern unsigned int da850_max_speed;
#define DA8XX_ARM_RAM_BASE 0xffff0000
void da830_init(void);
+void da830_init_time(void);
+
void da850_init(void);
+void da850_init_time(void);
int da830_register_edma(struct edma_rsv_info *rsv);
int da850_register_edma(struct edma_rsv_info *rsv[2]);
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 2/5] ARM: davinci: don't use static clk_lookup
2017-12-09 2:15 [PATCH v3 0/5] ARM: davinci: convert to common clock framework David Lechner
2017-12-09 2:15 ` [PATCH v3 1/5] ARM: davinci: move davinci_clk_init() to init_time David Lechner
@ 2017-12-09 2:15 ` David Lechner
2017-12-09 2:15 ` [PATCH v3 3/5] ARM: davinci: make davinci_clk_reset() static David Lechner
` (2 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: David Lechner, Sekhar Nori, Kevin Hilman, linux-kernel
In preparation of moving to the common clock framework, usage of static
struct clk_lookup is removed. The common clock framework uses an opaque
struct clk, so we won't be able to use static tables as was previously
done.
davinci_clk_init() is changed to init a single clock instead of a table.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/clock.c | 75 +++++++---------
arch/arm/mach-davinci/clock.h | 9 +-
arch/arm/mach-davinci/da830.c | 111 ++++++++++++-----------
arch/arm/mach-davinci/da850.c | 133 ++++++++++++++--------------
arch/arm/mach-davinci/devices-da8xx.c | 5 +-
arch/arm/mach-davinci/dm355.c | 93 ++++++++++---------
arch/arm/mach-davinci/dm365.c | 123 +++++++++++++------------
arch/arm/mach-davinci/dm644x.c | 85 +++++++++---------
arch/arm/mach-davinci/dm646x.c | 89 +++++++++----------
arch/arm/mach-davinci/include/mach/common.h | 1 -
arch/arm/mach-davinci/usb-da8xx.c | 15 +---
11 files changed, 351 insertions(+), 388 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index f77a4f7..5f0a31d 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -607,62 +607,51 @@ int davinci_set_refclk_rate(unsigned long rate)
return 0;
}
-int __init davinci_clk_init(struct clk_lookup *clocks)
+void __init davinci_clk_init(struct clk *clk, const char *con_id,
+ const char *dev_id)
{
- struct clk_lookup *c;
- struct clk *clk;
- size_t num_clocks = 0;
-
- for (c = clocks; c->clk; c++) {
- clk = c->clk;
+ if (!clk->recalc) {
- if (!clk->recalc) {
+ /* Check if clock is a PLL */
+ if (clk->pll_data)
+ clk->recalc = clk_pllclk_recalc;
- /* Check if clock is a PLL */
- if (clk->pll_data)
- clk->recalc = clk_pllclk_recalc;
+ /* Else, if it is a PLL-derived clock */
+ else if (clk->flags & CLK_PLL)
+ clk->recalc = clk_sysclk_recalc;
- /* Else, if it is a PLL-derived clock */
- else if (clk->flags & CLK_PLL)
- clk->recalc = clk_sysclk_recalc;
-
- /* Otherwise, it is a leaf clock (PSC clock) */
- else if (clk->parent)
- clk->recalc = clk_leafclk_recalc;
- }
+ /* Otherwise, it is a leaf clock (PSC clock) */
+ else if (clk->parent)
+ clk->recalc = clk_leafclk_recalc;
+ }
- if (clk->pll_data) {
- struct pll_data *pll = clk->pll_data;
+ if (clk->pll_data) {
+ struct pll_data *pll = clk->pll_data;
- if (!pll->div_ratio_mask)
- pll->div_ratio_mask = PLLDIV_RATIO_MASK;
+ if (!pll->div_ratio_mask)
+ pll->div_ratio_mask = PLLDIV_RATIO_MASK;
- if (pll->phys_base && !pll->base) {
- pll->base = ioremap(pll->phys_base, SZ_4K);
- WARN_ON(!pll->base);
- }
+ if (pll->phys_base && !pll->base) {
+ pll->base = ioremap(pll->phys_base, SZ_4K);
+ WARN_ON(!pll->base);
}
+ }
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
-
- if (clk->lpsc)
- clk->flags |= CLK_PSC;
-
- if (clk->flags & PSC_LRST)
- clk->reset = davinci_clk_reset;
+ if (clk->recalc)
+ clk->rate = clk->recalc(clk);
- clk_register(clk);
- num_clocks++;
+ if (clk->lpsc)
+ clk->flags |= CLK_PSC;
- /* Turn on clocks that Linux doesn't otherwise manage */
- if (clk->flags & ALWAYS_ENABLED)
- clk_enable(clk);
- }
+ if (clk->flags & PSC_LRST)
+ clk->reset = davinci_clk_reset;
- clkdev_add_table(clocks, num_clocks);
+ clk_register(clk);
+ clk_register_clkdev(clk, con_id, dev_id);
- return 0;
+ /* Turn on clocks that Linux doesn't otherwise manage */
+ if (clk->flags & ALWAYS_ENABLED)
+ clk_enable(clk);
}
#ifdef CONFIG_DEBUG_FS
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index fa2b837..e4afaa9 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -118,14 +118,7 @@ struct clk {
#define PSC_FORCE BIT(6) /* Force module state transtition */
#define PSC_LRST BIT(8) /* Use local reset on enable/disable */
-#define CLK(dev, con, ck) \
- { \
- .dev_id = dev, \
- .con_id = con, \
- .clk = ck, \
- } \
-
-int davinci_clk_init(struct clk_lookup *clocks);
+void davinci_clk_init(struct clk *clk, const char *con_id, const char *dev_id);
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 4c95bac..1a99d22 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -378,60 +378,60 @@ static struct clk rmii_clk = {
.parent = &pll0_sysclk7,
};
-static struct clk_lookup da830_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("davinci-wdt", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "scr0_ss", &scr0_ss_clk),
- CLK(NULL, "scr1_ss", &scr1_ss_clk),
- CLK(NULL, "scr2_ss", &scr2_ss_clk),
- CLK(NULL, "dmax", &dmax_clk),
- CLK(NULL, "tpcc", &tpcc_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK("da830-mmc.0", NULL, &mmcsd_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK(NULL, "ecap0", &ecap0_clk),
- CLK(NULL, "ecap1", &ecap1_clk),
- CLK(NULL, "ecap2", &ecap2_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK("eqep.0", NULL, &eqep0_clk),
- CLK("eqep.1", NULL, &eqep1_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK("davinci-mcasp.2", NULL, &mcasp2_clk),
- CLK("musb-da8xx", "usb20", &usb20_clk),
- CLK("cppi41-dmaengine", NULL, &cppi41_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "secu_mgr", &secu_mgr_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK("ohci-da8xx", "usb11", &usb11_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void da830_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll0_clk, "pll0", NULL);
+ davinci_clk_init(&pll0_aux_clk, "pll0_aux", NULL);
+ davinci_clk_init(&pll0_sysclk2, "pll0_sysclk2", NULL);
+ davinci_clk_init(&pll0_sysclk3, "pll0_sysclk3", NULL);
+ davinci_clk_init(&pll0_sysclk4, "pll0_sysclk4", NULL);
+ davinci_clk_init(&pll0_sysclk5, "pll0_sysclk5", NULL);
+ davinci_clk_init(&pll0_sysclk6, "pll0_sysclk6", NULL);
+ davinci_clk_init(&pll0_sysclk7, "pll0_sysclk7", NULL);
+ davinci_clk_init(&i2c0_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&timerp64_0_clk, "timer0", NULL);
+ davinci_clk_init(&timerp64_1_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&arm_rom_clk, "arm_rom", NULL);
+ davinci_clk_init(&scr0_ss_clk, "scr0_ss", NULL);
+ davinci_clk_init(&scr1_ss_clk, "scr1_ss", NULL);
+ davinci_clk_init(&scr2_ss_clk, "scr2_ss", NULL);
+ davinci_clk_init(&dmax_clk, "dmax", NULL);
+ davinci_clk_init(&tpcc_clk, "tpcc", NULL);
+ davinci_clk_init(&tptc0_clk, "tptc0", NULL);
+ davinci_clk_init(&tptc1_clk, "tptc1", NULL);
+ davinci_clk_init(&mmcsd_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&ecap0_clk, "ecap0", NULL);
+ davinci_clk_init(&ecap1_clk, "ecap1", NULL);
+ davinci_clk_init(&ecap2_clk, "ecap2", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&eqep0_clk, NULL, "eqep.0");
+ davinci_clk_init(&eqep1_clk, NULL, "eqep.1");
+ davinci_clk_init(&lcdc_clk, "fck", "da8xx_lcdc.0");
+ davinci_clk_init(&mcasp0_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcasp1_clk, NULL, "davinci-mcasp.1");
+ davinci_clk_init(&mcasp2_clk, NULL, "davinci-mcasp.2");
+ davinci_clk_init(&usb20_clk, "usb20", "musb-da8xx");
+ davinci_clk_init(&cppi41_clk, NULL, "cppi41-dmaengine");
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&aintc_clk, "aintc", NULL);
+ davinci_clk_init(&secu_mgr_clk, "secu_mgr", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&i2c1_clk, NULL, "i2c_davinci.2");
+ davinci_clk_init(&usb11_clk, "usb11", "ohci-da8xx");
+ davinci_clk_init(&emif3_clk, "emif3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&rmii_clk, "rmii", NULL);
+}
/*
* Device specific mux setup
@@ -1200,7 +1200,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da830_ids,
.ids_num = ARRAY_SIZE(da830_ids),
- .cpu_clks = da830_clks,
.psc_bases = da830_psc_bases,
.psc_bases_num = ARRAY_SIZE(da830_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
@@ -1224,6 +1223,6 @@ void __init da830_init(void)
void __init da830_init_time(void)
{
- davinci_clk_init(davinci_soc_info_da830.cpu_clks);
+ da830_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 14c0579..ab287d4 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -518,71 +518,71 @@ static struct clk ecap2_clk = {
.parent = &ecap_clk,
};
-static struct clk_lookup da850_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk1", &pll0_sysclk1),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "async3", &async3_clk),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("davinci-wdt", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "tpcc0", &tpcc0_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK(NULL, "tpcc1", &tpcc1_clk),
- CLK(NULL, "tptc2", &tptc2_clk),
- CLK("pruss_uio", "pruss", &pruss_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &mdio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp_clk),
- CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk),
- CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("da830-mmc.0", NULL, &mmcsd0_clk),
- CLK("da830-mmc.1", NULL, &mmcsd1_clk),
- CLK("ti-aemif", NULL, &aemif_clk),
- CLK("davinci-nand.0", "aemif", &aemif_nand_clk),
- CLK("ohci-da8xx", "usb11", &usb11_clk),
- CLK("musb-da8xx", "usb20", &usb20_clk),
- CLK("cppi41-dmaengine", NULL, &cppi41_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("vpif", NULL, &vpif_clk),
- CLK("ahci_da850", "fck", &sata_clk),
- CLK("davinci-rproc.0", NULL, &dsp_clk),
- CLK(NULL, NULL, &ehrpwm_clk),
- CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
- CLK("ehrpwm.1", "fck", &ehrpwm1_clk),
- CLK(NULL, NULL, &ehrpwm_tbclk),
- CLK("ehrpwm.0", "tbclk", &ehrpwm0_tbclk),
- CLK("ehrpwm.1", "tbclk", &ehrpwm1_tbclk),
- CLK(NULL, NULL, &ecap_clk),
- CLK("ecap.0", "fck", &ecap0_clk),
- CLK("ecap.1", "fck", &ecap1_clk),
- CLK("ecap.2", "fck", &ecap2_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void da850_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll0_clk, "pll0", NULL);
+ davinci_clk_init(&pll0_aux_clk, "pll0_aux", NULL);
+ davinci_clk_init(&pll0_sysclk1, "pll0_sysclk1", NULL);
+ davinci_clk_init(&pll0_sysclk2, "pll0_sysclk2", NULL);
+ davinci_clk_init(&pll0_sysclk3, "pll0_sysclk3", NULL);
+ davinci_clk_init(&pll0_sysclk4, "pll0_sysclk4", NULL);
+ davinci_clk_init(&pll0_sysclk5, "pll0_sysclk5", NULL);
+ davinci_clk_init(&pll0_sysclk6, "pll0_sysclk6", NULL);
+ davinci_clk_init(&pll0_sysclk7, "pll0_sysclk7", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&async3_clk, "async3", NULL);
+ davinci_clk_init(&i2c0_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&timerp64_0_clk, "timer0", NULL);
+ davinci_clk_init(&timerp64_1_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&arm_rom_clk, "arm_rom", NULL);
+ davinci_clk_init(&tpcc0_clk, "tpcc0", NULL);
+ davinci_clk_init(&tptc0_clk, "tptc0", NULL);
+ davinci_clk_init(&tptc1_clk, "tptc1", NULL);
+ davinci_clk_init(&tpcc1_clk, "tpcc1", NULL);
+ davinci_clk_init(&tptc2_clk, "tptc2", NULL);
+ davinci_clk_init(&pruss_clk, "pruss", "pruss_uio");
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&aintc_clk, "aintc", NULL);
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&i2c1_clk, NULL, "i2c_davinci.2");
+ davinci_clk_init(&emif3_clk, "emif3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&rmii_clk, "rmii", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&mdio_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&mcasp_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcbsp0_clk, NULL, "davinci-mcbsp.0");
+ davinci_clk_init(&mcbsp1_clk, NULL, "davinci-mcbsp.1");
+ davinci_clk_init(&lcdc_clk, "fck", "da8xx_lcdc.0");
+ davinci_clk_init(&mmcsd0_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "da830-mmc.1");
+ davinci_clk_init(&aemif_clk, NULL, "ti-aemif");
+ davinci_clk_init(&aemif_nand_clk, "aemif", "davinci-nand.0");
+ davinci_clk_init(&usb11_clk, "usb11", "ohci-da8xx");
+ davinci_clk_init(&usb20_clk, "usb20", "musb-da8xx");
+ davinci_clk_init(&cppi41_clk, NULL, "cppi41-dmaengine");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&vpif_clk, NULL, "vpif");
+ davinci_clk_init(&sata_clk, "fck", "ahci_da850");
+ davinci_clk_init(&dsp_clk, NULL, "davinci-rproc.0");
+ davinci_clk_init(&ehrpwm_clk, NULL, NULL);
+ davinci_clk_init(&ehrpwm0_clk, "fck", "ehrpwm.0");
+ davinci_clk_init(&ehrpwm1_clk, "fck", "ehrpwm.1");
+ davinci_clk_init(&ehrpwm_tbclk, NULL, NULL);
+ davinci_clk_init(&ehrpwm0_tbclk, "tbclk", "ehrpwm.0");
+ davinci_clk_init(&ehrpwm1_tbclk, "tbclk", "ehrpwm.1");
+ davinci_clk_init(&ecap_clk, NULL, NULL);
+ davinci_clk_init(&ecap0_clk, "fck", "ecap.0");
+ davinci_clk_init(&ecap1_clk, "fck", "ecap.1");
+ davinci_clk_init(&ecap2_clk, "fck", "ecap.2");
+}
/*
* Device specific mux setup
@@ -1353,7 +1353,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da850_ids,
.ids_num = ARRAY_SIZE(da850_ids),
- .cpu_clks = da850_clks,
.psc_bases = da850_psc_bases,
.psc_bases_num = ARRAY_SIZE(da850_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
@@ -1396,6 +1395,6 @@ void __init da850_init(void)
void __init da850_init_time(void)
{
- davinci_clk_init(davinci_soc_info_da850.cpu_clks);
+ da850_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 22440c0..cc497f4 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -1059,9 +1059,6 @@ static struct clk sata_refclk = {
.set_rate = davinci_simple_set_rate,
};
-static struct clk_lookup sata_refclk_lookup =
- CLK("ahci_da850", "refclk", &sata_refclk);
-
int __init da850_register_sata_refclk(int rate)
{
int ret;
@@ -1071,7 +1068,7 @@ int __init da850_register_sata_refclk(int rate)
if (ret)
return ret;
- clkdev_add(&sata_refclk_lookup);
+ clk_register_clkdev(&sata_refclk, "refclk", "ahci_da850");
return 0;
}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 67fc2d4..5d8a986 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -337,51 +337,51 @@ static struct clk usb_clk = {
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk_lookup dm355_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "clkout2", &clkout2_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "clkout3", &clkout3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("davinci-mcbsp.0", NULL, &asp0_clk),
- CLK("davinci-mcbsp.1", NULL, &asp1_clk),
- CLK("dm6441-mmc.0", NULL, &mmcsd0_clk),
- CLK("dm6441-mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm355_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk4", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&vpss_dac_clk, "vpss_dac", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&clkout1_clk, "clkout1", NULL);
+ davinci_clk_init(&clkout2_clk, "clkout2", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclkbp, "pll2_sysclkbp", NULL);
+ davinci_clk_init(&clkout3_clk, "clkout3", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&mjcp_clk, "mjcp", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&asp0_clk, NULL, "davinci-mcbsp.0");
+ davinci_clk_init(&asp1_clk, NULL, "davinci-mcbsp.1");
+ davinci_clk_init(&mmcsd0_clk, NULL, "dm6441-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "dm6441-mmc.1");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&spi2_clk, NULL, "spi_davinci.2");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&pwm3_clk, "pwm3", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&timer3_clk, "timer3", NULL);
+ davinci_clk_init(&rto_clk, "rto", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+}
/*----------------------------------------------------------------------*/
@@ -1012,7 +1012,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
.jtag_id_reg = 0x01c40028,
.ids = dm355_ids,
.ids_num = ARRAY_SIZE(dm355_ids),
- .cpu_clks = dm355_clks,
.psc_bases = dm355_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm355_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -1047,7 +1046,7 @@ void __init dm355_init(void)
void __init dm355_init_time(void)
{
- davinci_clk_init(davinci_soc_info_dm355.cpu_clks);
+ dm355_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 99958e6..74037a6 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -425,66 +425,66 @@ static struct clk mjcp_clk = {
.lpsc = DM365_LPSC_MJCP,
};
-static struct clk_lookup dm365_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "clkout0", &clkout0_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
- CLK(NULL, "pll1_sysclk8", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk9", &pll1_sysclk9),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_aux", &pll2_aux_clk),
- CLK(NULL, "clkout1", &clkout1_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
- CLK(NULL, "pll2_sysclk3", &pll2_sysclk3),
- CLK(NULL, "pll2_sysclk4", &pll2_sysclk4),
- CLK(NULL, "pll2_sysclk5", &pll2_sysclk5),
- CLK(NULL, "pll2_sysclk6", &pll2_sysclk6),
- CLK(NULL, "pll2_sysclk7", &pll2_sysclk7),
- CLK(NULL, "pll2_sysclk8", &pll2_sysclk8),
- CLK(NULL, "pll2_sysclk9", &pll2_sysclk9),
- CLK(NULL, "vpss_dac", &vpss_dac_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("da830-mmc.0", NULL, &mmcsd0_clk),
- CLK("da830-mmc.1", NULL, &mmcsd1_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("spi_davinci.2", NULL, &spi2_clk),
- CLK("spi_davinci.3", NULL, &spi3_clk),
- CLK("spi_davinci.4", NULL, &spi4_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "pwm3", &pwm3_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, "timer3", &timer3_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK("davinci_voicecodec", NULL, &voicecodec_clk),
- CLK("davinci-mcbsp", NULL, &asp0_clk),
- CLK(NULL, "rto", &rto_clk),
- CLK(NULL, "mjcp", &mjcp_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm365_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&clkout0_clk, "clkout0", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk4", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk5", NULL);
+ davinci_clk_init(&pll1_sysclk6, "pll1_sysclk6", NULL);
+ davinci_clk_init(&pll1_sysclk7, "pll1_sysclk7", NULL);
+ davinci_clk_init(&pll1_sysclk8, "pll1_sysclk8", NULL);
+ davinci_clk_init(&pll1_sysclk9, "pll1_sysclk9", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_aux_clk, "pll2_aux", NULL);
+ davinci_clk_init(&clkout1_clk, "clkout1", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclk2, "pll2_sysclk2", NULL);
+ davinci_clk_init(&pll2_sysclk3, "pll2_sysclk3", NULL);
+ davinci_clk_init(&pll2_sysclk4, "pll2_sysclk4", NULL);
+ davinci_clk_init(&pll2_sysclk5, "pll2_sysclk5", NULL);
+ davinci_clk_init(&pll2_sysclk6, "pll2_sysclk6", NULL);
+ davinci_clk_init(&pll2_sysclk7, "pll2_sysclk7", NULL);
+ davinci_clk_init(&pll2_sysclk8, "pll2_sysclk8", NULL);
+ davinci_clk_init(&pll2_sysclk9, "pll2_sysclk9", NULL);
+ davinci_clk_init(&vpss_dac_clk, "vpss_dac", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&mmcsd0_clk, NULL, "da830-mmc.0");
+ davinci_clk_init(&mmcsd1_clk, NULL, "da830-mmc.1");
+ davinci_clk_init(&spi0_clk, NULL, "spi_davinci.0");
+ davinci_clk_init(&spi1_clk, NULL, "spi_davinci.1");
+ davinci_clk_init(&spi2_clk, NULL, "spi_davinci.2");
+ davinci_clk_init(&spi3_clk, NULL, "spi_davinci.3");
+ davinci_clk_init(&spi4_clk, NULL, "spi_davinci.4");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&pwm3_clk, "pwm3", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&timer3_clk, "timer3", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&voicecodec_clk, NULL, "davinci_voicecodec");
+ davinci_clk_init(&asp0_clk, NULL, "davinci-mcbsp");
+ davinci_clk_init(&rto_clk, "rto", NULL);
+ davinci_clk_init(&mjcp_clk, "mjcp", NULL);
+}
/*----------------------------------------------------------------------*/
@@ -1114,7 +1114,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
.jtag_id_reg = 0x01c40028,
.ids = dm365_ids,
.ids_num = ARRAY_SIZE(dm365_ids),
- .cpu_clks = dm365_clks,
.psc_bases = dm365_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm365_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -1170,7 +1169,7 @@ void __init dm365_init(void)
void __init dm365_init_time(void)
{
- davinci_clk_init(davinci_soc_info_dm365.cpu_clks);
+ dm365_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 903cfeb..1b27849 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -285,47 +285,47 @@ static struct clk timer2_clk = {
.usecount = 1, /* REVISIT: why can't this be disabled? */
};
-static struct clk_lookup dm644x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
- CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "vicp", &vicp_clk),
- CLK("vpss", "master", &vpss_master_clk),
- CLK("vpss", "slave", &vpss_slave_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK("davinci-mcbsp", NULL, &asp_clk),
- CLK("dm6441-mmc.0", NULL, &mmcsd_clk),
- CLK(NULL, "spi", &spi_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK(NULL, "usb", &usb_clk),
- CLK(NULL, "vlynq", &vlynq_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "pwm2", &pwm2_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm644x_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk1", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk2", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk3", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk5", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclkbp", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&pll2_sysclk2, "pll2_sysclk2", NULL);
+ davinci_clk_init(&pll2_sysclkbp, "pll2_sysclkbp", NULL);
+ davinci_clk_init(&dsp_clk, "dsp", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&vicp_clk, "vicp", NULL);
+ davinci_clk_init(&vpss_master_clk, "master", "vpss");
+ davinci_clk_init(&vpss_slave_clk, "slave", "vpss");
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&ide_clk, NULL, "palm_bk3710");
+ davinci_clk_init(&asp_clk, NULL, "davinci-mcbsp");
+ davinci_clk_init(&mmcsd_clk, NULL, "dm6441-mmc.0");
+ davinci_clk_init(&spi_clk, "spi", NULL);
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&usb_clk, "usb", NULL);
+ davinci_clk_init(&vlynq_clk, "vlynq", NULL);
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&pwm2_clk, "pwm2", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+}
static struct emac_platform_data dm644x_emac_pdata = {
.ctrl_reg_offset = DM644X_EMAC_CNTRL_OFFSET,
@@ -905,7 +905,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
.jtag_id_reg = 0x01c40028,
.ids = dm644x_ids,
.ids_num = ARRAY_SIZE(dm644x_ids),
- .cpu_clks = dm644x_clks,
.psc_bases = dm644x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm644x_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -935,7 +934,7 @@ void __init dm644x_init(void)
void __init dm644x_init_time(void)
{
- davinci_clk_init(davinci_soc_info_dm644x.cpu_clks);
+ dm644x_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 6136d35..1ecca9b 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -320,49 +320,49 @@ static struct clk vpif1_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk_lookup dm646x_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "aux", &aux_clkin),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk1),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk3),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk4),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk5),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk6),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk8),
- CLK(NULL, "pll1_sysclk", &pll1_sysclk9),
- CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll2", &pll2_clk),
- CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
- CLK(NULL, "dsp", &dsp_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "edma_cc", &edma_cc_clk),
- CLK(NULL, "edma_tc0", &edma_tc0_clk),
- CLK(NULL, "edma_tc1", &edma_tc1_clk),
- CLK(NULL, "edma_tc2", &edma_tc2_clk),
- CLK(NULL, "edma_tc3", &edma_tc3_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK("i2c_davinci.1", NULL, &i2c_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
- CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
- CLK(NULL, "aemif", &aemif_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &emac_clk),
- CLK(NULL, "pwm0", &pwm0_clk),
- CLK(NULL, "pwm1", &pwm1_clk),
- CLK(NULL, "timer0", &timer0_clk),
- CLK(NULL, "timer1", &timer1_clk),
- CLK("davinci-wdt", NULL, &timer2_clk),
- CLK("palm_bk3710", NULL, &ide_clk),
- CLK(NULL, "vpif0", &vpif0_clk),
- CLK(NULL, "vpif1", &vpif1_clk),
- CLK(NULL, NULL, NULL),
-};
+static __init void dm646x_clk_init(void)
+{
+ davinci_clk_init(&ref_clk, "ref", NULL);
+ davinci_clk_init(&aux_clkin, "aux", NULL);
+ davinci_clk_init(&pll1_clk, "pll1", NULL);
+ davinci_clk_init(&pll1_sysclk1, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk2, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk3, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk4, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk5, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk6, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk8, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclk9, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_sysclkbp, "pll1_sysclk", NULL);
+ davinci_clk_init(&pll1_aux_clk, "pll1_aux", NULL);
+ davinci_clk_init(&pll2_clk, "pll2", NULL);
+ davinci_clk_init(&pll2_sysclk1, "pll2_sysclk1", NULL);
+ davinci_clk_init(&dsp_clk, "dsp", NULL);
+ davinci_clk_init(&arm_clk, "arm", NULL);
+ davinci_clk_init(&edma_cc_clk, "edma_cc", NULL);
+ davinci_clk_init(&edma_tc0_clk, "edma_tc0", NULL);
+ davinci_clk_init(&edma_tc1_clk, "edma_tc1", NULL);
+ davinci_clk_init(&edma_tc2_clk, "edma_tc2", NULL);
+ davinci_clk_init(&edma_tc3_clk, "edma_tc3", NULL);
+ davinci_clk_init(&uart0_clk, NULL, "serial8250.0");
+ davinci_clk_init(&uart1_clk, NULL, "serial8250.1");
+ davinci_clk_init(&uart2_clk, NULL, "serial8250.2");
+ davinci_clk_init(&i2c_clk, NULL, "i2c_davinci.1");
+ davinci_clk_init(&gpio_clk, "gpio", NULL);
+ davinci_clk_init(&mcasp0_clk, NULL, "davinci-mcasp.0");
+ davinci_clk_init(&mcasp1_clk, NULL, "davinci-mcasp.1");
+ davinci_clk_init(&aemif_clk, "aemif", NULL);
+ davinci_clk_init(&emac_clk, NULL, "davinci_emac.1");
+ davinci_clk_init(&emac_clk, "fck", "davinci_mdio.0");
+ davinci_clk_init(&pwm0_clk, "pwm0", NULL);
+ davinci_clk_init(&pwm1_clk, "pwm1", NULL);
+ davinci_clk_init(&timer0_clk, "timer0", NULL);
+ davinci_clk_init(&timer1_clk, "timer1", NULL);
+ davinci_clk_init(&timer2_clk, NULL, "davinci-wdt");
+ davinci_clk_init(&ide_clk, NULL, "palm_bk3710");
+ davinci_clk_init(&vpif0_clk, "vpif0", NULL);
+ davinci_clk_init(&vpif1_clk, "vpif1", NULL);
+}
static struct emac_platform_data dm646x_emac_pdata = {
.ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET,
@@ -888,7 +888,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
.jtag_id_reg = 0x01c40028,
.ids = dm646x_ids,
.ids_num = ARRAY_SIZE(dm646x_ids),
- .cpu_clks = dm646x_clks,
.psc_bases = dm646x_psc_bases,
.psc_bases_num = ARRAY_SIZE(dm646x_psc_bases),
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
@@ -960,7 +959,7 @@ void __init dm646x_init(void)
void __init dm646x_init_time(void)
{
- davinci_clk_init(davinci_soc_info_dm646x.cpu_clks);
+ dm646x_clk_init();
davinci_timer_init();
}
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 037aa66..9b85d5d 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -53,7 +53,6 @@ struct davinci_soc_info {
u32 jtag_id_reg;
struct davinci_id *ids;
unsigned long ids_num;
- struct clk_lookup *cpu_clks;
u32 *psc_bases;
unsigned long psc_bases_num;
u32 pinmux_base;
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index d480a02..a2e575e 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -133,9 +133,6 @@ static struct clk usb_refclkin = {
.set_rate = davinci_simple_set_rate,
};
-static struct clk_lookup usb_refclkin_lookup =
- CLK(NULL, "usb_refclkin", &usb_refclkin);
-
/**
* da8xx_register_usb_refclkin - register USB_REFCLKIN clock
*
@@ -154,7 +151,7 @@ int __init da8xx_register_usb_refclkin(int rate)
if (ret)
return ret;
- clkdev_add(&usb_refclkin_lookup);
+ clk_register_clkdev(&usb_refclkin, "usb_refclkin", NULL);
return 0;
}
@@ -262,9 +259,6 @@ static struct clk usb20_phy_clk = {
.set_parent = usb20_phy_clk_set_parent,
};
-static struct clk_lookup usb20_phy_clk_lookup =
- CLK("da8xx-usb-phy", "usb20_phy", &usb20_phy_clk);
-
/**
* da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock
*
@@ -291,7 +285,7 @@ int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
usb20_phy_clk.parent = parent;
ret = clk_register(&usb20_phy_clk);
if (!ret)
- clkdev_add(&usb20_phy_clk_lookup);
+ clk_register_clkdev(&usb20_phy_clk, "usb20_phy", "da8xx-usb-phy");
clk_put(parent);
@@ -324,9 +318,6 @@ static struct clk usb11_phy_clk = {
.set_parent = usb11_phy_clk_set_parent,
};
-static struct clk_lookup usb11_phy_clk_lookup =
- CLK("da8xx-usb-phy", "usb11_phy", &usb11_phy_clk);
-
/**
* da8xx_register_usb11_phy_clk - register USB1PHYCLKMUX clock
*
@@ -348,7 +339,7 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
usb11_phy_clk.parent = parent;
ret = clk_register(&usb11_phy_clk);
if (!ret)
- clkdev_add(&usb11_phy_clk_lookup);
+ clk_register_clkdev(&usb11_phy_clk, "usb11_phy", "da8xx-usb-phy");
clk_put(parent);
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 3/5] ARM: davinci: make davinci_clk_reset() static
2017-12-09 2:15 [PATCH v3 0/5] ARM: davinci: convert to common clock framework David Lechner
2017-12-09 2:15 ` [PATCH v3 1/5] ARM: davinci: move davinci_clk_init() to init_time David Lechner
2017-12-09 2:15 ` [PATCH v3 2/5] ARM: davinci: don't use static clk_lookup David Lechner
@ 2017-12-09 2:15 ` David Lechner
2017-12-09 2:15 ` [PATCH v3 4/5] ARM: davinci: convert to common clock framework David Lechner
2017-12-09 2:15 ` [PATCH v3 5/5] ARM: davinci: remove clock debugfs David Lechner
4 siblings, 0 replies; 11+ messages in thread
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: David Lechner, Sekhar Nori, Kevin Hilman, linux-kernel
This makes davinci_clk_reset() static. It is not used anywhere else.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/clock.c | 3 +--
arch/arm/mach-davinci/clock.h | 1 -
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 5f0a31d..c149b24 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -59,7 +59,7 @@ void davinci_clk_disable(struct clk *clk)
davinci_clk_disable(clk->parent);
}
-int davinci_clk_reset(struct clk *clk, bool reset)
+static int davinci_clk_reset(struct clk *clk, bool reset)
{
unsigned long flags;
@@ -73,7 +73,6 @@ int davinci_clk_reset(struct clk *clk, bool reset)
return 0;
}
-EXPORT_SYMBOL(davinci_clk_reset);
int davinci_clk_reset_assert(struct clk *clk)
{
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index e4afaa9..bf60cdf 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -124,7 +124,6 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
int davinci_set_refclk_rate(unsigned long rate);
int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
-int davinci_clk_reset(struct clk *clk, bool reset);
void davinci_clk_enable(struct clk *clk);
void davinci_clk_disable(struct clk *clk);
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 4/5] ARM: davinci: convert to common clock framework
2017-12-09 2:15 [PATCH v3 0/5] ARM: davinci: convert to common clock framework David Lechner
` (2 preceding siblings ...)
2017-12-09 2:15 ` [PATCH v3 3/5] ARM: davinci: make davinci_clk_reset() static David Lechner
@ 2017-12-09 2:15 ` David Lechner
2017-12-19 13:47 ` Sekhar Nori
2017-12-09 2:15 ` [PATCH v3 5/5] ARM: davinci: remove clock debugfs David Lechner
4 siblings, 1 reply; 11+ messages in thread
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: David Lechner, Sekhar Nori, Kevin Hilman, linux-kernel
This converts the clocks in mach-davinci to the common clock framework.
Most of the patch just involves renaming struct clk to struct davinci_clk.
There is also a struct clk_hw added to provide the bridge between the
existing clock implementation and the common clock framework.
The clk_get_parent and clk_set_parent callbacks are dropped because all
clocks currently (effectivly) have a single parent, in which case the
common clock framework does not want you to implement these functions
yourself.
clk_unregister() is dropped because it is not used anywhere in
mach-davinci.
EXPORT_SYMBOL() is removed from functions not used outside of mach-davinci.
Fixed checkpatch.pl warning about bare use of unsigned in dump_clock().
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-davinci/clock.c | 162 ++++++++++++-----------------
arch/arm/mach-davinci/clock.h | 40 ++++---
arch/arm/mach-davinci/da830.c | 100 +++++++++---------
arch/arm/mach-davinci/da850.c | 153 +++++++++++++--------------
arch/arm/mach-davinci/devices-da8xx.c | 6 +-
arch/arm/mach-davinci/dm355.c | 84 +++++++--------
arch/arm/mach-davinci/dm365.c | 112 ++++++++++----------
arch/arm/mach-davinci/dm644x.c | 72 ++++++-------
arch/arm/mach-davinci/dm646x.c | 78 +++++++-------
arch/arm/mach-davinci/include/mach/clock.h | 3 -
arch/arm/mach-davinci/usb-da8xx.c | 48 +++++----
12 files changed, 425 insertions(+), 435 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 51c8df5..3a12f9e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -604,7 +604,7 @@ config ARCH_S3C24XX
config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL
- select CLKDEV_LOOKUP
+ select COMMON_CLK
select CPU_ARM926T
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index c149b24..0e63d93 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -31,7 +31,7 @@ static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static DEFINE_SPINLOCK(clockfw_lock);
-void davinci_clk_enable(struct clk *clk)
+void davinci_clk_enable(struct davinci_clk *clk)
{
if (clk->parent)
davinci_clk_enable(clk->parent);
@@ -44,7 +44,7 @@ void davinci_clk_enable(struct clk *clk)
}
}
-void davinci_clk_disable(struct clk *clk)
+void davinci_clk_disable(struct davinci_clk *clk)
{
if (WARN_ON(clk->usecount == 0))
return;
@@ -59,7 +59,7 @@ void davinci_clk_disable(struct clk *clk)
davinci_clk_disable(clk->parent);
}
-static int davinci_clk_reset(struct clk *clk, bool reset)
+static int davinci_clk_reset(struct davinci_clk *clk, bool reset)
{
unsigned long flags;
@@ -76,24 +76,29 @@ static int davinci_clk_reset(struct clk *clk, bool reset)
int davinci_clk_reset_assert(struct clk *clk)
{
- if (clk == NULL || IS_ERR(clk) || !clk->reset)
+ struct davinci_clk *dclk = to_davinci_clk(__clk_get_hw(clk));
+
+ if (IS_ERR_OR_NULL(dclk) || !dclk->reset)
return -EINVAL;
- return clk->reset(clk, true);
+ return dclk->reset(dclk, true);
}
EXPORT_SYMBOL(davinci_clk_reset_assert);
int davinci_clk_reset_deassert(struct clk *clk)
{
- if (clk == NULL || IS_ERR(clk) || !clk->reset)
+ struct davinci_clk *dclk = to_davinci_clk(__clk_get_hw(clk));
+
+ if (IS_ERR_OR_NULL(dclk) || !dclk->reset)
return -EINVAL;
- return clk->reset(clk, false);
+ return dclk->reset(dclk, false);
}
EXPORT_SYMBOL(davinci_clk_reset_deassert);
-int clk_enable(struct clk *clk)
+static int _clk_enable(struct clk_hw *hw)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
if (!clk)
@@ -107,10 +112,10 @@ int clk_enable(struct clk *clk)
return 0;
}
-EXPORT_SYMBOL(clk_enable);
-void clk_disable(struct clk *clk)
+static void _clk_disable(struct clk_hw *hw)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
if (clk == NULL || IS_ERR(clk))
@@ -120,19 +125,26 @@ void clk_disable(struct clk *clk)
davinci_clk_disable(clk);
spin_unlock_irqrestore(&clockfw_lock, flags);
}
-EXPORT_SYMBOL(clk_disable);
-unsigned long clk_get_rate(struct clk *clk)
+static unsigned long _clk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
+
if (clk == NULL || IS_ERR(clk))
return 0;
+ if (clk->recalc)
+ return clk->recalc(clk);
+
return clk->rate;
}
-EXPORT_SYMBOL(clk_get_rate);
-long clk_round_rate(struct clk *clk, unsigned long rate)
+static long _clk_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
+
if (clk == NULL || IS_ERR(clk))
return 0;
@@ -141,12 +153,11 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
return clk->rate;
}
-EXPORT_SYMBOL(clk_round_rate);
/* Propagate rate to children */
-static void propagate_rate(struct clk *root)
+static void propagate_rate(struct davinci_clk *root)
{
- struct clk *clk;
+ struct davinci_clk *clk;
list_for_each_entry(clk, &root->children, childnode) {
if (clk->recalc)
@@ -155,8 +166,10 @@ static void propagate_rate(struct clk *root)
}
}
-int clk_set_rate(struct clk *clk, unsigned long rate)
+static int _clk_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
int ret = -EINVAL;
@@ -178,56 +191,20 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
return ret;
}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
- unsigned long flags;
-
- if (!clk)
- return 0;
- else if (IS_ERR(clk))
- return -EINVAL;
-
- /* Cannot change parent on enabled clock */
- if (WARN_ON(clk->usecount))
- return -EINVAL;
-
- mutex_lock(&clocks_mutex);
- if (clk->set_parent) {
- int ret = clk->set_parent(clk, parent);
-
- if (ret) {
- mutex_unlock(&clocks_mutex);
- return ret;
- }
- }
- clk->parent = parent;
- list_del_init(&clk->childnode);
- list_add(&clk->childnode, &clk->parent->children);
- mutex_unlock(&clocks_mutex);
-
- spin_lock_irqsave(&clockfw_lock, flags);
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
- propagate_rate(clk);
- spin_unlock_irqrestore(&clockfw_lock, flags);
- return 0;
-}
-EXPORT_SYMBOL(clk_set_parent);
+static const struct clk_ops davinci_clk_ops = {
+ .enable = _clk_enable,
+ .disable = _clk_disable,
+ .recalc_rate = _clk_recalc_rate,
+ .round_rate = _clk_round_rate,
+ .set_rate = _clk_set_rate,
+};
-struct clk *clk_get_parent(struct clk *clk)
+int davinci_clk_register(struct davinci_clk *clk)
{
- if (!clk)
- return NULL;
-
- return clk->parent;
-}
-EXPORT_SYMBOL(clk_get_parent);
+ struct clk_init_data init = {};
+ int ret;
-int clk_register(struct clk *clk)
-{
if (clk == NULL || IS_ERR(clk))
return -EINVAL;
@@ -242,7 +219,7 @@ int clk_register(struct clk *clk)
list_add_tail(&clk->node, &clocks);
if (clk->parent) {
if (clk->set_parent) {
- int ret = clk->set_parent(clk, clk->parent);
+ ret = clk->set_parent(clk, clk->parent);
if (ret) {
mutex_unlock(&clocks_mutex);
@@ -253,6 +230,18 @@ int clk_register(struct clk *clk)
}
mutex_unlock(&clocks_mutex);
+ init.name = clk->name;
+ init.ops = &davinci_clk_ops;
+ if (clk->parent) {
+ init.parent_names = &clk->parent->name;
+ init.num_parents = 1;
+ }
+ clk->hw.init = &init;
+
+ ret = clk_hw_register(NULL, &clk->hw);
+ if (WARN(ret, "Failed to register clock '%s'\n", clk->name))
+ return ret;
+
/* If rate is already set, use it */
if (clk->rate)
return 0;
@@ -267,19 +256,6 @@ int clk_register(struct clk *clk)
return 0;
}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
- if (clk == NULL || IS_ERR(clk))
- return;
-
- mutex_lock(&clocks_mutex);
- list_del(&clk->node);
- list_del(&clk->childnode);
- mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
#ifdef CONFIG_DAVINCI_RESET_CLOCKS
/*
@@ -287,7 +263,7 @@ EXPORT_SYMBOL(clk_unregister);
*/
int __init davinci_clk_disable_unused(void)
{
- struct clk *ck;
+ struct davinci_clk *ck;
spin_lock_irq(&clockfw_lock);
list_for_each_entry(ck, &clocks, node) {
@@ -311,7 +287,7 @@ int __init davinci_clk_disable_unused(void)
}
#endif
-static unsigned long clk_sysclk_recalc(struct clk *clk)
+static unsigned long clk_sysclk_recalc(struct davinci_clk *clk)
{
u32 v, plldiv;
struct pll_data *pll;
@@ -349,7 +325,7 @@ static unsigned long clk_sysclk_recalc(struct clk *clk)
return rate;
}
-int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
+int davinci_set_sysclk_rate(struct davinci_clk *clk, unsigned long rate)
{
unsigned v;
struct pll_data *pll;
@@ -420,9 +396,8 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
return 0;
}
-EXPORT_SYMBOL(davinci_set_sysclk_rate);
-static unsigned long clk_leafclk_recalc(struct clk *clk)
+static unsigned long clk_leafclk_recalc(struct davinci_clk *clk)
{
if (WARN_ON(!clk->parent))
return clk->rate;
@@ -430,13 +405,13 @@ static unsigned long clk_leafclk_recalc(struct clk *clk)
return clk->parent->rate;
}
-int davinci_simple_set_rate(struct clk *clk, unsigned long rate)
+int davinci_simple_set_rate(struct davinci_clk *clk, unsigned long rate)
{
clk->rate = rate;
return 0;
}
-static unsigned long clk_pllclk_recalc(struct clk *clk)
+static unsigned long clk_pllclk_recalc(struct davinci_clk *clk)
{
u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
u8 bypass;
@@ -572,7 +547,6 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
return 0;
}
-EXPORT_SYMBOL(davinci_set_pllrate);
/**
* davinci_set_refclk_rate() - Set the reference clock rate
@@ -606,7 +580,7 @@ int davinci_set_refclk_rate(unsigned long rate)
return 0;
}
-void __init davinci_clk_init(struct clk *clk, const char *con_id,
+void __init davinci_clk_init(struct davinci_clk *clk, const char *con_id,
const char *dev_id)
{
if (!clk->recalc) {
@@ -645,12 +619,12 @@ void __init davinci_clk_init(struct clk *clk, const char *con_id,
if (clk->flags & PSC_LRST)
clk->reset = davinci_clk_reset;
- clk_register(clk);
- clk_register_clkdev(clk, con_id, dev_id);
+ davinci_clk_register(clk);
+ clk_register_clkdev(clk->hw.clk, con_id, dev_id);
/* Turn on clocks that Linux doesn't otherwise manage */
if (clk->flags & ALWAYS_ENABLED)
- clk_enable(clk);
+ clk_prepare_enable(clk->hw.clk);
}
#ifdef CONFIG_DEBUG_FS
@@ -663,11 +637,11 @@ void __init davinci_clk_init(struct clk *clk, const char *con_id,
#define NEST_MAX 4
static void
-dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
+dump_clock(struct seq_file *s, unsigned int nest, struct davinci_clk *parent)
{
char *state;
char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
- struct clk *clk;
+ struct davinci_clk *clk;
unsigned i;
if (parent->flags & CLK_PLL)
@@ -685,7 +659,7 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
min(i, (unsigned)(sizeof(buf) - 1 - nest)));
seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
- buf, parent->usecount, state, clk_get_rate(parent));
+ buf, parent->usecount, state, parent->rate);
/* REVISIT show device associations too */
/* cost is now small, but not linear... */
@@ -696,7 +670,7 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
static int davinci_ck_show(struct seq_file *m, void *v)
{
- struct clk *clk;
+ struct davinci_clk *clk;
/*
* Show clock tree; We trust nonzero usecounts equate to PSC enables...
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index bf60cdf..aea4f14 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -68,6 +68,7 @@
#ifndef __ASSEMBLER__
#include <linux/list.h>
+#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#define PLLSTAT_GOSTAT BIT(0)
@@ -84,7 +85,8 @@ struct pll_data {
#define PLL_HAS_PREDIV 0x01
#define PLL_HAS_POSTDIV 0x02
-struct clk {
+struct davinci_clk {
+ struct clk_hw hw;
struct list_head node;
struct module *owner;
const char *name;
@@ -95,18 +97,18 @@ struct clk {
u8 gpsc;
u8 domain;
u32 flags;
- struct clk *parent;
+ struct davinci_clk *parent;
struct list_head children; /* list of children */
struct list_head childnode; /* parent's child list node */
struct pll_data *pll_data;
u32 div_reg;
- unsigned long (*recalc) (struct clk *);
- int (*set_rate) (struct clk *clk, unsigned long rate);
- int (*round_rate) (struct clk *clk, unsigned long rate);
- int (*reset) (struct clk *clk, bool reset);
- void (*clk_enable) (struct clk *clk);
- void (*clk_disable) (struct clk *clk);
- int (*set_parent) (struct clk *clk, struct clk *parent);
+ unsigned long (*recalc)(struct davinci_clk *clk);
+ int (*set_rate)(struct davinci_clk *clk, unsigned long rate);
+ int (*round_rate)(struct davinci_clk *clk, unsigned long rate);
+ int (*reset)(struct davinci_clk *clk, bool reset);
+ void (*clk_enable)(struct davinci_clk *clk);
+ void (*clk_disable)(struct davinci_clk *clk);
+ int (*set_parent)(struct davinci_clk *clk, struct davinci_clk *parent);
};
/* Clock flags: SoC-specific flags start at BIT(16) */
@@ -118,18 +120,28 @@ struct clk {
#define PSC_FORCE BIT(6) /* Force module state transtition */
#define PSC_LRST BIT(8) /* Use local reset on enable/disable */
-void davinci_clk_init(struct clk *clk, const char *con_id, const char *dev_id);
+void davinci_clk_init(struct davinci_clk *clk, const char *con_id,
+ const char *dev_id);
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
-int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
+int davinci_set_sysclk_rate(struct davinci_clk *clk, unsigned long rate);
int davinci_set_refclk_rate(unsigned long rate);
-int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
-void davinci_clk_enable(struct clk *clk);
-void davinci_clk_disable(struct clk *clk);
+int davinci_simple_set_rate(struct davinci_clk *clk, unsigned long rate);
+void davinci_clk_enable(struct davinci_clk *clk);
+void davinci_clk_disable(struct davinci_clk *clk);
+int davinci_clk_register(struct davinci_clk *clk);
extern struct platform_device davinci_wdt_device;
extern void davinci_watchdog_reset(struct platform_device *);
+static inline struct davinci_clk *to_davinci_clk(struct clk_hw *hw)
+{
+ if (IS_ERR_OR_NULL(hw))
+ return (struct davinci_clk *)hw;
+
+ return container_of(hw, struct davinci_clk, hw);
+}
+
#endif
#endif
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 1a99d22..7f276a5 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -43,322 +43,322 @@ static struct pll_data pll0_data = {
.flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DA830_REF_FREQ,
};
-static struct clk pll0_clk = {
+static struct davinci_clk pll0_clk = {
.name = "pll0",
.parent = &ref_clk,
.pll_data = &pll0_data,
.flags = CLK_PLL,
};
-static struct clk pll0_aux_clk = {
+static struct davinci_clk pll0_aux_clk = {
.name = "pll0_aux_clk",
.parent = &pll0_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll0_sysclk2 = {
+static struct davinci_clk pll0_sysclk2 = {
.name = "pll0_sysclk2",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll0_sysclk3 = {
+static struct davinci_clk pll0_sysclk3 = {
.name = "pll0_sysclk3",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll0_sysclk4 = {
+static struct davinci_clk pll0_sysclk4 = {
.name = "pll0_sysclk4",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll0_sysclk5 = {
+static struct davinci_clk pll0_sysclk5 = {
.name = "pll0_sysclk5",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll0_sysclk6 = {
+static struct davinci_clk pll0_sysclk6 = {
.name = "pll0_sysclk6",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll0_sysclk7 = {
+static struct davinci_clk pll0_sysclk7 = {
.name = "pll0_sysclk7",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk i2c0_clk = {
+static struct davinci_clk i2c0_clk = {
.name = "i2c0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_0_clk = {
+static struct davinci_clk timerp64_0_clk = {
.name = "timer0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_1_clk = {
+static struct davinci_clk timerp64_1_clk = {
.name = "timer1",
.parent = &pll0_aux_clk,
};
-static struct clk arm_rom_clk = {
+static struct davinci_clk arm_rom_clk = {
.name = "arm_rom",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr0_ss_clk = {
+static struct davinci_clk scr0_ss_clk = {
.name = "scr0_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR0_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr1_ss_clk = {
+static struct davinci_clk scr1_ss_clk = {
.name = "scr1_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR1_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr2_ss_clk = {
+static struct davinci_clk scr2_ss_clk = {
.name = "scr2_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR2_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk dmax_clk = {
+static struct davinci_clk dmax_clk = {
.name = "dmax",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_PRUSS,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc_clk = {
+static struct davinci_clk tpcc_clk = {
.name = "tpcc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPCC,
.flags = ALWAYS_ENABLED | CLK_PSC,
};
-static struct clk tptc0_clk = {
+static struct davinci_clk tptc0_clk = {
.name = "tptc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk tptc1_clk = {
+static struct davinci_clk tptc1_clk = {
.name = "tptc1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk mmcsd_clk = {
+static struct davinci_clk mmcsd_clk = {
.name = "mmcsd",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_MMC_SD,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_UART1,
.gpsc = 1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_UART2,
.gpsc = 1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SPI0,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_SPI1,
.gpsc = 1,
};
-static struct clk ecap0_clk = {
+static struct davinci_clk ecap0_clk = {
.name = "ecap0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap1_clk = {
+static struct davinci_clk ecap1_clk = {
.name = "ecap1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap2_clk = {
+static struct davinci_clk ecap2_clk = {
.name = "ecap2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk eqep0_clk = {
+static struct davinci_clk eqep0_clk = {
.name = "eqep0",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_EQEP,
.gpsc = 1,
};
-static struct clk eqep1_clk = {
+static struct davinci_clk eqep1_clk = {
.name = "eqep1",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_EQEP,
.gpsc = 1,
};
-static struct clk lcdc_clk = {
+static struct davinci_clk lcdc_clk = {
.name = "lcdc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_LCDC,
.gpsc = 1,
};
-static struct clk mcasp0_clk = {
+static struct davinci_clk mcasp0_clk = {
.name = "mcasp0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_McASP0,
.gpsc = 1,
};
-static struct clk mcasp1_clk = {
+static struct davinci_clk mcasp1_clk = {
.name = "mcasp1",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_McASP1,
.gpsc = 1,
};
-static struct clk mcasp2_clk = {
+static struct davinci_clk mcasp2_clk = {
.name = "mcasp2",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_McASP2,
.gpsc = 1,
};
-static struct clk usb20_clk = {
+static struct davinci_clk usb20_clk = {
.name = "usb20",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_USB20,
.gpsc = 1,
};
-static struct clk cppi41_clk = {
+static struct davinci_clk cppi41_clk = {
.name = "cppi41",
.parent = &usb20_clk,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll0_sysclk3,
.lpsc = DA8XX_LPSC0_EMIF25,
.flags = ALWAYS_ENABLED,
};
-static struct clk aintc_clk = {
+static struct davinci_clk aintc_clk = {
.name = "aintc",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_AINTC,
.flags = ALWAYS_ENABLED,
};
-static struct clk secu_mgr_clk = {
+static struct davinci_clk secu_mgr_clk = {
.name = "secu_mgr",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_SECU_MGR,
.flags = ALWAYS_ENABLED,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_CPGMAC,
.gpsc = 1,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_GPIO,
.gpsc = 1,
};
-static struct clk i2c1_clk = {
+static struct davinci_clk i2c1_clk = {
.name = "i2c1",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_I2C,
.gpsc = 1,
};
-static struct clk usb11_clk = {
+static struct davinci_clk usb11_clk = {
.name = "usb11",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_USB11,
.gpsc = 1,
};
-static struct clk emif3_clk = {
+static struct davinci_clk emif3_clk = {
.name = "emif3",
.parent = &pll0_sysclk5,
.lpsc = DA8XX_LPSC1_EMIF3C,
@@ -366,14 +366,14 @@ static struct clk emif3_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll0_sysclk6,
.lpsc = DA8XX_LPSC0_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk rmii_clk = {
+static struct davinci_clk rmii_clk = {
.name = "rmii",
.parent = &pll0_sysclk7,
};
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index ab287d4..8a29aef 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -44,9 +44,9 @@
#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5)
#define CFGCHIP0_PLL_MASTER_LOCK BIT(4)
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long rate);
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate);
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long armrate);
static struct pll_data pll0_data = {
.num = 1,
@@ -54,13 +54,13 @@ static struct pll_data pll0_data = {
.flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DA850_REF_FREQ,
.set_rate = davinci_simple_set_rate,
};
-static struct clk pll0_clk = {
+static struct davinci_clk pll0_clk = {
.name = "pll0",
.parent = &ref_clk,
.pll_data = &pll0_data,
@@ -68,27 +68,27 @@ static struct clk pll0_clk = {
.set_rate = da850_set_pll0rate,
};
-static struct clk pll0_aux_clk = {
+static struct davinci_clk pll0_aux_clk = {
.name = "pll0_aux_clk",
.parent = &pll0_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll0_sysclk1 = {
+static struct davinci_clk pll0_sysclk1 = {
.name = "pll0_sysclk1",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll0_sysclk2 = {
+static struct davinci_clk pll0_sysclk2 = {
.name = "pll0_sysclk2",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll0_sysclk3 = {
+static struct davinci_clk pll0_sysclk3 = {
.name = "pll0_sysclk3",
.parent = &pll0_clk,
.flags = CLK_PLL,
@@ -97,28 +97,28 @@ static struct clk pll0_sysclk3 = {
.maxrate = 100000000,
};
-static struct clk pll0_sysclk4 = {
+static struct davinci_clk pll0_sysclk4 = {
.name = "pll0_sysclk4",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll0_sysclk5 = {
+static struct davinci_clk pll0_sysclk5 = {
.name = "pll0_sysclk5",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll0_sysclk6 = {
+static struct davinci_clk pll0_sysclk6 = {
.name = "pll0_sysclk6",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll0_sysclk7 = {
+static struct davinci_clk pll0_sysclk7 = {
.name = "pll0_sysclk7",
.parent = &pll0_clk,
.flags = CLK_PLL,
@@ -131,34 +131,35 @@ static struct pll_data pll1_data = {
.flags = PLL_HAS_POSTDIV,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static int da850_async3_set_parent(struct clk *clk, struct clk *parent)
+static int da850_async3_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -178,56 +179,56 @@ static int da850_async3_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk async3_clk = {
+static struct davinci_clk async3_clk = {
.name = "async3",
.parent = &pll1_sysclk2,
.set_parent = da850_async3_set_parent,
};
-static struct clk i2c0_clk = {
+static struct davinci_clk i2c0_clk = {
.name = "i2c0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_0_clk = {
+static struct davinci_clk timerp64_0_clk = {
.name = "timer0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_1_clk = {
+static struct davinci_clk timerp64_1_clk = {
.name = "timer1",
.parent = &pll0_aux_clk,
};
-static struct clk arm_rom_clk = {
+static struct davinci_clk arm_rom_clk = {
.name = "arm_rom",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc0_clk = {
+static struct davinci_clk tpcc0_clk = {
.name = "tpcc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPCC,
.flags = ALWAYS_ENABLED | CLK_PSC,
};
-static struct clk tptc0_clk = {
+static struct davinci_clk tptc0_clk = {
.name = "tptc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk tptc1_clk = {
+static struct davinci_clk tptc1_clk = {
.name = "tptc1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc1_clk = {
+static struct davinci_clk tpcc1_clk = {
.name = "tpcc1",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_TPCC1,
@@ -235,7 +236,7 @@ static struct clk tpcc1_clk = {
.flags = CLK_PSC | ALWAYS_ENABLED,
};
-static struct clk tptc2_clk = {
+static struct davinci_clk tptc2_clk = {
.name = "tptc2",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_TPTC2,
@@ -243,54 +244,54 @@ static struct clk tptc2_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk pruss_clk = {
+static struct davinci_clk pruss_clk = {
.name = "pruss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_PRUSS,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_UART1,
.gpsc = 1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_UART2,
.gpsc = 1,
};
-static struct clk aintc_clk = {
+static struct davinci_clk aintc_clk = {
.name = "aintc",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_AINTC,
.flags = ALWAYS_ENABLED,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_GPIO,
.gpsc = 1,
};
-static struct clk i2c1_clk = {
+static struct davinci_clk i2c1_clk = {
.name = "i2c1",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_I2C,
.gpsc = 1,
};
-static struct clk emif3_clk = {
+static struct davinci_clk emif3_clk = {
.name = "emif3",
.parent = &pll0_sysclk5,
.lpsc = DA8XX_LPSC1_EMIF3C,
@@ -298,7 +299,7 @@ static struct clk emif3_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll0_sysclk6,
.lpsc = DA8XX_LPSC0_ARM,
@@ -307,12 +308,12 @@ static struct clk arm_clk = {
.round_rate = da850_round_armrate,
};
-static struct clk rmii_clk = {
+static struct davinci_clk rmii_clk = {
.name = "rmii",
.parent = &pll0_sysclk7,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_CPGMAC,
@@ -324,53 +325,53 @@ static struct clk emac_clk = {
* screwing up the linked list in the process) create a separate clock for
* mdio inheriting the rate from emac_clk.
*/
-static struct clk mdio_clk = {
+static struct davinci_clk mdio_clk = {
.name = "mdio",
.parent = &emac_clk,
};
-static struct clk mcasp_clk = {
+static struct davinci_clk mcasp_clk = {
.name = "mcasp",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_McASP0,
.gpsc = 1,
};
-static struct clk mcbsp0_clk = {
+static struct davinci_clk mcbsp0_clk = {
.name = "mcbsp0",
.parent = &async3_clk,
.lpsc = DA850_LPSC1_McBSP0,
.gpsc = 1,
};
-static struct clk mcbsp1_clk = {
+static struct davinci_clk mcbsp1_clk = {
.name = "mcbsp1",
.parent = &async3_clk,
.lpsc = DA850_LPSC1_McBSP1,
.gpsc = 1,
};
-static struct clk lcdc_clk = {
+static struct davinci_clk lcdc_clk = {
.name = "lcdc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_LCDC,
.gpsc = 1,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_MMC_SD1,
.gpsc = 1,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll0_sysclk3,
.lpsc = DA8XX_LPSC0_EMIF25,
@@ -382,51 +383,51 @@ static struct clk aemif_clk = {
* screwing up the linked list in the process) create a separate clock for
* nand inheriting the rate from aemif_clk.
*/
-static struct clk aemif_nand_clk = {
+static struct davinci_clk aemif_nand_clk = {
.name = "nand",
.parent = &aemif_clk,
};
-static struct clk usb11_clk = {
+static struct davinci_clk usb11_clk = {
.name = "usb11",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_USB11,
.gpsc = 1,
};
-static struct clk usb20_clk = {
+static struct davinci_clk usb20_clk = {
.name = "usb20",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_USB20,
.gpsc = 1,
};
-static struct clk cppi41_clk = {
+static struct davinci_clk cppi41_clk = {
.name = "cppi41",
.parent = &usb20_clk,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SPI0,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_SPI1,
.gpsc = 1,
};
-static struct clk vpif_clk = {
+static struct davinci_clk vpif_clk = {
.name = "vpif",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_VPIF,
.gpsc = 1,
};
-static struct clk sata_clk = {
+static struct davinci_clk sata_clk = {
.name = "sata",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_SATA,
@@ -434,7 +435,7 @@ static struct clk sata_clk = {
.flags = PSC_FORCE,
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll0_sysclk1,
.domain = DAVINCI_GPSC_DSPDOMAIN,
@@ -442,26 +443,26 @@ static struct clk dsp_clk = {
.flags = PSC_LRST | PSC_FORCE,
};
-static struct clk ehrpwm_clk = {
+static struct davinci_clk ehrpwm_clk = {
.name = "ehrpwm",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk ehrpwm0_clk = {
+static struct davinci_clk ehrpwm0_clk = {
.name = "ehrpwm0",
.parent = &ehrpwm_clk,
};
-static struct clk ehrpwm1_clk = {
+static struct davinci_clk ehrpwm1_clk = {
.name = "ehrpwm1",
.parent = &ehrpwm_clk,
};
#define DA8XX_EHRPWM_TBCLKSYNC BIT(12)
-static void ehrpwm_tblck_enable(struct clk *clk)
+static void ehrpwm_tblck_enable(struct davinci_clk *clk)
{
u32 val;
@@ -470,7 +471,7 @@ static void ehrpwm_tblck_enable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
-static void ehrpwm_tblck_disable(struct clk *clk)
+static void ehrpwm_tblck_disable(struct davinci_clk *clk)
{
u32 val;
@@ -479,41 +480,41 @@ static void ehrpwm_tblck_disable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
-static struct clk ehrpwm_tbclk = {
+static struct davinci_clk ehrpwm_tbclk = {
.name = "ehrpwm_tbclk",
.parent = &ehrpwm_clk,
.clk_enable = ehrpwm_tblck_enable,
.clk_disable = ehrpwm_tblck_disable,
};
-static struct clk ehrpwm0_tbclk = {
+static struct davinci_clk ehrpwm0_tbclk = {
.name = "ehrpwm0_tbclk",
.parent = &ehrpwm_tbclk,
};
-static struct clk ehrpwm1_tbclk = {
+static struct davinci_clk ehrpwm1_tbclk = {
.name = "ehrpwm1_tbclk",
.parent = &ehrpwm_tbclk,
};
-static struct clk ecap_clk = {
+static struct davinci_clk ecap_clk = {
.name = "ecap",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap0_clk = {
+static struct davinci_clk ecap0_clk = {
.name = "ecap0_clk",
.parent = &ecap_clk,
};
-static struct clk ecap1_clk = {
+static struct davinci_clk ecap1_clk = {
.name = "ecap1_clk",
.parent = &ecap_clk,
};
-static struct clk ecap2_clk = {
+static struct davinci_clk ecap2_clk = {
.name = "ecap2_clk",
.parent = &ecap_clk,
};
@@ -1170,7 +1171,7 @@ int da850_register_cpufreq(char *async_clk)
return platform_device_register(&da850_cpufreq_device);
}
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate)
{
int ret = 0, diff;
unsigned int best = (unsigned int) -1;
@@ -1193,14 +1194,14 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
return ret * 1000;
}
-static int da850_set_armrate(struct clk *clk, unsigned long index)
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long index)
{
- struct clk *pllclk = &pll0_clk;
+ struct davinci_clk *pllclk = &pll0_clk;
- return clk_set_rate(pllclk, index);
+ return clk_set_rate(pllclk->hw.clk, index);
}
-static int da850_set_pll0rate(struct clk *clk, unsigned long rate)
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long rate)
{
struct pll_data *pll = clk->pll_data;
struct cpufreq_frequency_table *freq;
@@ -1238,17 +1239,17 @@ int __init da850_register_cpufreq(char *async_clk)
return 0;
}
-static int da850_set_armrate(struct clk *clk, unsigned long rate)
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long rate)
{
return -EINVAL;
}
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate)
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long armrate)
{
return -EINVAL;
}
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate)
{
return clk->rate;
}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index cc497f4..8d6deee 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -1054,7 +1054,7 @@ int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
}
#ifdef CONFIG_ARCH_DAVINCI_DA850
-static struct clk sata_refclk = {
+static struct davinci_clk sata_refclk = {
.name = "sata_refclk",
.set_rate = davinci_simple_set_rate,
};
@@ -1064,11 +1064,11 @@ int __init da850_register_sata_refclk(int rate)
int ret;
sata_refclk.rate = rate;
- ret = clk_register(&sata_refclk);
+ ret = davinci_clk_register(&sata_refclk);
if (ret)
return ret;
- clk_register_clkdev(&sata_refclk, "refclk", "ahci_da850");
+ clk_register_clkdev(sata_refclk.hw.clk, "refclk", "ahci_da850");
return 0;
}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 5d8a986..90d0e65 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -55,118 +55,118 @@ static struct pll_data pll2_data = {
.flags = PLL_HAS_PREDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
/* FIXME -- crystal rate is board-specific */
.rate = DM355_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll1_data,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk vpss_dac_clk = {
+static struct davinci_clk vpss_dac_clk = {
.name = "vpss_dac",
.parent = &pll1_sysclk3,
.lpsc = DM355_LPSC_VPSS_DAC,
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk clkout1_clk = {
+static struct davinci_clk clkout1_clk = {
.name = "clkout1",
.parent = &pll1_aux_clk,
/* NOTE: clkout1 can be externally gated by muxing GPIO-18 */
};
-static struct clk clkout2_clk = {
+static struct davinci_clk clkout2_clk = {
.name = "clkout2",
.parent = &pll1_sysclkbp,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll2_data,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclkbp = {
+static struct davinci_clk pll2_sysclkbp = {
.name = "pll2_sysclkbp",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk clkout3_clk = {
+static struct davinci_clk clkout3_clk = {
.name = "clkout3",
.parent = &pll2_sysclkbp,
/* NOTE: clkout3 can be externally gated by muxing GPIO-16 */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm_clk",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_ARM,
@@ -192,146 +192,146 @@ static struct clk arm_clk = {
* .lpsc = DAVINCI_LPSC_CFG5, // "test"
*/
-static struct clk mjcp_clk = {
+static struct davinci_clk mjcp_clk = {
.name = "mjcp",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_IMCOP,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_UART2,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk asp0_clk = {
+static struct davinci_clk asp0_clk = {
.name = "asp0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_McBSP,
};
-static struct clk asp1_clk = {
+static struct davinci_clk asp1_clk = {
.name = "asp1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_McBSP1,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_MMC_SD1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_SPI1,
};
-static struct clk spi2_clk = {
+static struct davinci_clk spi2_clk = {
.name = "spi2",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_SPI2,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk pwm3_clk = {
+static struct davinci_clk pwm3_clk = {
.name = "pwm3",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_PWM3,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
.usecount = 1, /* REVISIT: why can't this be disabled? */
};
-static struct clk timer3_clk = {
+static struct davinci_clk timer3_clk = {
.name = "timer3",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_TIMER3,
};
-static struct clk rto_clk = {
+static struct davinci_clk rto_clk = {
.name = "rto",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_RTO,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_USB,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 74037a6..49b46b5 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -66,360 +66,360 @@ static struct pll_data pll2_data = {
.flags = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM365_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll1_data,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk clkout0_clk = {
+static struct davinci_clk clkout0_clk = {
.name = "clkout0",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_sysclk6 = {
+static struct davinci_clk pll1_sysclk6 = {
.name = "pll1_sysclk6",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll1_sysclk7 = {
+static struct davinci_clk pll1_sysclk7 = {
.name = "pll1_sysclk7",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk pll1_sysclk8 = {
+static struct davinci_clk pll1_sysclk8 = {
.name = "pll1_sysclk8",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll1_sysclk9 = {
+static struct davinci_clk pll1_sysclk9 = {
.name = "pll1_sysclk9",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll2_data,
};
-static struct clk pll2_aux_clk = {
+static struct davinci_clk pll2_aux_clk = {
.name = "pll2_aux_clk",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk clkout1_clk = {
+static struct davinci_clk clkout1_clk = {
.name = "clkout1",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclk2 = {
+static struct davinci_clk pll2_sysclk2 = {
.name = "pll2_sysclk2",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll2_sysclk3 = {
+static struct davinci_clk pll2_sysclk3 = {
.name = "pll2_sysclk3",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll2_sysclk4 = {
+static struct davinci_clk pll2_sysclk4 = {
.name = "pll2_sysclk4",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll2_sysclk5 = {
+static struct davinci_clk pll2_sysclk5 = {
.name = "pll2_sysclk5",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll2_sysclk6 = {
+static struct davinci_clk pll2_sysclk6 = {
.name = "pll2_sysclk6",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll2_sysclk7 = {
+static struct davinci_clk pll2_sysclk7 = {
.name = "pll2_sysclk7",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk pll2_sysclk8 = {
+static struct davinci_clk pll2_sysclk8 = {
.name = "pll2_sysclk8",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll2_sysclk9 = {
+static struct davinci_clk pll2_sysclk9 = {
.name = "pll2_sysclk9",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk vpss_dac_clk = {
+static struct davinci_clk vpss_dac_clk = {
.name = "vpss_dac",
.parent = &pll1_sysclk3,
.lpsc = DM365_LPSC_DAC_CLK,
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk5,
.lpsc = DM365_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm_clk",
.parent = &pll2_sysclk2,
.lpsc = DAVINCI_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll1_sysclk8,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_MMC_SD1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI1,
};
-static struct clk spi2_clk = {
+static struct davinci_clk spi2_clk = {
.name = "spi2",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI2,
};
-static struct clk spi3_clk = {
+static struct davinci_clk spi3_clk = {
.name = "spi3",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI3,
};
-static struct clk spi4_clk = {
+static struct davinci_clk spi4_clk = {
.name = "spi4",
.parent = &pll1_aux_clk,
.lpsc = DM365_LPSC_SPI4,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk pwm3_clk = {
+static struct davinci_clk pwm3_clk = {
.name = "pwm3",
.parent = &ref_clk,
.lpsc = DM365_LPSC_PWM3,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
.usecount = 1,
};
-static struct clk timer3_clk = {
+static struct davinci_clk timer3_clk = {
.name = "timer3",
.parent = &pll1_aux_clk,
.lpsc = DM365_LPSC_TIMER3,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_EMAC,
};
-static struct clk voicecodec_clk = {
+static struct davinci_clk voicecodec_clk = {
.name = "voice_codec",
.parent = &pll2_sysclk4,
.lpsc = DM365_LPSC_VOICE_CODEC,
};
-static struct clk asp0_clk = {
+static struct davinci_clk asp0_clk = {
.name = "asp0",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_McBSP1,
};
-static struct clk rto_clk = {
+static struct davinci_clk rto_clk = {
.name = "rto",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_RTO,
};
-static struct clk mjcp_clk = {
+static struct davinci_clk mjcp_clk = {
.name = "mjcp",
.parent = &pll1_sysclk3,
.lpsc = DM365_LPSC_MJCP,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 1b27849..af2f767 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -53,88 +53,88 @@ static struct pll_data pll2_data = {
.phys_base = DAVINCI_PLL2_BASE,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM644X_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.pll_data = &pll2_data,
.flags = CLK_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclk2 = {
+static struct davinci_clk pll2_sysclk2 = {
.name = "pll2_sysclk2",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll2_sysclkbp = {
+static struct davinci_clk pll2_sysclkbp = {
.name = "pll2_sysclkbp",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_GEM,
@@ -142,14 +142,14 @@ static struct clk dsp_clk = {
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk vicp_clk = {
+static struct davinci_clk vicp_clk = {
.name = "vicp",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_IMCOP,
@@ -157,128 +157,128 @@ static struct clk vicp_clk = {
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk3,
.lpsc = DAVINCI_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk3,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART2,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk ide_clk = {
+static struct davinci_clk ide_clk = {
.name = "ide",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_ATA,
};
-static struct clk asp_clk = {
+static struct davinci_clk asp_clk = {
.name = "asp0",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_McBSP,
};
-static struct clk mmcsd_clk = {
+static struct davinci_clk mmcsd_clk = {
.name = "mmcsd",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk spi_clk = {
+static struct davinci_clk spi_clk = {
.name = "spi",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk vlynq_clk = {
+static struct davinci_clk vlynq_clk = {
.name = "vlynq",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_VLYNQ,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 1ecca9b..ed55d17 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -62,258 +62,258 @@ static struct pll_data pll2_data = {
.phys_base = DAVINCI_PLL2_BASE,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM646X_REF_FREQ,
.set_rate = davinci_simple_set_rate,
};
-static struct clk aux_clkin = {
+static struct davinci_clk aux_clkin = {
.name = "aux_clkin",
.rate = DM646X_AUX_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_sysclk6 = {
+static struct davinci_clk pll1_sysclk6 = {
.name = "pll1_sysclk6",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll1_sysclk8 = {
+static struct davinci_clk pll1_sysclk8 = {
.name = "pll1_sysclk8",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll1_sysclk9 = {
+static struct davinci_clk pll1_sysclk9 = {
.name = "pll1_sysclk9",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2_clk",
.parent = &ref_clk,
.pll_data = &pll2_data,
.flags = CLK_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll1_sysclk1,
.lpsc = DM646X_LPSC_C64X_CPU,
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_cc_clk = {
+static struct davinci_clk edma_cc_clk = {
.name = "edma_cc",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPCC,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc0_clk = {
+static struct davinci_clk edma_tc0_clk = {
.name = "edma_tc0",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc1_clk = {
+static struct davinci_clk edma_tc1_clk = {
.name = "edma_tc1",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc2_clk = {
+static struct davinci_clk edma_tc2_clk = {
.name = "edma_tc2",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC2,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc3_clk = {
+static struct davinci_clk edma_tc3_clk = {
.name = "edma_tc3",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC3,
.flags = ALWAYS_ENABLED,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART2,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "I2CCLK",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_I2C,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_GPIO,
};
-static struct clk mcasp0_clk = {
+static struct davinci_clk mcasp0_clk = {
.name = "mcasp0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_McASP0,
};
-static struct clk mcasp1_clk = {
+static struct davinci_clk mcasp1_clk = {
.name = "mcasp1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_McASP1,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_AEMIF,
.flags = ALWAYS_ENABLED,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_EMAC,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_PWM0,
.usecount = 1, /* REVIST: disabling hangs system */
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_PWM1,
.usecount = 1, /* REVIST: disabling hangs system */
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_sysclk3,
.flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */
};
-static struct clk ide_clk = {
+static struct davinci_clk ide_clk = {
.name = "ide",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_ATA,
};
-static struct clk vpif0_clk = {
+static struct davinci_clk vpif0_clk = {
.name = "vpif0",
.parent = &ref_clk,
.lpsc = DM646X_LPSC_VPSSMSTR,
.flags = ALWAYS_ENABLED,
};
-static struct clk vpif1_clk = {
+static struct davinci_clk vpif1_clk = {
.name = "vpif1",
.parent = &ref_clk,
.lpsc = DM646X_LPSC_VPSSSLV,
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h
index 3e8af6a..42ed4f2 100644
--- a/arch/arm/mach-davinci/include/mach/clock.h
+++ b/arch/arm/mach-davinci/include/mach/clock.h
@@ -15,9 +15,6 @@
struct clk;
-extern int clk_register(struct clk *clk);
-extern void clk_unregister(struct clk *clk);
-
int davinci_clk_reset_assert(struct clk *c);
int davinci_clk_reset_deassert(struct clk *c);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index a2e575e..7ea1343 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -23,7 +23,7 @@
#define DA8XX_USB0_BASE 0x01e00000
#define DA8XX_USB1_BASE 0x01e25000
-static struct clk *usb20_clk;
+static struct davinci_clk *usb20_clk;
static struct platform_device da8xx_usb_phy = {
.name = "da8xx-usb-phy",
@@ -128,7 +128,7 @@ int __init da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata)
return platform_device_register(&da8xx_usb11_device);
}
-static struct clk usb_refclkin = {
+static struct davinci_clk usb_refclkin = {
.name = "usb_refclkin",
.set_rate = davinci_simple_set_rate,
};
@@ -147,16 +147,16 @@ int __init da8xx_register_usb_refclkin(int rate)
int ret;
usb_refclkin.rate = rate;
- ret = clk_register(&usb_refclkin);
+ ret = davinci_clk_register(&usb_refclkin);
if (ret)
return ret;
- clk_register_clkdev(&usb_refclkin, "usb_refclkin", NULL);
+ clk_register_clkdev(usb_refclkin.hw.clk, "usb_refclkin", NULL);
return 0;
}
-static void usb20_phy_clk_enable(struct clk *clk)
+static void usb20_phy_clk_enable(struct davinci_clk *clk)
{
u32 val;
u32 timeout = 500000; /* 500 msec */
@@ -187,7 +187,7 @@ static void usb20_phy_clk_enable(struct clk *clk)
davinci_clk_disable(usb20_clk);
}
-static void usb20_phy_clk_disable(struct clk *clk)
+static void usb20_phy_clk_disable(struct davinci_clk *clk)
{
u32 val;
@@ -196,7 +196,8 @@ static void usb20_phy_clk_disable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
}
-static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+static int usb20_phy_clk_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -214,7 +215,7 @@ static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
/* reference frequency also comes from parent clock */
val &= ~CFGCHIP2_REFFREQ_MASK;
- switch (clk_get_rate(parent)) {
+ switch (parent->rate) {
case 12000000:
val |= CFGCHIP2_REFFREQ_12MHZ;
break;
@@ -252,7 +253,7 @@ static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk usb20_phy_clk = {
+static struct davinci_clk usb20_phy_clk = {
.name = "usb20_phy",
.clk_enable = usb20_phy_clk_enable,
.clk_disable = usb20_phy_clk_disable,
@@ -267,32 +268,36 @@ static struct clk usb20_phy_clk = {
*/
int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
{
- struct clk *parent;
+ struct clk *clk, *parent;
int ret;
- usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
- ret = PTR_ERR_OR_ZERO(usb20_clk);
+ clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
+ ret = PTR_ERR_OR_ZERO(clk);
if (ret)
return ret;
parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux");
ret = PTR_ERR_OR_ZERO(parent);
if (ret) {
- clk_put(usb20_clk);
+ clk_put(clk);
return ret;
}
- usb20_phy_clk.parent = parent;
- ret = clk_register(&usb20_phy_clk);
+ usb20_clk = to_davinci_clk(__clk_get_hw(clk));
+
+ usb20_phy_clk.parent = to_davinci_clk(__clk_get_hw(parent));
+ ret = davinci_clk_register(&usb20_phy_clk);
if (!ret)
- clk_register_clkdev(&usb20_phy_clk, "usb20_phy", "da8xx-usb-phy");
+ clk_register_clkdev(usb20_phy_clk.hw.clk, "usb20_phy",
+ "da8xx-usb-phy");
clk_put(parent);
return ret;
}
-static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+static int usb11_phy_clk_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -313,7 +318,7 @@ static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk usb11_phy_clk = {
+static struct davinci_clk usb11_phy_clk = {
.name = "usb11_phy",
.set_parent = usb11_phy_clk_set_parent,
};
@@ -336,10 +341,11 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
if (IS_ERR(parent))
return PTR_ERR(parent);
- usb11_phy_clk.parent = parent;
- ret = clk_register(&usb11_phy_clk);
+ usb11_phy_clk.parent = to_davinci_clk(__clk_get_hw(parent));
+ ret = davinci_clk_register(&usb11_phy_clk);
if (!ret)
- clk_register_clkdev(&usb11_phy_clk, "usb11_phy", "da8xx-usb-phy");
+ clk_register_clkdev(usb11_phy_clk.hw.clk, "usb11_phy",
+ "da8xx-usb-phy");
clk_put(parent);
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 5/5] ARM: davinci: remove clock debugfs
2017-12-09 2:15 [PATCH v3 0/5] ARM: davinci: convert to common clock framework David Lechner
` (3 preceding siblings ...)
2017-12-09 2:15 ` [PATCH v3 4/5] ARM: davinci: convert to common clock framework David Lechner
@ 2017-12-09 2:15 ` David Lechner
4 siblings, 0 replies; 11+ messages in thread
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: David Lechner, Sekhar Nori, Kevin Hilman, linux-kernel
This removed the debugfs entry for mach-davinci clocks. The clocks now use
the common clock framework, which provides debugfs already, so this code is
redundant.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/clock.c | 79 -------------------------------------------
1 file changed, 79 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 0e63d93..347902e 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -626,82 +626,3 @@ void __init davinci_clk_init(struct davinci_clk *clk, const char *con_id,
if (clk->flags & ALWAYS_ENABLED)
clk_prepare_enable(clk->hw.clk);
}
-
-#ifdef CONFIG_DEBUG_FS
-
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-
-#define CLKNAME_MAX 10 /* longest clock name */
-#define NEST_DELTA 2
-#define NEST_MAX 4
-
-static void
-dump_clock(struct seq_file *s, unsigned nest, struct davinci_clk *parent)
-{
- char *state;
- char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
- struct davinci_clk *clk;
- unsigned i;
-
- if (parent->flags & CLK_PLL)
- state = "pll";
- else if (parent->flags & CLK_PSC)
- state = "psc";
- else
- state = "";
-
- /* <nest spaces> name <pad to end> */
- memset(buf, ' ', sizeof(buf) - 1);
- buf[sizeof(buf) - 1] = 0;
- i = strlen(parent->name);
- memcpy(buf + nest, parent->name,
- min(i, (unsigned)(sizeof(buf) - 1 - nest)));
-
- seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
- buf, parent->usecount, state, parent->rate);
- /* REVISIT show device associations too */
-
- /* cost is now small, but not linear... */
- list_for_each_entry(clk, &parent->children, childnode) {
- dump_clock(s, nest + NEST_DELTA, clk);
- }
-}
-
-static int davinci_ck_show(struct seq_file *m, void *v)
-{
- struct davinci_clk *clk;
-
- /*
- * Show clock tree; We trust nonzero usecounts equate to PSC enables...
- */
- mutex_lock(&clocks_mutex);
- list_for_each_entry(clk, &clocks, node)
- if (!clk->parent)
- dump_clock(m, 0, clk);
- mutex_unlock(&clocks_mutex);
-
- return 0;
-}
-
-static int davinci_ck_open(struct inode *inode, struct file *file)
-{
- return single_open(file, davinci_ck_show, NULL);
-}
-
-static const struct file_operations davinci_ck_operations = {
- .open = davinci_ck_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int __init davinci_clk_debugfs_init(void)
-{
- debugfs_create_file("davinci_clocks", S_IFREG | S_IRUGO, NULL, NULL,
- &davinci_ck_operations);
- return 0;
-
-}
-device_initcall(davinci_clk_debugfs_init);
-#endif /* CONFIG_DEBUG_FS */
--
2.7.4
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v3 4/5] ARM: davinci: convert to common clock framework
2017-12-09 2:15 ` [PATCH v3 4/5] ARM: davinci: convert to common clock framework David Lechner
@ 2017-12-19 13:47 ` Sekhar Nori
2017-12-19 23:12 ` David Lechner
0 siblings, 1 reply; 11+ messages in thread
From: Sekhar Nori @ 2017-12-19 13:47 UTC (permalink / raw)
To: David Lechner, linux-arm-kernel; +Cc: Kevin Hilman, linux-kernel
Hi David,
On Saturday 09 December 2017 07:45 AM, David Lechner wrote:
> This converts the clocks in mach-davinci to the common clock framework.
>
> Most of the patch just involves renaming struct clk to struct davinci_clk.
> There is also a struct clk_hw added to provide the bridge between the
> existing clock implementation and the common clock framework.
>
> The clk_get_parent and clk_set_parent callbacks are dropped because all
> clocks currently (effectivly) have a single parent, in which case the
> common clock framework does not want you to implement these functions
> yourself.
>
> clk_unregister() is dropped because it is not used anywhere in
> mach-davinci.
>
> EXPORT_SYMBOL() is removed from functions not used outside of mach-davinci.
>
> Fixed checkpatch.pl warning about bare use of unsigned in dump_clock().
>
> Signed-off-by: David Lechner <david@lechnology.com>
The cleanups leading upto this patch look fine, but I am not sure about
this patch itself. Ideally, we should have moved to drivers/clk also.
And shared code with keystone too since the PSC and PLL implementations
of the two architectures are quite similar.
I could think of this as an intermediate step while we get there, but I
am afraid of the churn that would cause. For example, if we reuse
keystone driver, we will be using clk_psc and we can get rid of the
davinci_clk that this patch introduces.
So unless there is big roadblock to moving to drivers/clk, we should
probably do that in one shot.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 4/5] ARM: davinci: convert to common clock framework
2017-12-19 13:47 ` Sekhar Nori
@ 2017-12-19 23:12 ` David Lechner
2017-12-21 12:34 ` Sekhar Nori
0 siblings, 1 reply; 11+ messages in thread
From: David Lechner @ 2017-12-19 23:12 UTC (permalink / raw)
To: Sekhar Nori, linux-arm-kernel; +Cc: Kevin Hilman, linux-kernel
On 12/19/2017 07:47 AM, Sekhar Nori wrote:
> Hi David,
>
> On Saturday 09 December 2017 07:45 AM, David Lechner wrote:
>> This converts the clocks in mach-davinci to the common clock framework.
>>
>> Most of the patch just involves renaming struct clk to struct davinci_clk.
>> There is also a struct clk_hw added to provide the bridge between the
>> existing clock implementation and the common clock framework.
>>
>> The clk_get_parent and clk_set_parent callbacks are dropped because all
>> clocks currently (effectivly) have a single parent, in which case the
>> common clock framework does not want you to implement these functions
>> yourself.
>>
>> clk_unregister() is dropped because it is not used anywhere in
>> mach-davinci.
>>
>> EXPORT_SYMBOL() is removed from functions not used outside of mach-davinci.
>>
>> Fixed checkpatch.pl warning about bare use of unsigned in dump_clock().
>>
>> Signed-off-by: David Lechner <david@lechnology.com>
>
> The cleanups leading upto this patch look fine, but I am not sure about
> this patch itself. Ideally, we should have moved to drivers/clk also.
> And shared code with keystone too since the PSC and PLL implementations
> of the two architectures are quite similar.
>
> I could think of this as an intermediate step while we get there, but I
> am afraid of the churn that would cause. For example, if we reuse
> keystone driver, we will be using clk_psc and we can get rid of the
> davinci_clk that this patch introduces.
>
> So unless there is big roadblock to moving to drivers/clk, we should
> probably do that in one shot.
>
Yes, this is intended as an intermediate step. My thinking was that it
would be better to do one thing at a time, so if something breaks, it
will be easier to find the problem than if we try to do everything at
once. But, you are right, there will be quite a few extra intermediate
steps required, for example, I have realized that in order to use the
davinci_clk concurrently with other clocks in the common clock
framework, at least the parent pointer and children linked list will
have to be removed, introducing another intermediate step.
While avoiding the davinci_clk step would be ideal, there is quite a bit
that needs to be done first before this will be possible. And the
downside I see to doing it this way is that no one will be able to test
any of the preparatory patches because they depend on the common clock
framework. We won't even be able to compile them until all the pieces
are in place and we can enable the common clock kernel configuration option.
Here is a list of some of the issues I know about so far preventing me
from doing everything at once at this point in time:
* Reentrancy of clk_enable() on non-SMP systems is broken in the common
clock framework [1][2], but this reentrancy is needed for the DA8xx USB
PHY PLL clock [3].
* drivers/remoteproc/da8xx_remoteproc.c calls
davinci_clk_reset_{assert,deassert}() in arch/arm/mach-davinci/clock.c.
This needs to be moved to the PSC driver in drivers/clk. The reset
framework in drivers/reset looks ideal for handling this, but it is
currently device tree only and it looks like we need it to work on
non-device tree boards. So, our options are: to move this hack to the
PSC driver in drivers/clk/ *or* to update the reset framework to work
with non-device tree boards *or* convert all of the mach-davinci boards
to device tree only.
* The device tree bindings for "ti,keystone,psc-clock" are not the best
and I am really not keen on reusing them. What makes sense to me would
be to define a device tree node that represents the entire PSC IP block
with child nodes for each clock output. Something like this:
power-controller@2350000 {
compatible = "ti,davinci-psc";
reg = <0x2350000 0xb00>;
...
clkhyperlink0: clkhyperlink0 {
#clock-cells = <0>;
clock-output-names = "hyperlink-0";
clocks = <&chipclk12>;
power-domain = <5>;
module-domain = <12>;
};
...
};
But the keystone bindings assign the entire PSC register space to each
clock individually (twice). And the really ugly part is that the module
domain and the power domain numbers of each PSC "clock" is embedded in
the register address. So, if you have reg = <0x02350030 0xb00>,
<0x02350014 0x400>; what this really means is that the clock driver will
iomap 0x02350000 (notice the 00 instead of the 30 and 14 at the end of
each register and that the base 0x02350000 is essentially listed twice
with two different sizes) and it means that this particular clock has a
module domain of 12 (0x30 / 4 = 12, 4 comes from the fact these are
32-bit registers) and a power domain of 5 (0x14 / 4 = 5). You can find
the numbers 12 and 5 easily in the SRM, but the numbers used in the
device tree bindings are pretty meaningless. Furthermore, the driver
itself stores the base address in a global variable which won't work for
DA8XX since it has two PSCs instead of one. So, for this case, I'm
really tempted to just write a new driver with better device tree
bindings rather than trying to fix up the keystone driver to make it
compatible with davinci and better device tree bindings while still
maintaining backwards compatibility with wacky device tree bindings.
* The keystone PLL driver and device tree bindings are in better shape,
but they cannot be used as-is with davinci family processors since the
registers are laid out differently. I have a work-in-progress patch for
this that I started quite a while back [4][5].
* All of the keystone clock drivers are currently device tree only, so
they will need to be modified *or* as mentioned above all mach-davinci
boards could be converted to device tree only.
[1]: https://patchwork.kernel.org/patch/10108437/
[2]: https://patchwork.kernel.org/patch/10115483/
[3]: https://patchwork.kernel.org/patch/9449741/
[4]:
https://github.com/dlech/ev3dev-kernel/commit/5e7bf2070aa03283b605d7b86864758d24f83aa8
[5]:
https://github.com/dlech/ev3dev-kernel/commit/1e34686ff57a673c8655eaedacec4d65d48f93b3
---
Also, a bit more background on my motivation here. Really, all I want is
to be able to use the "pwm-clock" device tree bindings to supply a clock
to a Bluetooth chip. But the driver for it requires the common clock
framework.
This is just a spare time project for me, which is why I have just done
the bare minimum to get CONFIG_COMMON_CLK enabled rather than trying to
fix all of the hard problems to do thing the "right way". As you have
seen above, there is still quite a bit of work remaining to be done,
especially when doing this just for fun. It is probably just wishful
thinking, but I kind of hoped that if I was able to get things this far,
maybe some other interested parties might be able to help with one of
the various pieces.
One way or another, I suppose I will get my Bluetooth clock eventually. :-)
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 4/5] ARM: davinci: convert to common clock framework
2017-12-19 23:12 ` David Lechner
@ 2017-12-21 12:34 ` Sekhar Nori
2017-12-21 16:52 ` David Lechner
0 siblings, 1 reply; 11+ messages in thread
From: Sekhar Nori @ 2017-12-21 12:34 UTC (permalink / raw)
To: David Lechner, linux-arm-kernel; +Cc: Kevin Hilman, linux-kernel
On Wednesday 20 December 2017 04:42 AM, David Lechner wrote:
> On 12/19/2017 07:47 AM, Sekhar Nori wrote:
>> Hi David,
>>
>> On Saturday 09 December 2017 07:45 AM, David Lechner wrote:
>>> This converts the clocks in mach-davinci to the common clock framework.
>>>
>>> Most of the patch just involves renaming struct clk to struct
>>> davinci_clk.
>>> There is also a struct clk_hw added to provide the bridge between the
>>> existing clock implementation and the common clock framework.
>>>
>>> The clk_get_parent and clk_set_parent callbacks are dropped because all
>>> clocks currently (effectivly) have a single parent, in which case the
>>> common clock framework does not want you to implement these functions
>>> yourself.
>>>
>>> clk_unregister() is dropped because it is not used anywhere in
>>> mach-davinci.
>>>
>>> EXPORT_SYMBOL() is removed from functions not used outside of
>>> mach-davinci.
>>>
>>> Fixed checkpatch.pl warning about bare use of unsigned in dump_clock().
>>>
>>> Signed-off-by: David Lechner <david@lechnology.com>
>>
>> The cleanups leading upto this patch look fine, but I am not sure about
>> this patch itself. Ideally, we should have moved to drivers/clk also.
>> And shared code with keystone too since the PSC and PLL implementations
>> of the two architectures are quite similar.
>>
>> I could think of this as an intermediate step while we get there, but I
>> am afraid of the churn that would cause. For example, if we reuse
>> keystone driver, we will be using clk_psc and we can get rid of the
>> davinci_clk that this patch introduces.
>>
>> So unless there is big roadblock to moving to drivers/clk, we should
>> probably do that in one shot.
>>
>
> Yes, this is intended as an intermediate step. My thinking was that it
> would be better to do one thing at a time, so if something breaks, it
> will be easier to find the problem than if we try to do everything at
> once. But, you are right, there will be quite a few extra intermediate
> steps required, for example, I have realized that in order to use the
> davinci_clk concurrently with other clocks in the common clock
> framework, at least the parent pointer and children linked list will
> have to be removed, introducing another intermediate step.
Thats right, we have two clock lists now, one within mach-davinci and
another in drivers/clk.
> While avoiding the davinci_clk step would be ideal, there is quite a bit
> that needs to be done first before this will be possible. And the
> downside I see to doing it this way is that no one will be able to test
> any of the preparatory patches because they depend on the common clock
> framework. We won't even be able to compile them until all the pieces
> are in place and we can enable the common clock kernel configuration
> option.
Thats right, the whole conversion needs to be one big series. I dont
think we can queue just the preparatory patches without the actual
conversion as the preparation might change with the conversion.
Its a big change no doubt, we have to time it right and make sure it
gets tested in linux-next for quite a while before getting merged.
> Here is a list of some of the issues I know about so far preventing me
> from doing everything at once at this point in time:
>
> * Reentrancy of clk_enable() on non-SMP systems is broken in the common
> clock framework [1][2], but this reentrancy is needed for the DA8xx USB
> PHY PLL clock [3].
I see. I will look at those threads in detail, but looks like you have
the attention of clock framework maintainers so hopefully that will be
solved soon.
> * drivers/remoteproc/da8xx_remoteproc.c calls
> davinci_clk_reset_{assert,deassert}() in arch/arm/mach-davinci/clock.c.
> This needs to be moved to the PSC driver in drivers/clk. The reset
> framework in drivers/reset looks ideal for handling this, but it is
> currently device tree only and it looks like we need it to work on
> non-device tree boards. So, our options are: to move this hack to the
> PSC driver in drivers/clk/ *or* to update the reset framework to work
> with non-device tree boards *or* convert all of the mach-davinci boards
> to device tree only.
The second option "update the reset framework to work with non-device
tree boards" is what we should aim for. The last option is not happening
anytime soon ;)
>
> * The device tree bindings for "ti,keystone,psc-clock" are not the best
> and I am really not keen on reusing them. What makes sense to me would
> be to define a device tree node that represents the entire PSC IP block
> with child nodes for each clock output. Something like this:
>
> power-controller@2350000 {
> compatible = "ti,davinci-psc";
> reg = <0x2350000 0xb00>;
>
> ...
>
> clkhyperlink0: clkhyperlink0 {
> #clock-cells = <0>;
> clock-output-names = "hyperlink-0";
> clocks = <&chipclk12>;
> power-domain = <5>;
> module-domain = <12>;
> };
>
> ...
> };
>
> But the keystone bindings assign the entire PSC register space to each
> clock individually (twice). And the really ugly part is that the module
> domain and the power domain numbers of each PSC "clock" is embedded in
> the register address. So, if you have reg = <0x02350030 0xb00>,
> <0x02350014 0x400>; what this really means is that the clock driver will
> iomap 0x02350000 (notice the 00 instead of the 30 and 14 at the end of
> each register and that the base 0x02350000 is essentially listed twice
> with two different sizes) and it means that this particular clock has a
Okay, I do see the unnecessary ioremap going on and the wasted virtual
memory space. But I dont quite see that the same base (0x02350000) is
being remapped again and again. From whatever I can see in
of_psc_clk_init(), it just maps the addresses for "control" and "domain"
provided in device tree (keystone-clocks.dtsi)
> module domain of 12 (0x30 / 4 = 12, 4 comes from the fact these are
> 32-bit registers) and a power domain of 5 (0x14 / 4 = 5). You can find
> the numbers 12 and 5 easily in the SRM, but the numbers used in the
> device tree bindings are pretty meaningless. Furthermore, the driver
> itself stores the base address in a global variable which won't work for
> DA8XX since it has two PSCs instead of one. So, for this case, I'm
Yeah, I see this issue.
> really tempted to just write a new driver with better device tree
> bindings rather than trying to fix up the keystone driver to make it
> compatible with davinci and better device tree bindings while still
> maintaining backwards compatibility with wacky device tree bindings.
I think thats fine to do as well. We can also look at reusing some code
(for example functions like psc_config() while using different
bindings). I dont see any backward compatibility need here since DA850
is a new device altogether. We cannot change existing keystone bindings,
but can definitely reuse existing keystone code where it suits while
creating new bindings.
We may decide that keeping davinci PSC code handling separate is easier
overall (considering we have to support non-device-tree-mode too, which
keystone does not). This is something that will have to be looked into
along with CCF maintainers.
> * The keystone PLL driver and device tree bindings are in better shape,
> but they cannot be used as-is with davinci family processors since the
> registers are laid out differently. I have a work-in-progress patch for
> this that I started quite a while back [4][5].
Okay, I hadnt done a detailed comparison, but from the patches you have,
it does look bad. I guess we are looking at drivers/clock/davinci here.
And we can use the analysis you have to justify it.
> * All of the keystone clock drivers are currently device tree only, so
> they will need to be modified *or* as mentioned above all mach-davinci
> boards could be converted to device tree only.
The later is not going to happen soon, so it will have to be the former.
>
> [1]: https://patchwork.kernel.org/patch/10108437/
> [2]: https://patchwork.kernel.org/patch/10115483/
> [3]: https://patchwork.kernel.org/patch/9449741/
> [4]:
> https://github.com/dlech/ev3dev-kernel/commit/5e7bf2070aa03283b605d7b86864758d24f83aa8
>
> [5]:
> https://github.com/dlech/ev3dev-kernel/commit/1e34686ff57a673c8655eaedacec4d65d48f93b3
>
>
>
> ---
>
> Also, a bit more background on my motivation here. Really, all I want is
> to be able to use the "pwm-clock" device tree bindings to supply a clock
> to a Bluetooth chip. But the driver for it requires the common clock
> framework.
Okay.
>
> This is just a spare time project for me, which is why I have just done
> the bare minimum to get CONFIG_COMMON_CLK enabled rather than trying to
> fix all of the hard problems to do thing the "right way". As you have
> seen above, there is still quite a bit of work remaining to be done,
> especially when doing this just for fun. It is probably just wishful
> thinking, but I kind of hoped that if I was able to get things this far,
> maybe some other interested parties might be able to help with one of
> the various pieces.
All I can say is that issue has been noted within TI and I believe
(hope) that help is on the way!
If we do go the completely separate clock driver route, I think even
migrating outside of mach-davinci should not be that tough.
>
> One way or another, I suppose I will get my Bluetooth clock eventually. :-)
Sure! Thanks for all your work on this platform so far!
Regards,
Sekhar
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 4/5] ARM: davinci: convert to common clock framework
2017-12-21 12:34 ` Sekhar Nori
@ 2017-12-21 16:52 ` David Lechner
2017-12-26 16:28 ` David Lechner
0 siblings, 1 reply; 11+ messages in thread
From: David Lechner @ 2017-12-21 16:52 UTC (permalink / raw)
To: Sekhar Nori, linux-arm-kernel; +Cc: Kevin Hilman, linux-kernel
On 12/21/2017 06:34 AM, Sekhar Nori wrote:
>
> All I can say is that issue has been noted within TI and I believe
> (hope) that help is on the way!
>
> If we do go the completely separate clock driver route, I think even
> migrating outside of mach-davinci should not be that tough.
>
Based on your responses, I think we have a pretty clear path forward
now. I'm sold on the all at once approach.
If you can pick up the first 3 patches from this series, I have one or
two more I can send that depend on those changes that are not
intermediate steps.
If TI is able to spend some time on this, it would be nice if they could
look at fixing up the reset framework since that is something I haven't
attempted yet.
And I can work on fixing up the PLL and PSC drivers I already have in
drivers/clk/davinci.
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 4/5] ARM: davinci: convert to common clock framework
2017-12-21 16:52 ` David Lechner
@ 2017-12-26 16:28 ` David Lechner
0 siblings, 0 replies; 11+ messages in thread
From: David Lechner @ 2017-12-26 16:28 UTC (permalink / raw)
To: Sekhar Nori, linux-arm-kernel; +Cc: Kevin Hilman, linux-kernel
On 12/21/2017 10:52 AM, David Lechner wrote:
> If you can pick up the first 3 patches from this series, I have one or
> two more I can send that depend on those changes that are not
> intermediate steps.
I take this back. I have a v4 in the works that changes things a little bit.
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2017-12-26 16:28 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-12-09 2:15 [PATCH v3 0/5] ARM: davinci: convert to common clock framework David Lechner
2017-12-09 2:15 ` [PATCH v3 1/5] ARM: davinci: move davinci_clk_init() to init_time David Lechner
2017-12-09 2:15 ` [PATCH v3 2/5] ARM: davinci: don't use static clk_lookup David Lechner
2017-12-09 2:15 ` [PATCH v3 3/5] ARM: davinci: make davinci_clk_reset() static David Lechner
2017-12-09 2:15 ` [PATCH v3 4/5] ARM: davinci: convert to common clock framework David Lechner
2017-12-19 13:47 ` Sekhar Nori
2017-12-19 23:12 ` David Lechner
2017-12-21 12:34 ` Sekhar Nori
2017-12-21 16:52 ` David Lechner
2017-12-26 16:28 ` David Lechner
2017-12-09 2:15 ` [PATCH v3 5/5] ARM: davinci: remove clock debugfs David Lechner
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