From: Joerg Roedel <joro@8bytes.org>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org,
Linus Torvalds <torvalds@linux-foundation.org>,
Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@intel.com>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Juergen Gross <jgross@suse.com>,
Peter Zijlstra <peterz@infradead.org>,
Borislav Petkov <bp@alien8.de>, Jiri Kosina <jkosina@suse.cz>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Brian Gerst <brgerst@gmail.com>,
David Laight <David.Laight@aculab.com>,
Denys Vlasenko <dvlasenk@redhat.com>,
Eduardo Valentin <eduval@amazon.com>,
Greg KH <gregkh@linuxfoundation.org>,
Will Deacon <will.deacon@arm.com>,
aliguori@amazon.com, daniel.gruss@iaik.tugraz.at,
hughd@google.com, keescook@google.com,
Andrea Arcangeli <aarcange@redhat.com>,
Waiman Long <llong@redhat.com>, Pavel Machek <pavel@ucw.cz>,
"David H . Gutteridge" <dhgutteridge@sympatico.ca>,
jroedel@suse.de, joro@8bytes.org
Subject: [PATCH 13/37] x86/entry/32: Add PTI cr3 switch to non-NMI entry/exit points
Date: Mon, 23 Apr 2018 17:47:16 +0200 [thread overview]
Message-ID: <1524498460-25530-14-git-send-email-joro@8bytes.org> (raw)
In-Reply-To: <1524498460-25530-1-git-send-email-joro@8bytes.org>
From: Joerg Roedel <jroedel@suse.de>
Add unconditional cr3 switches between user and kernel cr3
to all non-NMI entry and exit points.
Signed-off-by: Joerg Roedel <jroedel@suse.de>
---
arch/x86/entry/entry_32.S | 83 ++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 79 insertions(+), 4 deletions(-)
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index 71e1cb3..b2b0ecb 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -154,6 +154,33 @@
#endif /* CONFIG_X86_32_LAZY_GS */
+/* Unconditionally switch to user cr3 */
+.macro SWITCH_TO_USER_CR3 scratch_reg:req
+ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
+
+ movl %cr3, \scratch_reg
+ orl $PTI_SWITCH_MASK, \scratch_reg
+ movl \scratch_reg, %cr3
+.Lend_\@:
+.endm
+
+/*
+ * Switch to kernel cr3 if not already loaded and return current cr3 in
+ * \scratch_reg
+ */
+.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
+ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
+ movl %cr3, \scratch_reg
+ /* Test if we are already on kernel CR3 */
+ testl $PTI_SWITCH_MASK, \scratch_reg
+ jz .Lend_\@
+ andl $(~PTI_SWITCH_MASK), \scratch_reg
+ movl \scratch_reg, %cr3
+ /* Return original CR3 in \scratch_reg */
+ orl $PTI_SWITCH_MASK, \scratch_reg
+.Lend_\@:
+.endm
+
.macro SAVE_ALL pt_regs_ax=%eax switch_stacks=0
cld
/* Push segment registers and %eax */
@@ -288,7 +315,6 @@
#endif /* CONFIG_X86_ESPFIX32 */
.endm
-
/*
* Called with pt_regs fully populated and kernel segments loaded,
* so we can access PER_CPU and use the integer registers.
@@ -301,11 +327,19 @@
*/
#define CS_FROM_ENTRY_STACK (1 << 31)
+#define CS_FROM_USER_CR3 (1 << 30)
.macro SWITCH_TO_KERNEL_STACK
ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV
+ SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
+
+ /*
+ * %eax now contains the entry cr3 and we carry it forward in
+ * that register for the time this macro runs
+ */
+
/* Are we on the entry stack? Bail out if not! */
movl PER_CPU_VAR(cpu_entry_area), %edi
addl $CPU_ENTRY_AREA_entry_stack, %edi
@@ -374,7 +408,8 @@
* but switch back to the entry-stack again when we approach
* iret and return to the interrupted code-path. This usually
* happens when we hit an exception while restoring user-space
- * segment registers on the way back to user-space.
+ * segment registers on the way back to user-space or when the
+ * sysenter handler runs with eflags.tf set.
*
* When we switch to the task-stack here, we can't trust the
* contents of the entry-stack anymore, as the exception handler
@@ -391,6 +426,7 @@
*
* %esi: Entry-Stack pointer (same as %esp)
* %edi: Top of the task stack
+ * %eax: CR3 on kernel entry
*/
/* Calculate number of bytes on the entry stack in %ecx */
@@ -407,6 +443,14 @@
orl $CS_FROM_ENTRY_STACK, PT_CS(%esp)
/*
+ * Test the cr3 used to enter the kernel and add a marker
+ * so that we can switch back to it before iret.
+ */
+ testl $PTI_SWITCH_MASK, %eax
+ jz .Lcopy_pt_regs_\@
+ orl $CS_FROM_USER_CR3, PT_CS(%esp)
+
+ /*
* %esi and %edi are unchanged, %ecx contains the number of
* bytes to copy. The code at .Lcopy_pt_regs_\@ will allocate
* the stack-frame on task-stack and copy everything over
@@ -472,7 +516,7 @@
/*
* This macro handles the case when we return to kernel-mode on the iret
- * path and have to switch back to the entry stack.
+ * path and have to switch back to the entry stack and/or user-cr3
*
* See the comments below the .Lentry_from_kernel_\@ label in the
* SWITCH_TO_KERNEL_STACK macro for more details.
@@ -518,6 +562,18 @@
/* Safe to switch to entry-stack now */
movl %ebx, %esp
+ /*
+ * We came from entry-stack and need to check if we also need to
+ * switch back to user cr3.
+ */
+ testl $CS_FROM_USER_CR3, PT_CS(%esp)
+ jz .Lend_\@
+
+ /* Clear marker from stack-frame */
+ andl $(~CS_FROM_USER_CR3), PT_CS(%esp)
+
+ SWITCH_TO_USER_CR3 scratch_reg=%eax
+
.Lend_\@:
.endm
/*
@@ -711,6 +767,18 @@ ENTRY(xen_sysenter_target)
* 0(%ebp) arg6
*/
ENTRY(entry_SYSENTER_32)
+ /*
+ * On entry-stack with all userspace-regs live - save and
+ * restore eflags and %eax to use it as scratch-reg for the cr3
+ * switch.
+ */
+ pushfl
+ pushl %eax
+ SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
+ popl %eax
+ popfl
+
+ /* Stack empty again, switch to task stack */
movl TSS_entry_stack(%esp), %esp
.Lsysenter_past_esp:
@@ -791,6 +859,9 @@ ENTRY(entry_SYSENTER_32)
/* Switch to entry stack */
movl %eax, %esp
+ /* Now ready to switch the cr3 */
+ SWITCH_TO_USER_CR3 scratch_reg=%eax
+
/*
* Restore all flags except IF. (We restore IF separately because
* STI gives a one-instruction window in which we won't be interrupted,
@@ -871,7 +942,11 @@ restore_all:
.Lrestore_all_notrace:
CHECK_AND_APPLY_ESPFIX
.Lrestore_nocheck:
- RESTORE_REGS 4 # skip orig_eax/error_code
+ /* Switch back to user CR3 */
+ SWITCH_TO_USER_CR3 scratch_reg=%eax
+
+ /* Restore user state */
+ RESTORE_REGS pop=4 # skip orig_eax/error_code
.Lirq_return:
/*
* ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization
--
2.7.4
next prev parent reply other threads:[~2018-04-23 15:47 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-23 15:47 [PATCH 00/37 v6] PTI support for x86-32 Joerg Roedel
2018-04-23 15:47 ` [PATCH 01/37] x86/asm-offsets: Move TSS_sp0 and TSS_sp1 to asm-offsets.c Joerg Roedel
2018-04-23 15:47 ` [PATCH 02/37] x86/entry/32: Rename TSS_sysenter_sp0 to TSS_entry_stack Joerg Roedel
2018-04-23 15:47 ` [PATCH 03/37] x86/entry/32: Load task stack from x86_tss.sp1 in SYSENTER handler Joerg Roedel
2018-04-23 15:47 ` [PATCH 04/37] x86/entry/32: Put ESPFIX code into a macro Joerg Roedel
2018-04-23 15:47 ` [PATCH 05/37] x86/entry/32: Unshare NMI return path Joerg Roedel
2018-04-23 15:47 ` [PATCH 06/37] x86/entry/32: Split off return-to-kernel path Joerg Roedel
2018-04-23 15:47 ` [PATCH 07/37] x86/entry/32: Enter the kernel via trampoline stack Joerg Roedel
2018-04-23 15:47 ` [PATCH 08/37] x86/entry/32: Leave " Joerg Roedel
2018-04-23 15:47 ` [PATCH 09/37] x86/entry/32: Introduce SAVE_ALL_NMI and RESTORE_ALL_NMI Joerg Roedel
2018-04-23 15:47 ` [PATCH 10/37] x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack Joerg Roedel
2018-04-23 15:47 ` [PATCH 11/37] x86/entry/32: Simplify debug entry point Joerg Roedel
2018-04-23 15:47 ` [PATCH 12/37] x86/32: Use tss.sp1 as cpu_current_top_of_stack Joerg Roedel
2018-04-23 15:47 ` Joerg Roedel [this message]
2018-04-23 15:47 ` [PATCH 14/37] x86/entry/32: Add PTI cr3 switches to NMI handler code Joerg Roedel
2018-04-23 15:47 ` [PATCH 15/37] x86/pgtable: Rename pti_set_user_pgd to pti_set_user_pgtbl Joerg Roedel
2018-04-23 15:47 ` [PATCH 16/37] x86/pgtable/pae: Unshare kernel PMDs when PTI is enabled Joerg Roedel
2018-04-23 15:47 ` [PATCH 17/37] x86/pgtable/32: Allocate 8k page-tables " Joerg Roedel
2018-04-23 15:47 ` [PATCH 18/37] x86/pgtable: Move pgdp kernel/user conversion functions to pgtable.h Joerg Roedel
2018-04-23 15:47 ` [PATCH 19/37] x86/pgtable: Move pti_set_user_pgtbl() " Joerg Roedel
2018-04-23 15:47 ` [PATCH 20/37] x86/pgtable: Move two more functions from pgtable_64.h " Joerg Roedel
2018-04-23 15:47 ` [PATCH 21/37] x86/mm/pae: Populate valid user PGD entries Joerg Roedel
2018-04-23 15:47 ` [PATCH 22/37] x86/mm/pae: Populate the user page-table with user pgd's Joerg Roedel
2018-04-23 15:47 ` [PATCH 23/37] x86/mm/legacy: " Joerg Roedel
2018-04-23 15:47 ` [PATCH 24/37] x86/mm/pti: Add an overflow check to pti_clone_pmds() Joerg Roedel
2018-04-23 15:47 ` [PATCH 25/37] x86/mm/pti: Define X86_CR3_PTI_PCID_USER_BIT on x86_32 Joerg Roedel
2018-04-23 15:47 ` [PATCH 26/37] x86/mm/pti: Clone CPU_ENTRY_AREA on PMD level " Joerg Roedel
2018-04-23 15:47 ` [PATCH 27/37] x86/mm/pti: Keep permissions when cloning kernel text in pti_clone_kernel_text() Joerg Roedel
2018-04-23 17:06 ` Kees Cook
2018-04-23 18:00 ` Joerg Roedel
2018-04-23 15:47 ` [PATCH 28/37] x86/mm/pti: Map kernel-text to user-space on 32 bit kernels Joerg Roedel
2018-04-23 17:09 ` Kees Cook
2018-04-23 17:48 ` Joerg Roedel
2018-04-23 15:47 ` [PATCH 29/37] x86/mm/dump_pagetables: Define INIT_PGD Joerg Roedel
2018-04-23 15:47 ` [PATCH 30/37] x86/pgtable/pae: Use separate kernel PMDs for user page-table Joerg Roedel
2018-04-23 15:47 ` [PATCH 31/37] x86/ldt: Reserve address-space range on 32 bit for the LDT Joerg Roedel
2018-04-23 15:47 ` [PATCH 32/37] x86/ldt: Define LDT_END_ADDR Joerg Roedel
2018-04-23 15:47 ` [PATCH 33/37] x86/ldt: Split out sanity check in map_ldt_struct() Joerg Roedel
2018-04-23 15:47 ` [PATCH 34/37] x86/ldt: Enable LDT user-mapping for PAE Joerg Roedel
2018-04-23 15:47 ` [PATCH 35/37] x86/pti: Allow CONFIG_PAGE_TABLE_ISOLATION for x86_32 Joerg Roedel
2018-04-23 15:47 ` [PATCH 36/37] x86/mm/pti: Add Warning when booting on a PCID capable CPU Joerg Roedel
2018-04-23 15:47 ` [PATCH 37/37] x86/entry/32: Add debug code to check entry/exit cr3 Joerg Roedel
2018-04-23 16:45 ` [PATCH 00/37 v6] PTI support for x86-32 Linus Torvalds
2018-04-23 17:45 ` Joerg Roedel
2018-04-23 17:49 ` Linus Torvalds
2018-04-23 19:38 ` Pavel Machek
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1524498460-25530-14-git-send-email-joro@8bytes.org \
--to=joro@8bytes.org \
--cc=David.Laight@aculab.com \
--cc=aarcange@redhat.com \
--cc=aliguori@amazon.com \
--cc=boris.ostrovsky@oracle.com \
--cc=bp@alien8.de \
--cc=brgerst@gmail.com \
--cc=daniel.gruss@iaik.tugraz.at \
--cc=dave.hansen@intel.com \
--cc=dhgutteridge@sympatico.ca \
--cc=dvlasenk@redhat.com \
--cc=eduval@amazon.com \
--cc=gregkh@linuxfoundation.org \
--cc=hpa@zytor.com \
--cc=hughd@google.com \
--cc=jgross@suse.com \
--cc=jkosina@suse.cz \
--cc=jpoimboe@redhat.com \
--cc=jroedel@suse.de \
--cc=keescook@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=llong@redhat.com \
--cc=luto@kernel.org \
--cc=mingo@kernel.org \
--cc=pavel@ucw.cz \
--cc=peterz@infradead.org \
--cc=tglx@linutronix.de \
--cc=torvalds@linux-foundation.org \
--cc=will.deacon@arm.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).