* [PATCH 0/2] fpga fixes
@ 2018-06-28 1:56 Alan Tull
2018-06-28 1:56 ` [PATCH 1/2] fpga: altera-cvp: Fix an error handling path in 'altera_cvp_probe()' Alan Tull
2018-06-28 1:56 ` [PATCH 2/2] Documentation: fpga: cleanup Alan Tull
0 siblings, 2 replies; 3+ messages in thread
From: Alan Tull @ 2018-06-28 1:56 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Jonathan Corbet, Moritz Fischer, Randy Dunlap, linux-kernel,
linux-doc, linux-fpga, Alan Tull
Hi Greg,
Please take these two patches of fixes for FPGA. They apply cleanly on
current linux-next. They were reviewed on the mailing list.
Alan
Alan Tull (1):
Documentation: fpga: cleanup
Christophe Jaillet (1):
fpga: altera-cvp: Fix an error handling path in 'altera_cvp_probe()'
Documentation/driver-api/fpga/fpga-mgr.rst | 12 ++++++------
Documentation/driver-api/fpga/fpga-region.rst | 12 ++++++------
Documentation/driver-api/fpga/intro.rst | 14 +++++++-------
drivers/fpga/altera-cvp.c | 6 ++++--
4 files changed, 23 insertions(+), 21 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/2] fpga: altera-cvp: Fix an error handling path in 'altera_cvp_probe()'
2018-06-28 1:56 [PATCH 0/2] fpga fixes Alan Tull
@ 2018-06-28 1:56 ` Alan Tull
2018-06-28 1:56 ` [PATCH 2/2] Documentation: fpga: cleanup Alan Tull
1 sibling, 0 replies; 3+ messages in thread
From: Alan Tull @ 2018-06-28 1:56 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Jonathan Corbet, Moritz Fischer, Randy Dunlap, linux-kernel,
linux-doc, linux-fpga, Alan Tull, Christophe Jaillet
From: Christophe Jaillet <christophe.jaillet@wanadoo.fr>
If 'fpga_mgr_create()' fails, we should release some resources, as done
in the other error handling path of the function.
Fixes: 7085e2a94f7d ("fpga: manager: change api, don't use drvdata")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Moritz Fischer <mdf@kernel.org>
Acked-by: Alan Tull <atull@kernel.org>
---
drivers/fpga/altera-cvp.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera-cvp.c
index dd4edd8..7fa7936 100644
--- a/drivers/fpga/altera-cvp.c
+++ b/drivers/fpga/altera-cvp.c
@@ -455,8 +455,10 @@ static int altera_cvp_probe(struct pci_dev *pdev,
mgr = fpga_mgr_create(&pdev->dev, conf->mgr_name,
&altera_cvp_ops, conf);
- if (!mgr)
- return -ENOMEM;
+ if (!mgr) {
+ ret = -ENOMEM;
+ goto err_unmap;
+ }
pci_set_drvdata(pdev, mgr);
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] Documentation: fpga: cleanup
2018-06-28 1:56 [PATCH 0/2] fpga fixes Alan Tull
2018-06-28 1:56 ` [PATCH 1/2] fpga: altera-cvp: Fix an error handling path in 'altera_cvp_probe()' Alan Tull
@ 2018-06-28 1:56 ` Alan Tull
1 sibling, 0 replies; 3+ messages in thread
From: Alan Tull @ 2018-06-28 1:56 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Jonathan Corbet, Moritz Fischer, Randy Dunlap, linux-kernel,
linux-doc, linux-fpga, Alan Tull
Minor fixes including:
* fix some typos
* correct use of a/an
* rephrase explanation of .state ops function
* s/re-use/reuse/ (use only one spelling of 'reuse' in these docs)
* s/cpu/CPU/
Signed-off-by: Alan Tull <atull@kernel.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
---
Documentation/driver-api/fpga/fpga-mgr.rst | 12 ++++++------
Documentation/driver-api/fpga/fpga-region.rst | 12 ++++++------
Documentation/driver-api/fpga/intro.rst | 14 +++++++-------
3 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/Documentation/driver-api/fpga/fpga-mgr.rst b/Documentation/driver-api/fpga/fpga-mgr.rst
index bcf2dd2..4b3825d 100644
--- a/Documentation/driver-api/fpga/fpga-mgr.rst
+++ b/Documentation/driver-api/fpga/fpga-mgr.rst
@@ -83,7 +83,7 @@ The programming sequence is::
3. .write_complete
The .write_init function will prepare the FPGA to receive the image data. The
-buffer passed into .write_init will be atmost .initial_header_size bytes long,
+buffer passed into .write_init will be at most .initial_header_size bytes long;
if the whole bitstream is not immediately available then the core code will
buffer up at least this much before starting.
@@ -98,9 +98,9 @@ scatter list. This interface is suitable for drivers which use DMA.
The .write_complete function is called after all the image has been written
to put the FPGA into operating mode.
-The ops include a .state function which will read the hardware FPGA manager and
-return a code of type enum fpga_mgr_states. It doesn't result in a change in
-hardware state.
+The ops include a .state function which will determine the state the FPGA is in
+and return a code of type enum fpga_mgr_states. It doesn't result in a change
+in state.
How to write an image buffer to a supported FPGA
------------------------------------------------
@@ -181,8 +181,8 @@ API for implementing a new FPGA Manager driver
.. kernel-doc:: drivers/fpga/fpga-mgr.c
:functions: fpga_mgr_unregister
-API for programming a FPGA
---------------------------
+API for programming an FPGA
+---------------------------
.. kernel-doc:: include/linux/fpga/fpga-mgr.h
:functions: fpga_image_info
diff --git a/Documentation/driver-api/fpga/fpga-region.rst b/Documentation/driver-api/fpga/fpga-region.rst
index f89e4a3..f30333c 100644
--- a/Documentation/driver-api/fpga/fpga-region.rst
+++ b/Documentation/driver-api/fpga/fpga-region.rst
@@ -4,7 +4,7 @@ FPGA Region
Overview
--------
-This document is meant to be an brief overview of the FPGA region API usage. A
+This document is meant to be a brief overview of the FPGA region API usage. A
more conceptual look at regions can be found in the Device Tree binding
document [#f1]_.
@@ -31,11 +31,11 @@ fpga_image_info including:
* pointers to the image as either a scatter-gather buffer, a contiguous
buffer, or the name of firmware file
- * flags indicating specifics such as whether the image if for partial
+ * flags indicating specifics such as whether the image is for partial
reconfiguration.
-How to program a FPGA using a region
-------------------------------------
+How to program an FPGA using a region
+-------------------------------------
First, allocate the info struct::
@@ -77,8 +77,8 @@ An example of usage can be seen in the probe function of [#f2]_.
.. [#f1] ../devicetree/bindings/fpga/fpga-region.txt
.. [#f2] ../../drivers/fpga/of-fpga-region.c
-API to program a FGPA
----------------------
+API to program an FPGA
+----------------------
.. kernel-doc:: drivers/fpga/fpga-region.c
:functions: fpga_region_program_fpga
diff --git a/Documentation/driver-api/fpga/intro.rst b/Documentation/driver-api/fpga/intro.rst
index 51cd81d..50d1cab 100644
--- a/Documentation/driver-api/fpga/intro.rst
+++ b/Documentation/driver-api/fpga/intro.rst
@@ -12,18 +12,18 @@ Linux. Some of the core intentions of the FPGA subsystems are:
* Code should not be shared between upper and lower layers. This
should go without saying. If that seems necessary, there's probably
- framework functionality that that can be added that will benefit
+ framework functionality that can be added that will benefit
other users. Write the linux-fpga mailing list and maintainers and
seek out a solution that expands the framework for broad reuse.
-* Generally, when adding code, think of the future. Plan for re-use.
+* Generally, when adding code, think of the future. Plan for reuse.
The framework in the kernel is divided into:
FPGA Manager
------------
-If you are adding a new FPGA or a new method of programming a FPGA,
+If you are adding a new FPGA or a new method of programming an FPGA,
this is the subsystem for you. Low level FPGA manager drivers contain
the knowledge of how to program a specific device. This subsystem
includes the framework in fpga-mgr.c and the low level drivers that
@@ -32,10 +32,10 @@ are registered with it.
FPGA Bridge
-----------
-FPGA Bridges prevent spurious signals from going out of a FPGA or a
-region of a FPGA during programming. They are disabled before
+FPGA Bridges prevent spurious signals from going out of an FPGA or a
+region of an FPGA during programming. They are disabled before
programming begins and re-enabled afterwards. An FPGA bridge may be
-actual hard hardware that gates a bus to a cpu or a soft ("freeze")
+actual hard hardware that gates a bus to a CPU or a soft ("freeze")
bridge in FPGA fabric that surrounds a partial reconfiguration region
of an FPGA. This subsystem includes fpga-bridge.c and the low level
drivers that are registered with it.
@@ -44,7 +44,7 @@ FPGA Region
-----------
If you are adding a new interface to the FPGA framework, add it on top
-of a FPGA region to allow the most reuse of your interface.
+of an FPGA region to allow the most reuse of your interface.
The FPGA Region framework (fpga-region.c) associates managers and
bridges as reconfigurable regions. A region may refer to the whole
--
2.7.4
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2018-06-28 1:56 ` [PATCH 2/2] Documentation: fpga: cleanup Alan Tull
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