From: Aapo Vienamo <avienamo@nvidia.com>
To: Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Mikko Perttunen <mperttunen@nvidia.com>,
Stefan Agner <stefan@agner.ch>
Cc: <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
Aapo Vienamo <avienamo@nvidia.com>
Subject: [PATCH 00/40] Tegra SDHCI add support for HS200 and UHS signaling
Date: Wed, 1 Aug 2018 19:31:50 +0300 [thread overview]
Message-ID: <1533141150-10511-1-git-send-email-avienamo@nvidia.com> (raw)
Hi all,
This series implements support for faster signaling modes on Tegra
SDHCI controllers. This series consist of several parts: changes
requried for 1.8 V signaling and pad control, pad calibration, and
tuning. Following earlies patch sets have been merged into this
larger set: "Tegra PMC pinctrl pad configuration", "Tegra SDHCI enable
1.8 V signaling on Tegar210 and Tegra186", "Tegra SDHCI update the
padautocal procedure". Also the patches for enabling SDHCI tuning
are added.
Changelog:
v1:
- Probe the regulator voltage capabilities to determine whether pinctrl
is needed in tegra_sdhci_r eset
- Don't remove tegra_sdhci_voltage_switch()
- Use dev_warn() in tegra_sdhci_init_pinctrl_info()
- Don't change start_signal_voltage_switch callback if pinctrl info
invalid
- Only call udelay(1) on enable in tegra_sdhci_configure_cal_pad()
- Add nvidia, prefix to pad autocal offset dt props in the example
See the original patch sets for earlier changelogs.
Aapo Vienamo (40):
dt-bindings: Add Tegra PMC pad configuration bindings
dt-bindings: mmc: tegra: Add pad voltage control properties
dt-bindings: Add Tegra SDHCI pad pdpu offset bindings
dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values
soc/tegra: pmc: Fix pad voltage configuration for Tegra186
soc/tegra: pmc: Factor out DPD register bit calculation
soc/tegra: pmc: Implement tegra_io_pad_is_powered()
soc/tegra: pmc: Use X macro to generate IO pad tables
soc/tegra: pmc: Remove public pad voltage APIs
soc/tegra: pmc: Implement pad configuration via pinctrl
mmc: sdhci: Add a quirk to skip clearing the transfer mode register on
tuning
mmc: tegra: Reconfigure pad voltages during voltage switching
mmc: tegra: Poll for calibration completion
mmc: tegra: Set calibration pad voltage reference
mmc: tegra: Power on the calibration pad
mmc: tegra: Disable card clock during pad calibration
mmc: tegra: Program pad autocal offsets from dt
mmc: tegra: Perform pad calibration after voltage switch
mmc: tegra: Enable pad calibration on Tegra210 and Tegra186
mmc: tegra: Add a workaround for tap value change glitch
mmc: tegra: Parse default trim and tap from dt
mmc: tegra: Configure default tap values
mmc: tegra: Configure default trim value on reset
mmc: tegra: Use standard SDHCI tuning on Tegra210 and Tegra186
mmc: sdhci: Add a quirk to disable card clock during tuning
mmc: tegra: Enable workaround for tuning transfer mode bug
mmc: tegra: Set SDHCI_QUIRK2_TUNE_DIS_CARD_CLK on Tegra210
mmc: tegra: Enable UHS and HS200 modes for Tegra210
mmc: tegra: Enable UHS and HS200 modes for Tegra186
arm64: dts: Add Tegra210 sdmmc pinctrl voltage states
arm64: dts: Add Tegra186 sdmmc pinctrl voltage states
arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V
arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply
arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1
arm64: dts: tegra186: Add sdmmc pad auto calibration offsets
arm64: dts: tegra210: Add sdmmc pad auto calibration offsets
arm64: dts: tegra210: Add SDHCI tap and trim values
arm64: dts: tegra186: Add SDHCI tap and trim values
arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4
arm64: dts: tegra210: Assign clocks for sdmmc1 and sdmmc4
.../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 92 ++++
.../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 103 ++++
.../bindings/mmc/nvidia,tegra20-sdhci.txt | 69 +++
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 74 +++
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 12 +-
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 1 -
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 55 ++
drivers/mmc/host/sdhci-tegra.c | 553 +++++++++++++++++++--
drivers/mmc/host/sdhci.c | 21 +
drivers/mmc/host/sdhci.h | 4 +
drivers/soc/tegra/pmc.c | 512 ++++++++++++++-----
include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 +
include/soc/tegra/pmc.h | 20 +-
13 files changed, 1321 insertions(+), 213 deletions(-)
create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
--
2.7.4
next reply other threads:[~2018-08-01 16:32 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-01 16:31 Aapo Vienamo [this message]
2018-08-01 16:31 ` [PATCH 01/40] dt-bindings: Add Tegra PMC pad configuration bindings Aapo Vienamo
2018-08-09 12:13 ` Thierry Reding
2018-08-09 16:24 ` Aapo Vienamo
2018-08-01 16:31 ` [PATCH 02/40] dt-bindings: mmc: tegra: Add pad voltage control properties Aapo Vienamo
2018-08-09 12:15 ` Thierry Reding
2018-08-09 16:36 ` Aapo Vienamo
2018-08-01 16:31 ` [PATCH 03/40] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Aapo Vienamo
2018-08-09 12:18 ` Thierry Reding
2018-08-01 16:31 ` [PATCH 04/40] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values Aapo Vienamo
2018-08-01 16:31 ` [PATCH 05/40] soc/tegra: pmc: Fix pad voltage configuration for Tegra186 Aapo Vienamo
2018-08-09 12:20 ` Thierry Reding
2018-08-01 16:31 ` [PATCH 06/40] soc/tegra: pmc: Factor out DPD register bit calculation Aapo Vienamo
2018-08-01 16:31 ` [PATCH 07/40] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Aapo Vienamo
2018-08-09 12:22 ` Thierry Reding
2018-08-01 16:31 ` [PATCH 08/40] soc/tegra: pmc: Use X macro to generate IO pad tables Aapo Vienamo
2018-08-01 16:31 ` [PATCH 09/40] soc/tegra: pmc: Remove public pad voltage APIs Aapo Vienamo
2018-08-01 16:32 ` [PATCH 10/40] soc/tegra: pmc: Implement pad configuration via pinctrl Aapo Vienamo
2018-08-09 12:27 ` Thierry Reding
2018-08-09 12:44 ` Aapo Vienamo
2018-08-09 13:12 ` Thierry Reding
2018-08-01 16:32 ` [PATCH 11/40] mmc: sdhci: Add a quirk to skip clearing the transfer mode register on tuning Aapo Vienamo
2018-08-01 16:32 ` [PATCH 12/40] mmc: tegra: Reconfigure pad voltages during voltage switching Aapo Vienamo
2018-08-09 12:43 ` Thierry Reding
2018-08-09 12:52 ` Aapo Vienamo
2018-08-09 13:14 ` Thierry Reding
2018-08-01 16:32 ` [PATCH 13/40] mmc: tegra: Poll for calibration completion Aapo Vienamo
2018-08-09 12:46 ` Thierry Reding
2018-08-09 12:56 ` Aapo Vienamo
2018-08-09 13:44 ` Thierry Reding
2018-08-01 16:32 ` [PATCH 14/40] mmc: tegra: Set calibration pad voltage reference Aapo Vienamo
2018-08-01 16:32 ` [PATCH 15/40] mmc: tegra: Power on the calibration pad Aapo Vienamo
2018-08-09 12:52 ` Thierry Reding
2018-08-01 16:32 ` [PATCH 16/40] mmc: tegra: Disable card clock during pad calibration Aapo Vienamo
2018-08-09 12:54 ` Thierry Reding
2018-08-01 16:32 ` [PATCH 17/40] mmc: tegra: Program pad autocal offsets from dt Aapo Vienamo
2018-08-01 16:32 ` [PATCH 18/40] mmc: tegra: Perform pad calibration after voltage switch Aapo Vienamo
2018-08-01 16:32 ` [PATCH 19/40] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 20/40] mmc: tegra: Add a workaround for tap value change glitch Aapo Vienamo
2018-08-09 12:58 ` Thierry Reding
2018-08-01 16:32 ` [PATCH 21/40] mmc: tegra: Parse default trim and tap from dt Aapo Vienamo
2018-08-01 16:32 ` [PATCH 22/40] mmc: tegra: Configure default tap values Aapo Vienamo
2018-08-01 16:32 ` [PATCH 23/40] mmc: tegra: Configure default trim value on reset Aapo Vienamo
2018-08-01 16:32 ` [PATCH 24/40] mmc: tegra: Use standard SDHCI tuning on Tegra210 and Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 25/40] mmc: sdhci: Add a quirk to disable card clock during tuning Aapo Vienamo
2018-08-01 16:32 ` [PATCH 26/40] mmc: tegra: Enable workaround for tuning transfer mode bug Aapo Vienamo
2018-08-01 16:32 ` [PATCH 27/40] mmc: tegra: Set SDHCI_QUIRK2_TUNE_DIS_CARD_CLK on Tegra210 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 28/40] mmc: tegra: Enable UHS and HS200 modes for Tegra210 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 29/40] mmc: tegra: Enable UHS and HS200 modes for Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 30/40] arm64: dts: Add Tegra210 sdmmc pinctrl voltage states Aapo Vienamo
2018-08-01 16:32 ` [PATCH 31/40] arm64: dts: Add Tegra186 " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 32/40] arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V Aapo Vienamo
2018-08-01 16:32 ` [PATCH 33/40] arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply Aapo Vienamo
2018-08-01 16:32 ` [PATCH 34/40] arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 35/40] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets Aapo Vienamo
2018-08-01 16:32 ` [PATCH 36/40] arm64: dts: tegra210: " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 37/40] arm64: dts: tegra210: Add SDHCI tap and trim values Aapo Vienamo
2018-08-01 16:32 ` [PATCH 38/40] arm64: dts: tegra186: " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 39/40] arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 40/40] arm64: dts: tegra210: " Aapo Vienamo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1533141150-10511-1-git-send-email-avienamo@nvidia.com \
--to=avienamo@nvidia.com \
--cc=adrian.hunter@intel.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mperttunen@nvidia.com \
--cc=robh+dt@kernel.org \
--cc=stefan@agner.ch \
--cc=thierry.reding@gmail.com \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).