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From: Aapo Vienamo <avienamo@nvidia.com>
To: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	Stefan Agner <stefan@agner.ch>
Cc: <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
	Aapo Vienamo <avienamo@nvidia.com>
Subject: [PATCH 09/40] soc/tegra: pmc: Remove public pad voltage APIs
Date: Wed, 1 Aug 2018 19:31:59 +0300	[thread overview]
Message-ID: <1533141150-10511-10-git-send-email-avienamo@nvidia.com> (raw)
In-Reply-To: <1533141150-10511-1-git-send-email-avienamo@nvidia.com>

Make tegra_io_pad_set_voltage() and tegra_io_pad_get_voltage() static
and remove the prototypes from pmc.h. Remove enum tegra_io_pad_voltage
and use the defines from <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
instead.

These functions aren't used outside of the pmc driver and new use cases
should use the pinctrl interface instead.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
---
 drivers/soc/tegra/pmc.c | 17 ++++++++---------
 include/soc/tegra/pmc.h | 19 -------------------
 2 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 38cb915..979f4b4 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -45,6 +45,8 @@
 #include <soc/tegra/fuse.h>
 #include <soc/tegra/pmc.h>
 
+#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
+
 #define PMC_CNTRL			0x0
 #define  PMC_CNTRL_INTR_POLARITY	BIT(17) /* inverts INTR polarity */
 #define  PMC_CNTRL_CPU_PWRREQ_OE	BIT(16) /* CPU pwr req enable */
@@ -1092,8 +1094,7 @@ static int tegra_io_pad_is_powered(enum tegra_io_pad id)
 	return !(value & mask);
 }
 
-int tegra_io_pad_set_voltage(enum tegra_io_pad id,
-			     enum tegra_io_pad_voltage voltage)
+static int tegra_io_pad_set_voltage(enum tegra_io_pad id, int voltage)
 {
 	const struct tegra_io_pad_soc *pad;
 	u32 value;
@@ -1109,7 +1110,7 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id,
 
 	if (pmc->soc->has_impl_33v_pwr) {
 		value = tegra_pmc_readl(PMC_IMPL_E_33V_PWR);
-		if (voltage == TEGRA_IO_PAD_1800000UV)
+		if (voltage == TEGRA_IO_PAD_VOLTAGE_1V8)
 			value &= ~BIT(pad->voltage);
 		else
 			value |= BIT(pad->voltage);
@@ -1123,7 +1124,7 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id,
 		/* update I/O voltage */
 		value = tegra_pmc_readl(PMC_PWR_DET_VALUE);
 
-		if (voltage == TEGRA_IO_PAD_1800000UV)
+		if (voltage == TEGRA_IO_PAD_VOLTAGE_1V8)
 			value &= ~BIT(pad->voltage);
 		else
 			value |= BIT(pad->voltage);
@@ -1137,9 +1138,8 @@ int tegra_io_pad_set_voltage(enum tegra_io_pad id,
 
 	return 0;
 }
-EXPORT_SYMBOL(tegra_io_pad_set_voltage);
 
-int tegra_io_pad_get_voltage(enum tegra_io_pad id)
+static int tegra_io_pad_get_voltage(enum tegra_io_pad id)
 {
 	const struct tegra_io_pad_soc *pad;
 	u32 value;
@@ -1157,11 +1157,10 @@ int tegra_io_pad_get_voltage(enum tegra_io_pad id)
 		value = tegra_pmc_readl(PMC_PWR_DET_VALUE);
 
 	if ((value & BIT(pad->voltage)) == 0)
-		return TEGRA_IO_PAD_1800000UV;
+		return TEGRA_IO_PAD_VOLTAGE_1V8;
 
-	return TEGRA_IO_PAD_3300000UV;
+	return TEGRA_IO_PAD_VOLTAGE_3V3;
 }
-EXPORT_SYMBOL(tegra_io_pad_get_voltage);
 
 /**
  * tegra_io_rail_power_on() - enable power to I/O rail
diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h
index 445aa66..5624268 100644
--- a/include/soc/tegra/pmc.h
+++ b/include/soc/tegra/pmc.h
@@ -141,16 +141,6 @@ enum tegra_io_pad {
 #define TEGRA_IO_RAIL_HDMI	TEGRA_IO_PAD_HDMI
 #define TEGRA_IO_RAIL_LVDS	TEGRA_IO_PAD_LVDS
 
-/**
- * enum tegra_io_pad_voltage - voltage level of the I/O pad's source rail
- * @TEGRA_IO_PAD_1800000UV: 1.8 V
- * @TEGRA_IO_PAD_3300000UV: 3.3 V
- */
-enum tegra_io_pad_voltage {
-	TEGRA_IO_PAD_1800000UV,
-	TEGRA_IO_PAD_3300000UV,
-};
-
 #ifdef CONFIG_SOC_TEGRA_PMC
 int tegra_powergate_is_powered(unsigned int id);
 int tegra_powergate_power_on(unsigned int id);
@@ -163,9 +153,6 @@ int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk,
 
 int tegra_io_pad_power_enable(enum tegra_io_pad id);
 int tegra_io_pad_power_disable(enum tegra_io_pad id);
-int tegra_io_pad_set_voltage(enum tegra_io_pad id,
-			     enum tegra_io_pad_voltage voltage);
-int tegra_io_pad_get_voltage(enum tegra_io_pad id);
 
 /* deprecated, use tegra_io_pad_power_{enable,disable}() instead */
 int tegra_io_rail_power_on(unsigned int id);
@@ -213,12 +200,6 @@ static inline int tegra_io_pad_power_disable(enum tegra_io_pad id)
 	return -ENOSYS;
 }
 
-static inline int tegra_io_pad_set_voltage(enum tegra_io_pad id,
-					   enum tegra_io_pad_voltage voltage)
-{
-	return -ENOSYS;
-}
-
 static inline int tegra_io_pad_get_voltage(enum tegra_io_pad id)
 {
 	return -ENOSYS;
-- 
2.7.4


  parent reply	other threads:[~2018-08-01 16:33 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-01 16:31 [PATCH 00/40] Tegra SDHCI add support for HS200 and UHS signaling Aapo Vienamo
2018-08-01 16:31 ` [PATCH 01/40] dt-bindings: Add Tegra PMC pad configuration bindings Aapo Vienamo
2018-08-09 12:13   ` Thierry Reding
2018-08-09 16:24     ` Aapo Vienamo
2018-08-01 16:31 ` [PATCH 02/40] dt-bindings: mmc: tegra: Add pad voltage control properties Aapo Vienamo
2018-08-09 12:15   ` Thierry Reding
2018-08-09 16:36     ` Aapo Vienamo
2018-08-01 16:31 ` [PATCH 03/40] dt-bindings: Add Tegra SDHCI pad pdpu offset bindings Aapo Vienamo
2018-08-09 12:18   ` Thierry Reding
2018-08-01 16:31 ` [PATCH 04/40] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values Aapo Vienamo
2018-08-01 16:31 ` [PATCH 05/40] soc/tegra: pmc: Fix pad voltage configuration for Tegra186 Aapo Vienamo
2018-08-09 12:20   ` Thierry Reding
2018-08-01 16:31 ` [PATCH 06/40] soc/tegra: pmc: Factor out DPD register bit calculation Aapo Vienamo
2018-08-01 16:31 ` [PATCH 07/40] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Aapo Vienamo
2018-08-09 12:22   ` Thierry Reding
2018-08-01 16:31 ` [PATCH 08/40] soc/tegra: pmc: Use X macro to generate IO pad tables Aapo Vienamo
2018-08-01 16:31 ` Aapo Vienamo [this message]
2018-08-01 16:32 ` [PATCH 10/40] soc/tegra: pmc: Implement pad configuration via pinctrl Aapo Vienamo
2018-08-09 12:27   ` Thierry Reding
2018-08-09 12:44     ` Aapo Vienamo
2018-08-09 13:12       ` Thierry Reding
2018-08-01 16:32 ` [PATCH 11/40] mmc: sdhci: Add a quirk to skip clearing the transfer mode register on tuning Aapo Vienamo
2018-08-01 16:32 ` [PATCH 12/40] mmc: tegra: Reconfigure pad voltages during voltage switching Aapo Vienamo
2018-08-09 12:43   ` Thierry Reding
2018-08-09 12:52     ` Aapo Vienamo
2018-08-09 13:14       ` Thierry Reding
2018-08-01 16:32 ` [PATCH 13/40] mmc: tegra: Poll for calibration completion Aapo Vienamo
2018-08-09 12:46   ` Thierry Reding
2018-08-09 12:56     ` Aapo Vienamo
2018-08-09 13:44       ` Thierry Reding
2018-08-01 16:32 ` [PATCH 14/40] mmc: tegra: Set calibration pad voltage reference Aapo Vienamo
2018-08-01 16:32 ` [PATCH 15/40] mmc: tegra: Power on the calibration pad Aapo Vienamo
2018-08-09 12:52   ` Thierry Reding
2018-08-01 16:32 ` [PATCH 16/40] mmc: tegra: Disable card clock during pad calibration Aapo Vienamo
2018-08-09 12:54   ` Thierry Reding
2018-08-01 16:32 ` [PATCH 17/40] mmc: tegra: Program pad autocal offsets from dt Aapo Vienamo
2018-08-01 16:32 ` [PATCH 18/40] mmc: tegra: Perform pad calibration after voltage switch Aapo Vienamo
2018-08-01 16:32 ` [PATCH 19/40] mmc: tegra: Enable pad calibration on Tegra210 and Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 20/40] mmc: tegra: Add a workaround for tap value change glitch Aapo Vienamo
2018-08-09 12:58   ` Thierry Reding
2018-08-01 16:32 ` [PATCH 21/40] mmc: tegra: Parse default trim and tap from dt Aapo Vienamo
2018-08-01 16:32 ` [PATCH 22/40] mmc: tegra: Configure default tap values Aapo Vienamo
2018-08-01 16:32 ` [PATCH 23/40] mmc: tegra: Configure default trim value on reset Aapo Vienamo
2018-08-01 16:32 ` [PATCH 24/40] mmc: tegra: Use standard SDHCI tuning on Tegra210 and Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 25/40] mmc: sdhci: Add a quirk to disable card clock during tuning Aapo Vienamo
2018-08-01 16:32 ` [PATCH 26/40] mmc: tegra: Enable workaround for tuning transfer mode bug Aapo Vienamo
2018-08-01 16:32 ` [PATCH 27/40] mmc: tegra: Set SDHCI_QUIRK2_TUNE_DIS_CARD_CLK on Tegra210 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 28/40] mmc: tegra: Enable UHS and HS200 modes for Tegra210 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 29/40] mmc: tegra: Enable UHS and HS200 modes for Tegra186 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 30/40] arm64: dts: Add Tegra210 sdmmc pinctrl voltage states Aapo Vienamo
2018-08-01 16:32 ` [PATCH 31/40] arm64: dts: Add Tegra186 " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 32/40] arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V Aapo Vienamo
2018-08-01 16:32 ` [PATCH 33/40] arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply Aapo Vienamo
2018-08-01 16:32 ` [PATCH 34/40] arm64: dts: tegra210-p2597: Remove no-1-8-v from sdmmc1 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 35/40] arm64: dts: tegra186: Add sdmmc pad auto calibration offsets Aapo Vienamo
2018-08-01 16:32 ` [PATCH 36/40] arm64: dts: tegra210: " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 37/40] arm64: dts: tegra210: Add SDHCI tap and trim values Aapo Vienamo
2018-08-01 16:32 ` [PATCH 38/40] arm64: dts: tegra186: " Aapo Vienamo
2018-08-01 16:32 ` [PATCH 39/40] arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4 Aapo Vienamo
2018-08-01 16:32 ` [PATCH 40/40] arm64: dts: tegra210: " Aapo Vienamo

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