From: Yang Yingliang <yangyingliang@huawei.com>
To: <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: <yangyingliang@huawei.com>, <marc.zyngier@arm.com>,
<tglx@linutronix.de>, <guohanjun@huawei.com>
Subject: [PATCH 2/4] irqchip/mbigen: rename register marcros
Date: Tue, 16 Oct 2018 17:15:14 +0800 [thread overview]
Message-ID: <1539681316-19300-3-git-send-email-yangyingliang@huawei.com> (raw)
In-Reply-To: <1539681316-19300-1-git-send-email-yangyingliang@huawei.com>
A MBIGEN can also be used for generating SPIs, so let's
rename register macros to make them more resonable.
The first 64-pins of MBIGEN is used by SPIs, so rename
RESERVED_IRQ_PER_MBIGEN_CHIP to SPI_NUM_PER_MBIGEN_CHIP
and change the comment for this marcro.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
---
drivers/irqchip/irq-mbigen.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index 567b29c..f05998f 100644
--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -30,14 +30,14 @@
/* Interrupt numbers per mbigen node supported */
#define IRQS_PER_MBIGEN_NODE 128
-/* 64 irqs (Pin0-pin63) are reserved for each mbigen chip */
-#define RESERVED_IRQ_PER_MBIGEN_CHIP 64
+/* 64 irqs (Pin0-pin63) are used for SPIs on each mbigen chip */
+#define SPI_NUM_PER_MBIGEN_CHIP 64
/* The maximum IRQ pin number of mbigen chip(start from 0) */
#define MAXIMUM_IRQ_PIN_NUM 1407
/**
- * In mbigen vector register
+ * In mbigen lpi vector register
* bit[21:12]: event id value
* bit[11:0]: device id
*/
@@ -48,7 +48,7 @@
#define MBIGEN_NODE_OFFSET 0x1000
/* offset of vector register in mbigen node */
-#define REG_MBIGEN_VEC_OFFSET 0x200
+#define REG_MBIGEN_LPI_VEC_OFFSET 0x200
/**
* offset of clear register in mbigen node
@@ -62,7 +62,7 @@
* This register is used to configure interrupt
* trigger type
*/
-#define REG_MBIGEN_TYPE_OFFSET 0x0
+#define REG_MBIGEN_LPI_TYPE_OFFSET 0x0
/**
* struct mbigen_device - holds the information of mbigen device.
@@ -79,12 +79,12 @@ static inline unsigned int get_mbigen_vec_reg(irq_hw_number_t hwirq)
{
unsigned int nid, pin;
- hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;
+ hwirq -= SPI_NUM_PER_MBIGEN_CHIP;
nid = hwirq / IRQS_PER_MBIGEN_NODE + 1;
pin = hwirq % IRQS_PER_MBIGEN_NODE;
return pin * 4 + nid * MBIGEN_NODE_OFFSET
- + REG_MBIGEN_VEC_OFFSET;
+ + REG_MBIGEN_LPI_VEC_OFFSET;
}
static inline void get_mbigen_type_reg(irq_hw_number_t hwirq,
@@ -92,7 +92,7 @@ static inline void get_mbigen_type_reg(irq_hw_number_t hwirq,
{
unsigned int nid, irq_ofst, ofst;
- hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;
+ hwirq -= SPI_NUM_PER_MBIGEN_CHIP;
nid = hwirq / IRQS_PER_MBIGEN_NODE + 1;
irq_ofst = hwirq % IRQS_PER_MBIGEN_NODE;
@@ -100,7 +100,7 @@ static inline void get_mbigen_type_reg(irq_hw_number_t hwirq,
ofst = irq_ofst / 32 * 4;
*addr = ofst + nid * MBIGEN_NODE_OFFSET
- + REG_MBIGEN_TYPE_OFFSET;
+ + REG_MBIGEN_LPI_TYPE_OFFSET;
}
static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq,
@@ -183,7 +183,7 @@ static int mbigen_domain_translate(struct irq_domain *d,
return -EINVAL;
if ((fwspec->param[0] > MAXIMUM_IRQ_PIN_NUM) ||
- (fwspec->param[0] < RESERVED_IRQ_PER_MBIGEN_CHIP))
+ (fwspec->param[0] < SPI_NUM_PER_MBIGEN_CHIP))
return -EINVAL;
else
*hwirq = fwspec->param[0];
--
1.8.3
next prev parent reply other threads:[~2018-10-16 9:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-16 9:15 [PATCH 0/4] add support for MBIGEN generating message based SPIs Yang Yingliang
2018-10-16 9:15 ` [PATCH 1/4] irqchip/gic-v3-mbi: fix uninitialized mbi_lock Yang Yingliang
2018-10-16 9:15 ` Yang Yingliang [this message]
2018-10-16 9:15 ` [PATCH 3/4] irqchip/mbigen: add support for a MBIGEN generating SPIs Yang Yingliang
2018-10-17 16:30 ` Marc Zyngier
2018-10-18 3:41 ` Yang Yingliang
2018-10-18 8:55 ` Marc Zyngier
2018-10-18 11:20 ` Hanjun Guo
2018-10-18 11:56 ` Marc Zyngier
2018-10-18 12:54 ` Hanjun Guo
2018-10-16 9:15 ` [PATCH 4/4] dt-bindings/irqchip/mbigen: add example of MBIGEN generate SPIs Yang Yingliang
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