* [PATCH] clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk
@ 2018-09-10 12:01 Lubomir Rintel
2018-10-17 16:02 ` Stephen Boyd
0 siblings, 1 reply; 2+ messages in thread
From: Lubomir Rintel @ 2018-09-10 12:01 UTC (permalink / raw)
To: linux-kernel; +Cc: linux-clk, Michael Turquette, Stephen Boyd, Lubomir Rintel
A typo that makes it impossible to get the correct clocks for
MMP2_CLK_SDH2 and MMP2_CLK_SDH3.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
---
drivers/clk/mmp/clk-of-mmp2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c
index 0fc75c395957..d083b860f083 100644
--- a/drivers/clk/mmp/clk-of-mmp2.c
+++ b/drivers/clk/mmp/clk-of-mmp2.c
@@ -227,8 +227,8 @@ static struct mmp_param_gate_clk apmu_gate_clks[] = {
/* The gate clocks has mux parent. */
{MMP2_CLK_SDH0, "sdh0_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH0, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
{MMP2_CLK_SDH1, "sdh1_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
- {MMP2_CLK_SDH1, "sdh2_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH2, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
- {MMP2_CLK_SDH1, "sdh3_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH3, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
+ {MMP2_CLK_SDH2, "sdh2_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH2, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
+ {MMP2_CLK_SDH3, "sdh3_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH3, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
{MMP2_CLK_DISP0, "disp0_clk", "disp0_div", CLK_SET_RATE_PARENT, APMU_DISP0, 0x1b, 0x1b, 0x0, 0, &disp0_lock},
{MMP2_CLK_DISP0_SPHY, "disp0_sphy_clk", "disp0_sphy_div", CLK_SET_RATE_PARENT, APMU_DISP0, 0x1024, 0x1024, 0x0, 0, &disp0_lock},
{MMP2_CLK_DISP1, "disp1_clk", "disp1_div", CLK_SET_RATE_PARENT, APMU_DISP1, 0x1b, 0x1b, 0x0, 0, &disp1_lock},
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk
2018-09-10 12:01 [PATCH] clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk Lubomir Rintel
@ 2018-10-17 16:02 ` Stephen Boyd
0 siblings, 0 replies; 2+ messages in thread
From: Stephen Boyd @ 2018-10-17 16:02 UTC (permalink / raw)
To: Lubomir Rintel, linux-kernel; +Cc: linux-clk, Michael Turquette, Lubomir Rintel
Quoting Lubomir Rintel (2018-09-10 05:01:44)
> A typo that makes it impossible to get the correct clocks for
> MMP2_CLK_SDH2 and MMP2_CLK_SDH3.
>
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---
Applied to clk-next and added a fixes tag.
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2018-10-17 16:02 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-10 12:01 [PATCH] clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk Lubomir Rintel
2018-10-17 16:02 ` Stephen Boyd
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).