From: Ryder Lee <firstname.lastname@example.org> To: John Crispin <email@example.com> Cc: Thierry Reding <firstname.lastname@example.org>, Rob Herring <email@example.com>, <firstname.lastname@example.org>, Weijie Gao <email@example.com>, Roy Luo <firstname.lastname@example.org>, <email@example.com>, <firstname.lastname@example.org>, <email@example.com>, <firstname.lastname@example.org> Subject: Re: [resend PATCH 1/3] pwm: mediatek: drop flag 'has_clks' Date: Thu, 15 Nov 2018 10:16:16 +0800 [thread overview] Message-ID: <1542248176.30611.4.camel@mtkswgap22> (raw) In-Reply-To: <email@example.com> On Wed, 2018-11-14 at 14:27 +0100, John Crispin wrote: > On 14/11/2018 13:47, Thierry Reding wrote: > > On Tue, Nov 13, 2018 at 10:08:22AM +0800, Ryder Lee wrote: > >> The flag 'has_clks' and related checks are superfluous as the CCF > >> subsystem does this for you. > > Both of these mechanisms aren't equivalent. While CCF can deal with > > optional clocks, what the has_clks flag actually means is that the > > device doesn't need a clock (or doesn't have a clock input) on the > > devices where it is cleared. > > > > So I'd actually be in favor of keeping the has_clks property because it > > serves as an additional sanity check. For example if you run this driver > > on an SoC that "has clocks" but if you don't list them in DT, then after > > this patch the driver will happily continue without clocks, even though > > it may break completely without those clocks. I've seen SoCs respond to > > disabled clocks for a hardware block in different ways, in many cases an > > access to any of the registers will completely hang the CPU. In other > > cases it may just crash in some other way or give you some sort of > > machine exception. None of those are good, and make the tiny bit of > > additional code required to support the has_clks flag very attractive. > > > > But that's just my opinion. If you prefer to throw away that safety > > barrier, be my guest. But if you do, please move this functionality into > > the clock framework first and then make the driver use it. > > > > Thierry > > Hi, > > sorry for my late response. I added the flag for the legacy MIPS > silicon. These SoCs only have a single clock register with a few on/off > bits. there is no complex clocktree or scaling. Hence COMMON_CLK is not > supported by those SoCs. I fully agree with Thierry, that the flag makes > this explicit and the intent was indeed to make sure that on silicon > where clocks are required, that they really are listed in OF. This is > indeed an extra sanity check and hiding it in an implicit check inside > CCF does not feel right. > > John > Thanks for the detailed information:) I will drop this patch in v1. Ryder
next prev parent reply other threads:[~2018-11-15 2:16 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-11-13 2:08 Ryder Lee 2018-11-13 2:08 ` [resend PATCH 2/3] pwm: mediatek: add pwm support for MT7629 SoC Ryder Lee 2018-11-15 19:20 ` Sean Wang 2018-11-13 2:08 ` [resend PATCH 3/3] dt-bindings: pwm: update bindings " Ryder Lee 2018-11-13 9:55 ` Uwe Kleine-König 2018-11-13 9:52 ` [resend PATCH 1/3] pwm: mediatek: drop flag 'has_clks' Uwe Kleine-König 2018-11-13 18:00 ` Stephen Boyd 2018-11-14 12:47 ` Thierry Reding 2018-11-14 13:27 ` John Crispin 2018-11-15 2:16 ` Ryder Lee [this message] 2018-11-16 6:47 ` Uwe Kleine-König 2018-11-16 10:22 ` Thierry Reding
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