From: Stephen Boyd <sboyd@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Neil Armstrong <narmstrong@baylibre.com>
Cc: Yixun Lan <yixun.lan@amlogic.com>,
Kevin Hilman <khilman@baylibre.com>,
Carlo Caione <carlo@caione.org>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Boris Brezillon <boris.brezillon@bootlin.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Liang Yang <liang.yang@amlogic.com>,
Jian Hu <jian.hu@amlogic.com>,
Qiufang Dai <qiufang.dai@amlogic.com>,
Hanjie Lin <hanjie.lin@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 2/4] clk: meson: add DT documentation for emmc clock controller
Date: Tue, 04 Dec 2018 11:25:15 -0800 [thread overview]
Message-ID: <154395151564.88331.17622786431747155066@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <b401f5bc-32e7-1693-0839-87ffa3dd5767@amlogic.com>
Quoting Jianxin Pan (2018-12-03 18:39:34)
> Hi Stephen,
>
> On 2018/12/4 6:45, Stephen Boyd wrote:
> > Quoting Jianxin Pan (2018-11-15 04:18:30)
> >> diff --git a/include/dt-bindings/clock/amlogic,mmc-clkc.h b/include/dt-bindings/clock/amlogic,mmc-clkc.h
> >> new file mode 100644
> >> index 0000000..162b949
> >> --- /dev/null
> >> +++ b/include/dt-bindings/clock/amlogic,mmc-clkc.h
> >> @@ -0,0 +1,17 @@
> >> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
> >> +/*
> >> + * Meson MMC sub clock tree IDs
> >> + *
> >> + * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
> >> + * Author: Yixun Lan <yixun.lan@amlogic.com>
> >> + */
> >> +
> >> +#ifndef __MMC_CLKC_H
> >> +#define __MMC_CLKC_H
> >> +
> >> +#define CLKID_MMC_DIV 1
> >
> > Why does the define numbering start with 1 instead of 0?
> >
> The Clock ID 0 is used by CLKID_MMC_MUX.
> CLKID_MMC_MUX is an internal clock which defined in drivers/clk/meson/mmc-clkc.c, and it's the parent of CLKID_MMC_DIV.
Ok, thanks.
next prev parent reply other threads:[~2018-12-04 19:25 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-15 12:18 [PATCH v7 0/4] clk: meson: add a sub EMMC clock controller support Jianxin Pan
2018-11-15 12:18 ` [PATCH v7 1/4] clk: meson: add emmc sub clock phase delay driver Jianxin Pan
2018-11-15 12:18 ` [PATCH v7 2/4] clk: meson: add DT documentation for emmc clock controller Jianxin Pan
2018-12-03 22:45 ` Stephen Boyd
2018-12-04 2:39 ` Jianxin Pan
2018-12-04 19:25 ` Stephen Boyd [this message]
2018-11-15 12:18 ` [PATCH v7 3/4] clk: meson: add sub MMC clock controller driver Jianxin Pan
2018-11-15 12:18 ` [PATCH v7 4/4] clk: meson: add one based divider support for sclk divider Jianxin Pan
2018-11-29 1:48 ` [PATCH v7 0/4] clk: meson: add a sub EMMC clock controller support Jianxin Pan
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