From: CK Hu <ck.hu@mediatek.com>
To: Yongqiang Niu <yongqiang.niu@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH 05/18] drm/mediatek: add ddp component CCORR
Date: Wed, 26 Dec 2018 13:27:10 +0800 [thread overview]
Message-ID: <1545802030.14496.25.camel@mtksdaap41> (raw)
In-Reply-To: <1545638931-24938-6-git-send-email-yongqiang.niu@mediatek.com>
Hi, Yongqiang:
On Mon, 2018-12-24 at 16:08 +0800, Yongqiang Niu wrote:
> This patch add ddp component CCORR
Reviewed-by: CK Hu <ck.hu@mediatek.com>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 32 +++++++++++++++++++++++++++++
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 ++
> 2 files changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 54ca794..310c0b9 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -41,6 +41,12 @@
> #define DISP_AAL_EN 0x0000
> #define DISP_AAL_SIZE 0x0030
>
> +#define DISP_CCORR_EN 0x0000
> +#define CCORR_EN BIT(0)
> +#define DISP_CCORR_CFG 0x0020
> +#define CCORR_RELAY_MODE BIT(0)
> +#define DISP_CCORR_SIZE 0x0030
> +
> #define DISP_GAMMA_EN 0x0000
> #define DISP_GAMMA_CFG 0x0020
> #define DISP_GAMMA_SIZE 0x0030
> @@ -131,6 +137,24 @@ static void mtk_aal_stop(struct mtk_ddp_comp *comp)
> writel_relaxed(0x0, comp->regs + DISP_AAL_EN);
> }
>
> +static void mtk_ccorr_config(struct mtk_ddp_comp *comp, unsigned int w,
> + unsigned int h, unsigned int vrefresh,
> + unsigned int bpc)
> +{
> + writel(h << 16 | w, comp->regs + DISP_CCORR_SIZE);
> + writel(CCORR_RELAY_MODE, comp->regs + DISP_CCORR_CFG);
> +}
> +
> +static void mtk_ccorr_start(struct mtk_ddp_comp *comp)
> +{
> + writel(CCORR_EN, comp->regs + DISP_CCORR_EN);
> +}
> +
> +static void mtk_ccorr_stop(struct mtk_ddp_comp *comp)
> +{
> + writel_relaxed(0x0, comp->regs + DISP_CCORR_EN);
> +}
> +
> static void mtk_gamma_config(struct mtk_ddp_comp *comp, unsigned int w,
> unsigned int h, unsigned int vrefresh,
> unsigned int bpc)
> @@ -179,6 +203,12 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp,
> .stop = mtk_aal_stop,
> };
>
> +static const struct mtk_ddp_comp_funcs ddp_ccorr = {
> + .config = mtk_ccorr_config,
> + .start = mtk_ccorr_start,
> + .stop = mtk_ccorr_stop,
> +};
> +
> static const struct mtk_ddp_comp_funcs ddp_gamma = {
> .gamma_set = mtk_gamma_set,
> .config = mtk_gamma_config,
> @@ -200,6 +230,7 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp,
> [MTK_DISP_RDMA] = "rdma",
> [MTK_DISP_WDMA] = "wdma",
> [MTK_DISP_COLOR] = "color",
> + [MTK_DISP_CCORR] = "ccorr",
> [MTK_DISP_AAL] = "aal",
> [MTK_DISP_GAMMA] = "gamma",
> [MTK_DISP_UFOE] = "ufoe",
> @@ -221,6 +252,7 @@ struct mtk_ddp_comp_match {
> [DDP_COMPONENT_AAL0] = { MTK_DISP_AAL, 0, &ddp_aal },
> [DDP_COMPONENT_AAL1] = { MTK_DISP_AAL, 1, &ddp_aal },
> [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL },
> + [DDP_COMPONENT_CCORR] = { MTK_DISP_CCORR, 0, &ddp_ccorr },
> [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, NULL },
> [DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, NULL },
> [DDP_COMPONENT_DPI0] = { MTK_DPI, 0, NULL },
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> index 8399229..87ef290 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> @@ -28,6 +28,7 @@ enum mtk_ddp_comp_type {
> MTK_DISP_RDMA,
> MTK_DISP_WDMA,
> MTK_DISP_COLOR,
> + MTK_DISP_CCORR,
> MTK_DISP_AAL,
> MTK_DISP_GAMMA,
> MTK_DISP_UFOE,
> @@ -44,6 +45,7 @@ enum mtk_ddp_comp_id {
> DDP_COMPONENT_AAL0,
> DDP_COMPONENT_AAL1,
> DDP_COMPONENT_BLS,
> + DDP_COMPONENT_CCORR,
> DDP_COMPONENT_COLOR0,
> DDP_COMPONENT_COLOR1,
> DDP_COMPONENT_DPI0,
next prev parent reply other threads:[~2018-12-26 5:27 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1545638931-24938-1-git-send-email-yongqiang.niu@mediatek.com>
[not found] ` <1545638931-24938-4-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25 3:57 ` [PATCH 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Nicolas Boichat
2019-03-15 2:06 ` Yongqiang Niu
2019-03-15 3:22 ` Nicolas Boichat
[not found] ` <1545638931-24938-11-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25 4:15 ` [PATCH 10/18] drm/mediatek: add gmc_bits for ovl private data Nicolas Boichat
2019-03-15 2:34 ` Yongqiang Niu
2019-03-15 3:26 ` Nicolas Boichat
[not found] ` <1545638931-24938-17-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25 4:19 ` [PATCH 16/18] drm/mediatek: add function mtk_ddp_comp_get_type Nicolas Boichat
[not found] ` <1545638931-24938-18-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25 4:22 ` [PATCH 17/18] drm/mediatek: add ovl0/ovl0_2l usecase Nicolas Boichat
[not found] ` <1545638931-24938-2-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 1:49 ` [PATCH 01/18] drm/mediatek: update dt-bindings for mt8183 CK Hu
[not found] ` <1545638931-24938-3-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 2:56 ` [PATCH 02/18] drm/mediatek: add mutex mod and sof into ddp private data CK Hu
[not found] ` <1545638931-24938-5-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 3:51 ` [PATCH 04/18] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel CK Hu
[not found] ` <1545638931-24938-6-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 5:27 ` CK Hu [this message]
[not found] ` <1545638931-24938-7-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 6:01 ` [PATCH 06/18] drm/mediatek: add mmsys private data for ddp path config CK Hu
[not found] ` <1545638931-24938-8-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 9:09 ` [PATCH 07/18] drm/mediatek: add commponent OVL0_2L CK Hu
[not found] ` <1545638931-24938-10-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 9:13 ` [PATCH 09/18] drm/mediatek: add component DITHER CK Hu
[not found] ` <1545638931-24938-12-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27 1:16 ` [PATCH 11/18] drm/medaitek: add layer_nr for ovl private data CK Hu
[not found] ` <1545638931-24938-14-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27 4:26 ` [PATCH 13/18] drm/mediatek: add ddp write register common api CK Hu
[not found] ` <1545638931-24938-15-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27 4:56 ` [PATCH 14/18] drm/mediatek: add connect function for ovl CK Hu
[not found] ` <1545638931-24938-16-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27 8:08 ` [PATCH 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data CK Hu
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