[PATCH] clk: imx: Fix fractional clock set rate computation

* [PATCH] clk: imx: Fix fractional clock set rate computation
@ 2019-01-18 12:54 Abel Vesa
  2019-01-24 19:17 ` Stephen Boyd
  0 siblings, 1 reply; 2+ messages in thread
From: Abel Vesa @ 2019-01-18 12:54 UTC (permalink / raw)
  To: Stephen Boyd, Lucas Stach
  Cc: Abel Vesa, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
	Fabio Estevam, dl-linux-imx, Michael Turquette,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	open list:COMMON CLK FRAMEWORK, open list

Before multiplying by PLL_FRAC_DENOM, the temp64 needs to be
 temp64 = rate * 2 - divfi * parent_rate * 8, instead of:
 temp64 = (rate * 2 - divfi) * parent_rate

Fixes: 6209624b9a5c1e ("clk: imx: Add fractional PLL output clock")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/clk/imx/clk-frac-pll.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/imx/clk-frac-pll.c b/drivers/clk/imx/clk-frac-pll.c
index 0026c39..76b9eb1 100644
--- a/drivers/clk/imx/clk-frac-pll.c
+++ b/drivers/clk/imx/clk-frac-pll.c
@@ -155,13 +155,14 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
 {
 	struct clk_frac_pll *pll = to_clk_frac_pll(hw);
 	u32 val, divfi, divff;
-	u64 temp64 = parent_rate;
+	u64 temp64;
 	int ret;
 
 	parent_rate *= 8;
 	rate *= 2;
 	divfi = rate / parent_rate;
-	temp64 *= rate - divfi;
+	temp64 = parent_rate * divfi;
+	temp64 = rate - temp64;
 	temp64 *= PLL_FRAC_DENOM;
 	do_div(temp64, parent_rate);
 	divff = temp64;
-- 
2.7.4


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