From: <Claudiu.Beznea@microchip.com>
To: <linus.walleij@linaro.org>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <Nicolas.Ferre@microchip.com>,
<alexandre.belloni@bootlin.com>,
<Ludovic.Desroches@microchip.com>
Cc: <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <Claudiu.Beznea@microchip.com>
Subject: [PATCH 5/7] dt-bindings: add bindings for SAM9X60
Date: Thu, 31 Jan 2019 12:29:40 +0000 [thread overview]
Message-ID: <1548937733-20189-6-git-send-email-claudiu.beznea@microchip.com> (raw)
In-Reply-To: <1548937733-20189-1-git-send-email-claudiu.beznea@microchip.com>
From: Claudiu Beznea <claudiu.beznea@microchip.com>
Add device tree binding for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index 40e33dfc36fd..c2d51ed86d47 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -19,7 +19,7 @@ such as pull-up, multi drive, etc.
Required properties for iomux controller:
- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
- or "atmel,sama5d3-pinctrl"
+ or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pictrl"
- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
configured in this periph mode. All the periph and bank need to be describe.
@@ -117,7 +117,8 @@ Some requirements for using atmel,at91rm9200-pinctrl binding:
4. The gpio controller must be describe in the pinctrl simple-bus.
For each bank the required properties are:
-- compatible: "atmel,at91sam9x5-gpio" or "atmel,at91rm9200-gpio"
+- compatible: "atmel,at91sam9x5-gpio" or "atmel,at91rm9200-gpio" or
+ "microchip,sam9x60-gpio"
- reg: physical base address and length of the controller's registers
- interrupts: interrupt outputs from the controller
- interrupt-controller: marks the device node as an interrupt controller
--
2.7.4
next prev parent reply other threads:[~2019-01-31 12:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-31 12:29 [PATCH 0/7] add support for SAM9X60 pin controller Claudiu.Beznea
2019-01-31 12:29 ` [PATCH 1/7] pinctrl: at91: add option to use drive strength bits Claudiu.Beznea
2019-01-31 12:29 ` [PATCH 2/7] pinctrl: at91: add drive strength support for SAM9X60 Claudiu.Beznea
2019-01-31 12:29 ` [PATCH 3/7] pinctrl: at91: add compatibles for SAM9X60 pin controller Claudiu.Beznea
2019-01-31 12:33 ` Ludovic Desroches
2019-01-31 16:16 ` Claudiu.Beznea
2019-01-31 12:29 ` [PATCH 4/7] dt-bindings: add documentation for banks Claudiu.Beznea
2019-01-31 12:29 ` Claudiu.Beznea [this message]
2019-01-31 12:36 ` [PATCH 5/7] dt-bindings: add bindings for SAM9X60 Ludovic Desroches
2019-01-31 12:29 ` [PATCH 6/7] pinctrl: at91: add slewrate support " Claudiu.Beznea
2019-01-31 12:29 ` [PATCH 7/7] dt-bindings: add documentation for slew rate Claudiu.Beznea
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