[PATCH v2 0/2] irqchip: stm32: fixes for config registers at init

[PATCH v2 0/2] irqchip: stm32: fixes for config registers at init

[Fabien Dessenne]

Here's a couple of fixes for the stm32 irqchip. The configuration set by the
remote processor is overwritten by the irqchip driver when it is intialized,
which is wrong.

v2: add the missing "don't clear rising/falling" patch

Fabien Dessenne (2):
  irqchip: stm32: don't clear rising/falling config registers at init
  irqchip: stm32: don't set rising configuration registers at init

 drivers/irqchip/irq-stm32-exti.c | 10 ----------
 1 file changed, 10 deletions(-)

-- 
2.7.4

[PATCH v2 1/2] irqchip: stm32: don't clear rising/falling config registers at init

[Fabien Dessenne]

falling and rising configuration and status registers are not banked.
As they are shared with M4 co-processor, they should not be cleared
at probe time, else M4 co-processor configuration will be lost.

Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
---
 drivers/irqchip/irq-stm32-exti.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index 6edfd4b..dab37fb 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -735,11 +735,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
 	 */
 	writel_relaxed(0, base + stm32_bank->imr_ofst);
 	writel_relaxed(0, base + stm32_bank->emr_ofst);
-	writel_relaxed(0, base + stm32_bank->rtsr_ofst);
-	writel_relaxed(0, base + stm32_bank->ftsr_ofst);
-	writel_relaxed(~0UL, base + stm32_bank->rpr_ofst);
-	if (stm32_bank->fpr_ofst != UNDEF_REG)
-		writel_relaxed(~0UL, base + stm32_bank->fpr_ofst);
 
 	pr_info("%pOF: bank%d\n", h_data->node, bank_idx);
 
-- 
2.7.4

Re: [PATCH v2 1/2] irqchip: stm32: don't clear rising/falling config registers at init

[Marc Zyngier]

On 07/03/2019 17:36, Fabien Dessenne wrote:
> falling and rising configuration and status registers are not banked.
> As they are shared with M4 co-processor, they should not be cleared
> at probe time, else M4 co-processor configuration will be lost.
> 
> Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
> Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
> ---
>  drivers/irqchip/irq-stm32-exti.c | 5 -----
>  1 file changed, 5 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
> index 6edfd4b..dab37fb 100644
> --- a/drivers/irqchip/irq-stm32-exti.c
> +++ b/drivers/irqchip/irq-stm32-exti.c
> @@ -735,11 +735,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
>  	 */
>  	writel_relaxed(0, base + stm32_bank->imr_ofst);
>  	writel_relaxed(0, base + stm32_bank->emr_ofst);
> -	writel_relaxed(0, base + stm32_bank->rtsr_ofst);
> -	writel_relaxed(0, base + stm32_bank->ftsr_ofst);
> -	writel_relaxed(~0UL, base + stm32_bank->rpr_ofst);
> -	if (stm32_bank->fpr_ofst != UNDEF_REG)
> -		writel_relaxed(~0UL, base + stm32_bank->fpr_ofst);
>  
>  	pr_info("%pOF: bank%d\n", h_data->node, bank_idx);
>  
> 

As for the initial patch, I'm asking for a "Fixes:" tag.

	M.
-- 
Jazz is not dead. It just smells funny...

[PATCH v2 2/2] irqchip: stm32: don't set rising configuration registers at init

[Fabien Dessenne]

The rising configuration status register (rtsr) is not banked.
As it is shared with the co-processor, it should not be written at probe
time, else the co-processor configuration will be lost.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
---
 drivers/irqchip/irq-stm32-exti.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index dab37fb..6b19bff 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
 	const struct stm32_exti_bank *stm32_bank;
 	struct stm32_exti_chip_data *chip_data;
 	void __iomem *base = h_data->base;
-	u32 irqs_mask;
 
 	stm32_bank = h_data->drv_data->exti_banks[bank_idx];
 	chip_data = &h_data->chips_data[bank_idx];
@@ -725,10 +724,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
 
 	raw_spin_lock_init(&chip_data->rlock);
 
-	/* Determine number of irqs supported */
-	writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
-	irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
-
 	/*
 	 * This IP has no reset, so after hot reboot we should
 	 * clear registers to avoid residue
-- 
2.7.4