* [PATCH] clk: imx6q: remove unsupported pll4_audio_div
@ 2019-03-10 23:18 Eric Nelson
2019-03-11 11:37 ` Lucas Stach
` (2 more replies)
0 siblings, 3 replies; 15+ messages in thread
From: Eric Nelson @ 2019-03-10 23:18 UTC (permalink / raw)
To: linux-clk
Cc: anson.huang, clement.peron, colin.didier, devicetree, festevam,
kernel, l.stach, linux-arm-kernel, linux-imx, linux-kernel,
mark.rutland, mturquette, robh+dt, s.hauer, sboyd, shawnguo,
tiny.windzz, Eric Nelson
The pll4_audio_div attempted to reflect one bit of a two-bit
divisor (AUDIO_DIV_LSB) in the CCM_ANALOG_MISC2 register.
Unfortunately, this divisor is non-functional at least on the
latest silicon revisions and has been removed from the reference
manual.
This is discussed in this NXP Community thread:
https://community.nxp.com/thread/462806
Remove the definition of pll4_audio_div to reflect this and
reparent the ssi, cko1, and ESAI/ASRC/SPDIF clocks to the
pll4_post_div clock.
Signed-off-by: Eric Nelson <eric@nelint.com>
---
drivers/clk/imx/clk-imx6q.c | 7 +-
include/dt-bindings/clock/imx6qdl-clock.h | 127 +++++++++++++++---------------
2 files changed, 66 insertions(+), 68 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 708e7c5..56d6ebb 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -32,7 +32,7 @@ static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
-static const char *audio_sels[] = { "pll4_audio_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
+static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
static const char *gpu_axi_sels[] = { "axi", "ahb", };
static const char *pre_axi_sels[] = { "axi", "ahb", };
static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
@@ -52,7 +52,7 @@ static const char *ipu2_di0_sels_2[] = { "ipu2_di0_pre", "dummy", "dummy", "ldb_
static const char *ipu2_di1_sels_2[] = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };
static const char *hsi_tx_sels[] = { "pll3_120m", "pll2_pfd2_396m", };
static const char *pcie_axi_sels[] = { "axi", "ahb", };
-static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_audio_div", };
+static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", };
static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
static const char *enfc_sels_2[] = {"pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", "pll3_pfd3_454m", "dummy", };
@@ -66,7 +66,7 @@ static const char *ecspi_sels[] = { "pll3_60m", "osc", };
static const char *can_sels[] = { "pll3_60m", "osc", "pll3_80m", };
static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
"video_27m", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",
- "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };
+ "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_post_div", };
static const char *cko2_sels[] = {
"mmdc_ch0_axi", "mmdc_ch1_axi", "usdhc4", "usdhc1",
"gpu2d_axi", "dummy", "ecspi_root", "gpu3d_axi",
@@ -607,7 +607,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
}
clk[IMX6QDL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
- clk[IMX6QDL_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", CLK_SET_RATE_PARENT, base + 0x170, 15, 1, 0, &imx_ccm_lock);
clk[IMX6QDL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
clk[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index b3cef29..dea23a9 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -213,69 +213,68 @@
#define IMX6QDL_CLK_CKO2 200
#define IMX6QDL_CLK_CKO 201
#define IMX6QDL_CLK_VDOA 202
-#define IMX6QDL_CLK_PLL4_AUDIO_DIV 203
-#define IMX6QDL_CLK_LVDS1_SEL 204
-#define IMX6QDL_CLK_LVDS2_SEL 205
-#define IMX6QDL_CLK_LVDS1_GATE 206
-#define IMX6QDL_CLK_LVDS2_GATE 207
-#define IMX6QDL_CLK_ESAI_IPG 208
-#define IMX6QDL_CLK_ESAI_MEM 209
-#define IMX6QDL_CLK_ASRC_IPG 210
-#define IMX6QDL_CLK_ASRC_MEM 211
-#define IMX6QDL_CLK_LVDS1_IN 212
-#define IMX6QDL_CLK_LVDS2_IN 213
-#define IMX6QDL_CLK_ANACLK1 214
-#define IMX6QDL_CLK_ANACLK2 215
-#define IMX6QDL_PLL1_BYPASS_SRC 216
-#define IMX6QDL_PLL2_BYPASS_SRC 217
-#define IMX6QDL_PLL3_BYPASS_SRC 218
-#define IMX6QDL_PLL4_BYPASS_SRC 219
-#define IMX6QDL_PLL5_BYPASS_SRC 220
-#define IMX6QDL_PLL6_BYPASS_SRC 221
-#define IMX6QDL_PLL7_BYPASS_SRC 222
-#define IMX6QDL_CLK_PLL1 223
-#define IMX6QDL_CLK_PLL2 224
-#define IMX6QDL_CLK_PLL3 225
-#define IMX6QDL_CLK_PLL4 226
-#define IMX6QDL_CLK_PLL5 227
-#define IMX6QDL_CLK_PLL6 228
-#define IMX6QDL_CLK_PLL7 229
-#define IMX6QDL_PLL1_BYPASS 230
-#define IMX6QDL_PLL2_BYPASS 231
-#define IMX6QDL_PLL3_BYPASS 232
-#define IMX6QDL_PLL4_BYPASS 233
-#define IMX6QDL_PLL5_BYPASS 234
-#define IMX6QDL_PLL6_BYPASS 235
-#define IMX6QDL_PLL7_BYPASS 236
-#define IMX6QDL_CLK_GPT_3M 237
-#define IMX6QDL_CLK_VIDEO_27M 238
-#define IMX6QDL_CLK_MIPI_CORE_CFG 239
-#define IMX6QDL_CLK_MIPI_IPG 240
-#define IMX6QDL_CLK_CAAM_MEM 241
-#define IMX6QDL_CLK_CAAM_ACLK 242
-#define IMX6QDL_CLK_CAAM_IPG 243
-#define IMX6QDL_CLK_SPDIF_GCLK 244
-#define IMX6QDL_CLK_UART_SEL 245
-#define IMX6QDL_CLK_IPG_PER_SEL 246
-#define IMX6QDL_CLK_ECSPI_SEL 247
-#define IMX6QDL_CLK_CAN_SEL 248
-#define IMX6QDL_CLK_MMDC_CH1_AXI_CG 249
-#define IMX6QDL_CLK_PRE0 250
-#define IMX6QDL_CLK_PRE1 251
-#define IMX6QDL_CLK_PRE2 252
-#define IMX6QDL_CLK_PRE3 253
-#define IMX6QDL_CLK_PRG0_AXI 254
-#define IMX6QDL_CLK_PRG1_AXI 255
-#define IMX6QDL_CLK_PRG0_APB 256
-#define IMX6QDL_CLK_PRG1_APB 257
-#define IMX6QDL_CLK_PRE_AXI 258
-#define IMX6QDL_CLK_MLB_SEL 259
-#define IMX6QDL_CLK_MLB_PODF 260
-#define IMX6QDL_CLK_EPIT1 261
-#define IMX6QDL_CLK_EPIT2 262
-#define IMX6QDL_CLK_MMDC_P0_IPG 263
-#define IMX6QDL_CLK_DCIC1 264
-#define IMX6QDL_CLK_DCIC2 265
-#define IMX6QDL_CLK_END 266
+#define IMX6QDL_CLK_LVDS1_SEL 203
+#define IMX6QDL_CLK_LVDS2_SEL 204
+#define IMX6QDL_CLK_LVDS1_GATE 205
+#define IMX6QDL_CLK_LVDS2_GATE 206
+#define IMX6QDL_CLK_ESAI_IPG 207
+#define IMX6QDL_CLK_ESAI_MEM 208
+#define IMX6QDL_CLK_ASRC_IPG 209
+#define IMX6QDL_CLK_ASRC_MEM 210
+#define IMX6QDL_CLK_LVDS1_IN 211
+#define IMX6QDL_CLK_LVDS2_IN 212
+#define IMX6QDL_CLK_ANACLK1 213
+#define IMX6QDL_CLK_ANACLK2 214
+#define IMX6QDL_PLL1_BYPASS_SRC 215
+#define IMX6QDL_PLL2_BYPASS_SRC 216
+#define IMX6QDL_PLL3_BYPASS_SRC 217
+#define IMX6QDL_PLL4_BYPASS_SRC 218
+#define IMX6QDL_PLL5_BYPASS_SRC 219
+#define IMX6QDL_PLL6_BYPASS_SRC 220
+#define IMX6QDL_PLL7_BYPASS_SRC 221
+#define IMX6QDL_CLK_PLL1 222
+#define IMX6QDL_CLK_PLL2 223
+#define IMX6QDL_CLK_PLL3 224
+#define IMX6QDL_CLK_PLL4 225
+#define IMX6QDL_CLK_PLL5 226
+#define IMX6QDL_CLK_PLL6 227
+#define IMX6QDL_CLK_PLL7 228
+#define IMX6QDL_PLL1_BYPASS 229
+#define IMX6QDL_PLL2_BYPASS 230
+#define IMX6QDL_PLL3_BYPASS 231
+#define IMX6QDL_PLL4_BYPASS 232
+#define IMX6QDL_PLL5_BYPASS 233
+#define IMX6QDL_PLL6_BYPASS 234
+#define IMX6QDL_PLL7_BYPASS 235
+#define IMX6QDL_CLK_GPT_3M 236
+#define IMX6QDL_CLK_VIDEO_27M 237
+#define IMX6QDL_CLK_MIPI_CORE_CFG 238
+#define IMX6QDL_CLK_MIPI_IPG 239
+#define IMX6QDL_CLK_CAAM_MEM 240
+#define IMX6QDL_CLK_CAAM_ACLK 241
+#define IMX6QDL_CLK_CAAM_IPG 242
+#define IMX6QDL_CLK_SPDIF_GCLK 243
+#define IMX6QDL_CLK_UART_SEL 244
+#define IMX6QDL_CLK_IPG_PER_SEL 245
+#define IMX6QDL_CLK_ECSPI_SEL 246
+#define IMX6QDL_CLK_CAN_SEL 247
+#define IMX6QDL_CLK_MMDC_CH1_AXI_CG 248
+#define IMX6QDL_CLK_PRE0 249
+#define IMX6QDL_CLK_PRE1 250
+#define IMX6QDL_CLK_PRE2 251
+#define IMX6QDL_CLK_PRE3 252
+#define IMX6QDL_CLK_PRG0_AXI 253
+#define IMX6QDL_CLK_PRG1_AXI 254
+#define IMX6QDL_CLK_PRG0_APB 255
+#define IMX6QDL_CLK_PRG1_APB 256
+#define IMX6QDL_CLK_PRE_AXI 257
+#define IMX6QDL_CLK_MLB_SEL 258
+#define IMX6QDL_CLK_MLB_PODF 259
+#define IMX6QDL_CLK_EPIT1 260
+#define IMX6QDL_CLK_EPIT2 261
+#define IMX6QDL_CLK_MMDC_P0_IPG 262
+#define IMX6QDL_CLK_DCIC1 263
+#define IMX6QDL_CLK_DCIC2 264
+#define IMX6QDL_CLK_END 265
#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH] clk: imx6q: remove unsupported pll4_audio_div
2019-03-10 23:18 [PATCH] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
@ 2019-03-11 11:37 ` Lucas Stach
2019-03-11 14:02 ` Eric Nelson
` (2 more replies)
2019-03-11 14:20 ` [PATCH] clk: imx6q: remove unsupported pll4_audio_div kbuild test robot
2019-03-13 7:43 ` kbuild test robot
2 siblings, 3 replies; 15+ messages in thread
From: Lucas Stach @ 2019-03-11 11:37 UTC (permalink / raw)
To: Eric Nelson, linux-clk
Cc: anson.huang, clement.peron, colin.didier, devicetree, festevam,
kernel, linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, sboyd, shawnguo, tiny.windzz
Hi Eric,
Am Sonntag, den 10.03.2019, 16:18 -0700 schrieb Eric Nelson:
> The pll4_audio_div attempted to reflect one bit of a two-bit
> divisor (AUDIO_DIV_LSB) in the CCM_ANALOG_MISC2 register.
>
> Unfortunately, this divisor is non-functional at least on the
> latest silicon revisions and has been removed from the reference
> manual.
>
> This is discussed in this NXP Community thread:
>
> https://community.nxp.com/thread/462806
>
> Remove the definition of pll4_audio_div to reflect this and
> reparent the ssi, cko1, and ESAI/ASRC/SPDIF clocks to the
> pll4_post_div clock.
>
> > Signed-off-by: Eric Nelson <eric@nelint.com>
> ---
> drivers/clk/imx/clk-imx6q.c | 7 +-
> include/dt-bindings/clock/imx6qdl-clock.h | 127 +++++++++++++++---------------
> 2 files changed, 66 insertions(+), 68 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
> index 708e7c5..56d6ebb 100644
> --- a/drivers/clk/imx/clk-imx6q.c
> +++ b/drivers/clk/imx/clk-imx6q.c
> > @@ -32,7 +32,7 @@ static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
> > static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
> > static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
> > static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
> > -static const char *audio_sels[] = { "pll4_audio_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
> > +static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
> > static const char *gpu_axi_sels[] = { "axi", "ahb", };
> > static const char *pre_axi_sels[] = { "axi", "ahb", };
> > static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
> > @@ -52,7 +52,7 @@ static const char *ipu2_di0_sels_2[] = { "ipu2_di0_pre", "dummy", "dummy", "ldb_
> > static const char *ipu2_di1_sels_2[] = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };
> > static const char *hsi_tx_sels[] = { "pll3_120m", "pll2_pfd2_396m", };
> > static const char *pcie_axi_sels[] = { "axi", "ahb", };
> > -static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_audio_div", };
> > +static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", };
> > static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
> > static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
> static const char *enfc_sels_2[] = {"pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", "pll3_pfd3_454m", "dummy", };
> @@ -66,7 +66,7 @@ static const char *ecspi_sels[] = { "pll3_60m", "osc", };
> static const char *can_sels[] = { "pll3_60m", "osc", "pll3_80m", };
> > static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
> > "video_27m", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",
> > - "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };
> > + "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_post_div", };
> static const char *cko2_sels[] = {
> > "mmdc_ch0_axi", "mmdc_ch1_axi", "usdhc4", "usdhc1",
> > "gpu2d_axi", "dummy", "ecspi_root", "gpu3d_axi",
> @@ -607,7 +607,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> > }
>
> > clk[IMX6QDL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
> > - clk[IMX6QDL_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", CLK_SET_RATE_PARENT, base + 0x170, 15, 1, 0, &imx_ccm_lock);
> > clk[IMX6QDL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
> > clk[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
>
> diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
> index b3cef29..dea23a9 100644
> --- a/include/dt-bindings/clock/imx6qdl-clock.h
> +++ b/include/dt-bindings/clock/imx6qdl-clock.h
> @@ -213,69 +213,68 @@
> > #define IMX6QDL_CLK_CKO2 200
> > #define IMX6QDL_CLK_CKO 201
> > #define IMX6QDL_CLK_VDOA 202
> > -#define IMX6QDL_CLK_PLL4_AUDIO_DIV 203
> > -#define IMX6QDL_CLK_LVDS1_SEL 204
> > -#define IMX6QDL_CLK_LVDS2_SEL 205
> > -#define IMX6QDL_CLK_LVDS1_GATE 206
> > -#define IMX6QDL_CLK_LVDS2_GATE 207
> > -#define IMX6QDL_CLK_ESAI_IPG 208
> > -#define IMX6QDL_CLK_ESAI_MEM 209
> > -#define IMX6QDL_CLK_ASRC_IPG 210
> > -#define IMX6QDL_CLK_ASRC_MEM 211
> > -#define IMX6QDL_CLK_LVDS1_IN 212
> > -#define IMX6QDL_CLK_LVDS2_IN 213
> > -#define IMX6QDL_CLK_ANACLK1 214
> > -#define IMX6QDL_CLK_ANACLK2 215
> > -#define IMX6QDL_PLL1_BYPASS_SRC 216
> > -#define IMX6QDL_PLL2_BYPASS_SRC 217
> > -#define IMX6QDL_PLL3_BYPASS_SRC 218
> > -#define IMX6QDL_PLL4_BYPASS_SRC 219
> > -#define IMX6QDL_PLL5_BYPASS_SRC 220
> > -#define IMX6QDL_PLL6_BYPASS_SRC 221
> > -#define IMX6QDL_PLL7_BYPASS_SRC 222
> > -#define IMX6QDL_CLK_PLL1 223
> > -#define IMX6QDL_CLK_PLL2 224
> > -#define IMX6QDL_CLK_PLL3 225
> > -#define IMX6QDL_CLK_PLL4 226
> > -#define IMX6QDL_CLK_PLL5 227
> > -#define IMX6QDL_CLK_PLL6 228
> > -#define IMX6QDL_CLK_PLL7 229
> > -#define IMX6QDL_PLL1_BYPASS 230
> > -#define IMX6QDL_PLL2_BYPASS 231
> > -#define IMX6QDL_PLL3_BYPASS 232
> > -#define IMX6QDL_PLL4_BYPASS 233
> > -#define IMX6QDL_PLL5_BYPASS 234
> > -#define IMX6QDL_PLL6_BYPASS 235
> > -#define IMX6QDL_PLL7_BYPASS 236
> > -#define IMX6QDL_CLK_GPT_3M 237
> > -#define IMX6QDL_CLK_VIDEO_27M 238
> > -#define IMX6QDL_CLK_MIPI_CORE_CFG 239
> > -#define IMX6QDL_CLK_MIPI_IPG 240
> > -#define IMX6QDL_CLK_CAAM_MEM 241
> > -#define IMX6QDL_CLK_CAAM_ACLK 242
> > -#define IMX6QDL_CLK_CAAM_IPG 243
> > -#define IMX6QDL_CLK_SPDIF_GCLK 244
> > -#define IMX6QDL_CLK_UART_SEL 245
> > -#define IMX6QDL_CLK_IPG_PER_SEL 246
> > -#define IMX6QDL_CLK_ECSPI_SEL 247
> > -#define IMX6QDL_CLK_CAN_SEL 248
> > -#define IMX6QDL_CLK_MMDC_CH1_AXI_CG 249
> > -#define IMX6QDL_CLK_PRE0 250
> > -#define IMX6QDL_CLK_PRE1 251
> > -#define IMX6QDL_CLK_PRE2 252
> > -#define IMX6QDL_CLK_PRE3 253
> > -#define IMX6QDL_CLK_PRG0_AXI 254
> > -#define IMX6QDL_CLK_PRG1_AXI 255
> > -#define IMX6QDL_CLK_PRG0_APB 256
> > -#define IMX6QDL_CLK_PRG1_APB 257
> > -#define IMX6QDL_CLK_PRE_AXI 258
> > -#define IMX6QDL_CLK_MLB_SEL 259
> > -#define IMX6QDL_CLK_MLB_PODF 260
> > -#define IMX6QDL_CLK_EPIT1 261
> > -#define IMX6QDL_CLK_EPIT2 262
> > -#define IMX6QDL_CLK_MMDC_P0_IPG 263
> > -#define IMX6QDL_CLK_DCIC1 264
> > -#define IMX6QDL_CLK_DCIC2 265
> > -#define IMX6QDL_CLK_END 266
> > +#define IMX6QDL_CLK_LVDS1_SEL 203
> > +#define IMX6QDL_CLK_LVDS2_SEL 204
> > +#define IMX6QDL_CLK_LVDS1_GATE 205
> > +#define IMX6QDL_CLK_LVDS2_GATE 206
> > +#define IMX6QDL_CLK_ESAI_IPG 207
> > +#define IMX6QDL_CLK_ESAI_MEM 208
> > +#define IMX6QDL_CLK_ASRC_IPG 209
> > +#define IMX6QDL_CLK_ASRC_MEM 210
> > +#define IMX6QDL_CLK_LVDS1_IN 211
> > +#define IMX6QDL_CLK_LVDS2_IN 212
> > +#define IMX6QDL_CLK_ANACLK1 213
> > +#define IMX6QDL_CLK_ANACLK2 214
> > +#define IMX6QDL_PLL1_BYPASS_SRC 215
> > +#define IMX6QDL_PLL2_BYPASS_SRC 216
> > +#define IMX6QDL_PLL3_BYPASS_SRC 217
> > +#define IMX6QDL_PLL4_BYPASS_SRC 218
> > +#define IMX6QDL_PLL5_BYPASS_SRC 219
> > +#define IMX6QDL_PLL6_BYPASS_SRC 220
> > +#define IMX6QDL_PLL7_BYPASS_SRC 221
> > +#define IMX6QDL_CLK_PLL1 222
> > +#define IMX6QDL_CLK_PLL2 223
> > +#define IMX6QDL_CLK_PLL3 224
> > +#define IMX6QDL_CLK_PLL4 225
> > +#define IMX6QDL_CLK_PLL5 226
> > +#define IMX6QDL_CLK_PLL6 227
> > +#define IMX6QDL_CLK_PLL7 228
> > +#define IMX6QDL_PLL1_BYPASS 229
> > +#define IMX6QDL_PLL2_BYPASS 230
> > +#define IMX6QDL_PLL3_BYPASS 231
> > +#define IMX6QDL_PLL4_BYPASS 232
> > +#define IMX6QDL_PLL5_BYPASS 233
> > +#define IMX6QDL_PLL6_BYPASS 234
> > +#define IMX6QDL_PLL7_BYPASS 235
> > +#define IMX6QDL_CLK_GPT_3M 236
> > +#define IMX6QDL_CLK_VIDEO_27M 237
> > +#define IMX6QDL_CLK_MIPI_CORE_CFG 238
> > +#define IMX6QDL_CLK_MIPI_IPG 239
> > +#define IMX6QDL_CLK_CAAM_MEM 240
> > +#define IMX6QDL_CLK_CAAM_ACLK 241
> > +#define IMX6QDL_CLK_CAAM_IPG 242
> > +#define IMX6QDL_CLK_SPDIF_GCLK 243
> > +#define IMX6QDL_CLK_UART_SEL 244
> > +#define IMX6QDL_CLK_IPG_PER_SEL 245
> > +#define IMX6QDL_CLK_ECSPI_SEL 246
> > +#define IMX6QDL_CLK_CAN_SEL 247
> > +#define IMX6QDL_CLK_MMDC_CH1_AXI_CG 248
> > +#define IMX6QDL_CLK_PRE0 249
> > +#define IMX6QDL_CLK_PRE1 250
> > +#define IMX6QDL_CLK_PRE2 251
> > +#define IMX6QDL_CLK_PRE3 252
> > +#define IMX6QDL_CLK_PRG0_AXI 253
> > +#define IMX6QDL_CLK_PRG1_AXI 254
> > +#define IMX6QDL_CLK_PRG0_APB 255
> > +#define IMX6QDL_CLK_PRG1_APB 256
> > +#define IMX6QDL_CLK_PRE_AXI 257
> > +#define IMX6QDL_CLK_MLB_SEL 258
> > +#define IMX6QDL_CLK_MLB_PODF 259
> > +#define IMX6QDL_CLK_EPIT1 260
> > +#define IMX6QDL_CLK_EPIT2 261
> > +#define IMX6QDL_CLK_MMDC_P0_IPG 262
> > +#define IMX6QDL_CLK_DCIC1 263
> > +#define IMX6QDL_CLK_DCIC2 264
> > +#define IMX6QDL_CLK_END 265
You can not renumber the DT clock defines, as this breaks DT backward
compatibility. You can however remove IMX6QDL_CLK_PLL4_AUDIO_DIV and
leave a hole in the numbers, maybe with a comment about why it exists.
Regards,
Lucas
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] clk: imx6q: remove unsupported pll4_audio_div
2019-03-11 11:37 ` Lucas Stach
@ 2019-03-11 14:02 ` Eric Nelson
2019-03-11 15:39 ` [V2 0/2] ARM: imx6qdl: remove PLL4_AUDIO_DIV clock Eric Nelson
2019-03-11 15:59 ` Eric Nelson
2 siblings, 0 replies; 15+ messages in thread
From: Eric Nelson @ 2019-03-11 14:02 UTC (permalink / raw)
To: Lucas Stach, linux-clk
Cc: anson.huang, clement.peron, colin.didier, devicetree, festevam,
kernel, linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, sboyd, shawnguo, tiny.windzz
Hi Lucas,
On 3/11/19 4:37 AM, Lucas Stach wrote:
> Hi Eric,
>
> Am Sonntag, den 10.03.2019, 16:18 -0700 schrieb Eric Nelson:
>> The pll4_audio_div attempted to reflect one bit of a two-bit
>> divisor (AUDIO_DIV_LSB) in the CCM_ANALOG_MISC2 register.
>>
>> Unfortunately, this divisor is non-functional at least on the
>> latest silicon revisions and has been removed from the reference
>> manual.
>>
>> This is discussed in this NXP Community thread:
>>
>> https://community.nxp.com/thread/462806
>>
>> Remove the definition of pll4_audio_div to reflect this and
>> reparent the ssi, cko1, and ESAI/ASRC/SPDIF clocks to the
>> pll4_post_div clock.
>>
>>> Signed-off-by: Eric Nelson <eric@nelint.com>
>> ---
>> drivers/clk/imx/clk-imx6q.c | 7 +-
>> include/dt-bindings/clock/imx6qdl-clock.h | 127 +++++++++++++++---------------
>> 2 files changed, 66 insertions(+), 68 deletions(-)
>>
<snip>
>>
>> diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
>> index b3cef29..dea23a9 100644
>> --- a/include/dt-bindings/clock/imx6qdl-clock.h
>> +++ b/include/dt-bindings/clock/imx6qdl-clock.h
>> @@ -213,69 +213,68 @@
>>> #define IMX6QDL_CLK_CKO2 200
>>> #define IMX6QDL_CLK_CKO 201
>>> #define IMX6QDL_CLK_VDOA 202
>>> -#define IMX6QDL_CLK_PLL4_AUDIO_DIV 203
>>> -#define IMX6QDL_CLK_LVDS1_SEL 204
<snip>
>>> +#define IMX6QDL_CLK_LVDS1_SEL 203
>>> +#define IMX6QDL_CLK_LVDS2_SEL 204
>>> +#define IMX6QDL_CLK_LVDS1_GATE 205
<snip>
>
> You can not renumber the DT clock defines, as this breaks DT backward
> compatibility. You can however remove IMX6QDL_CLK_PLL4_AUDIO_DIV and
> leave a hole in the numbers, maybe with a comment about why it exists.
>
Okay. I wasn't aware of this requirement, and I'll send a V2.
It will also make the patch much smaller!
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] clk: imx6q: remove unsupported pll4_audio_div
2019-03-10 23:18 [PATCH] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
2019-03-11 11:37 ` Lucas Stach
@ 2019-03-11 14:20 ` kbuild test robot
2019-03-13 7:43 ` kbuild test robot
2 siblings, 0 replies; 15+ messages in thread
From: kbuild test robot @ 2019-03-11 14:20 UTC (permalink / raw)
To: Eric Nelson
Cc: kbuild-all, linux-clk, anson.huang, clement.peron, colin.didier,
devicetree, festevam, kernel, l.stach, linux-arm-kernel,
linux-imx, linux-kernel, mark.rutland, mturquette, robh+dt,
s.hauer, sboyd, shawnguo, tiny.windzz, Eric Nelson
[-- Attachment #1: Type: text/plain, Size: 1351 bytes --]
Hi Eric,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on v5.0 next-20190306]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Eric-Nelson/clk-imx6q-remove-unsupported-pll4_audio_div/20190311-171723
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 8.2.0-11) 8.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.2.0 make.cross ARCH=arm
All errors (new ones prefixed by >>):
>> Error: arch/arm/boot/dts/imx6qdl-sabreauto.dtsi:287.34-35 syntax error
FATAL ERROR: Unable to parse input tree
--
>> Error: arch/arm/boot/dts/imx6q-cm-fx6.dts:451.11-12 syntax error
FATAL ERROR: Unable to parse input tree
--
>> Error: arch/arm/boot/dts/imx6q-novena.dts:421.14-15 syntax error
FATAL ERROR: Unable to parse input tree
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 68405 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* [V2 0/2] ARM: imx6qdl: remove PLL4_AUDIO_DIV clock
2019-03-11 11:37 ` Lucas Stach
2019-03-11 14:02 ` Eric Nelson
@ 2019-03-11 15:39 ` Eric Nelson
2019-03-11 15:59 ` Eric Nelson
2 siblings, 0 replies; 15+ messages in thread
From: Eric Nelson @ 2019-03-11 15:39 UTC (permalink / raw)
To: devicetree, linux-clk
Cc: anson.huang, colin.didier, festevam, kernel, l.stach,
linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, sboyd, shawnguo, tiny.windzz,
Eric Nelson
This series removes the unsupported PLL4_AUDIO_DIV clock which appeared
in early versions of the i.MX6DQ reference manual, but doesn't function
as described in the current clock driver (i.e., it's a divide-by-1).
Since the clock node is also used to control the topology of the clock
tree, the PLL4_POST_DIV node is used to control parenting of downstream
SSI, CKO1, and ESAI/ASRC/SPDIF peripherals.
The first patch removes the clock, and the second updates several
device tree files to use PLL4_POST_DIV to select proper parents.
Eric Nelson (2):
clk: imx6q: remove unsupported pll4_audio_div
ARM: dts: imx6q: remove references to PLL4_AUDIO_DIV
arch/arm/boot/dts/imx6q-cm-fx6.dts | 4 ++--
arch/arm/boot/dts/imx6q-novena.dts | 2 +-
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +-
drivers/clk/imx/clk-imx6q.c | 7 +++----
include/dt-bindings/clock/imx6qdl-clock.h | 10 +++++++++-
5 files changed, 16 insertions(+), 9 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 15+ messages in thread
* [V2 0/2] ARM: imx6qdl: remove PLL4_AUDIO_DIV clock
2019-03-11 11:37 ` Lucas Stach
2019-03-11 14:02 ` Eric Nelson
2019-03-11 15:39 ` [V2 0/2] ARM: imx6qdl: remove PLL4_AUDIO_DIV clock Eric Nelson
@ 2019-03-11 15:59 ` Eric Nelson
2019-03-11 15:59 ` [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
2019-03-11 15:59 ` [PATCH 2/2] ARM: dts: imx6q: remove references to PLL4_AUDIO_DIV Eric Nelson
2 siblings, 2 replies; 15+ messages in thread
From: Eric Nelson @ 2019-03-11 15:59 UTC (permalink / raw)
To: devicetree, linux-clk
Cc: anson.huang, colin.didier, festevam, kernel, l.stach,
linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, sboyd, shawnguo, tiny.windzz,
Eric Nelson
This series removes the unsupported PLL4_AUDIO_DIV clock which appeared
in early versions of the i.MX6DQ reference manual, but doesn't function
as described in the current clock driver (i.e., it's a divide-by-1).
Since the clock node is also used to control the topology of the clock
tree, the PLL4_POST_DIV node is used to control parenting of downstream
SSI, CKO1, and ESAI/ASRC/SPDIF peripherals.
The first patch removes the clock, and the second updates several
device tree files to use PLL4_POST_DIV to select proper parents.
Eric Nelson (2):
clk: imx6q: remove unsupported pll4_audio_div
ARM: dts: imx6q: remove references to PLL4_AUDIO_DIV
arch/arm/boot/dts/imx6q-cm-fx6.dts | 4 ++--
arch/arm/boot/dts/imx6q-novena.dts | 2 +-
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +-
drivers/clk/imx/clk-imx6q.c | 7 +++----
include/dt-bindings/clock/imx6qdl-clock.h | 10 +++++++++-
5 files changed, 16 insertions(+), 9 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 15+ messages in thread
* [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div
2019-03-11 15:59 ` Eric Nelson
@ 2019-03-11 15:59 ` Eric Nelson
2019-03-11 16:38 ` Fabio Estevam
` (2 more replies)
2019-03-11 15:59 ` [PATCH 2/2] ARM: dts: imx6q: remove references to PLL4_AUDIO_DIV Eric Nelson
1 sibling, 3 replies; 15+ messages in thread
From: Eric Nelson @ 2019-03-11 15:59 UTC (permalink / raw)
To: devicetree, linux-clk
Cc: anson.huang, colin.didier, festevam, kernel, l.stach,
linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, sboyd, shawnguo, tiny.windzz,
Eric Nelson
The pll4_audio_div attempted to reflect one bit of a two-bit
divisor (AUDIO_DIV_LSB) in the CCM_ANALOG_MISC2 register.
Unfortunately, this divisor is non-functional at least on the
latest silicon revisions and has been removed from the reference
manual.
This is discussed in this NXP Community thread:
https://community.nxp.com/thread/462806
Remove the definition of pll4_audio_div to reflect this and
reparent the ssi, cko1, and ESAI/ASRC/SPDIF clocks to the
pll4_post_div clock.
Signed-off-by: Eric Nelson <eric@nelint.com>
---
Changes in v2:
* Keep numbering of clock array as suggested by Lucas Stach
* Sent as series with updates to several device tree files
* Expanded cc list to include maintainers of device trees
drivers/clk/imx/clk-imx6q.c | 7 +++----
include/dt-bindings/clock/imx6qdl-clock.h | 10 +++++++++-
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 708e7c5..56d6ebb 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -32,7 +32,7 @@ static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
-static const char *audio_sels[] = { "pll4_audio_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
+static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
static const char *gpu_axi_sels[] = { "axi", "ahb", };
static const char *pre_axi_sels[] = { "axi", "ahb", };
static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
@@ -52,7 +52,7 @@ static const char *ipu2_di0_sels_2[] = { "ipu2_di0_pre", "dummy", "dummy", "ldb_
static const char *ipu2_di1_sels_2[] = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };
static const char *hsi_tx_sels[] = { "pll3_120m", "pll2_pfd2_396m", };
static const char *pcie_axi_sels[] = { "axi", "ahb", };
-static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_audio_div", };
+static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", };
static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
static const char *enfc_sels_2[] = {"pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", "pll3_pfd3_454m", "dummy", };
@@ -66,7 +66,7 @@ static const char *ecspi_sels[] = { "pll3_60m", "osc", };
static const char *can_sels[] = { "pll3_60m", "osc", "pll3_80m", };
static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
"video_27m", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",
- "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };
+ "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_post_div", };
static const char *cko2_sels[] = {
"mmdc_ch0_axi", "mmdc_ch1_axi", "usdhc4", "usdhc1",
"gpu2d_axi", "dummy", "ecspi_root", "gpu3d_axi",
@@ -607,7 +607,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
}
clk[IMX6QDL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
- clk[IMX6QDL_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", CLK_SET_RATE_PARENT, base + 0x170, 15, 1, 0, &imx_ccm_lock);
clk[IMX6QDL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
clk[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index b3cef29..34bb14d 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -213,7 +213,15 @@
#define IMX6QDL_CLK_CKO2 200
#define IMX6QDL_CLK_CKO 201
#define IMX6QDL_CLK_VDOA 202
-#define IMX6QDL_CLK_PLL4_AUDIO_DIV 203
+
+/* The PLL4_AUDIO_DIV divider only appeared in
+ * early versions of the reference manual.
+ *
+ * Renamed to _BROKEN to prevent inadvertent use,
+ * but reserved the array slot to maintain DT binary
+ * compatibility.
+ */
+#define IMX6QDL_CLK_PLL4_AUDIO_DIV_BROKEN 203
#define IMX6QDL_CLK_LVDS1_SEL 204
#define IMX6QDL_CLK_LVDS2_SEL 205
#define IMX6QDL_CLK_LVDS1_GATE 206
--
2.7.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/2] ARM: dts: imx6q: remove references to PLL4_AUDIO_DIV
2019-03-11 15:59 ` Eric Nelson
2019-03-11 15:59 ` [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
@ 2019-03-11 15:59 ` Eric Nelson
2019-03-11 16:39 ` Fabio Estevam
1 sibling, 1 reply; 15+ messages in thread
From: Eric Nelson @ 2019-03-11 15:59 UTC (permalink / raw)
To: devicetree, linux-clk
Cc: anson.huang, colin.didier, festevam, kernel, l.stach,
linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, sboyd, shawnguo, tiny.windzz,
Eric Nelson
Since we removed the PLL4_AUDIO_DIV clock, we need to replace
any references to it in the device tree with PLL4_POST_DIV to
keep the proper parents.
Signed-off-by: Eric Nelson <eric@nelint.com>
---
arch/arm/boot/dts/imx6q-cm-fx6.dts | 4 ++--
arch/arm/boot/dts/imx6q-novena.dts | 2 +-
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
index cab9e92..ef2cce5 100644
--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
@@ -448,8 +448,8 @@
&ssi2 {
assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
- <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
- assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
+ <&clks IMX6QDL_CLK_PLL4_POST_DIV>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_POST_DIV>;
assigned-clock-rates = <0>, <786432000>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6q-novena.dts b/arch/arm/boot/dts/imx6q-novena.dts
index 61347a5..82cf8a7 100644
--- a/arch/arm/boot/dts/imx6q-novena.dts
+++ b/arch/arm/boot/dts/imx6q-novena.dts
@@ -418,7 +418,7 @@
<&clks IMX6QDL_CLK_PLL4_AUDIO>,
<&clks IMX6QDL_CLK_CKO1>;
assigned-clock-parents = <&clks IMX6QDL_CLK_CKO1>,
- <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>,
+ <&clks IMX6QDL_CLK_PLL4_POST_DIV>,
<&clks IMX6QDL_CLK_OSC>,
<&clks IMX6QDL_CLK_CKO1_PODF>;
assigned-clock-rates = <0 0 722534400 22579200>;
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 1280de5..9d4bd57 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -284,7 +284,7 @@
pinctrl-0 = <&pinctrl_esai>;
assigned-clocks = <&clks IMX6QDL_CLK_ESAI_SEL>,
<&clks IMX6QDL_CLK_ESAI_EXTAL>;
- assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_POST_DIV>;
assigned-clock-rates = <0>, <24576000>;
status = "okay";
};
--
2.7.4
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div
2019-03-11 15:59 ` [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
@ 2019-03-11 16:38 ` Fabio Estevam
2019-03-11 18:35 ` Stephen Boyd
2019-03-11 20:48 ` Eric Nelson
2 siblings, 0 replies; 15+ messages in thread
From: Fabio Estevam @ 2019-03-11 16:38 UTC (permalink / raw)
To: Eric Nelson
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-clk, Yongcai Huang, Colin Didier, Sascha Hauer,
Lucas Stach,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
NXP Linux Team, linux-kernel, Mark Rutland, Michael Turquette,
Rob Herring, Sascha Hauer, Stephen Boyd, Shawn Guo, tiny.windzz
On Mon, Mar 11, 2019 at 1:02 PM Eric Nelson <eric@nelint.com> wrote:
>
> The pll4_audio_div attempted to reflect one bit of a two-bit
> divisor (AUDIO_DIV_LSB) in the CCM_ANALOG_MISC2 register.
>
> Unfortunately, this divisor is non-functional at least on the
> latest silicon revisions and has been removed from the reference
> manual.
>
> This is discussed in this NXP Community thread:
>
> https://community.nxp.com/thread/462806
>
> Remove the definition of pll4_audio_div to reflect this and
> reparent the ssi, cko1, and ESAI/ASRC/SPDIF clocks to the
> pll4_post_div clock.
>
> Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/2] ARM: dts: imx6q: remove references to PLL4_AUDIO_DIV
2019-03-11 15:59 ` [PATCH 2/2] ARM: dts: imx6q: remove references to PLL4_AUDIO_DIV Eric Nelson
@ 2019-03-11 16:39 ` Fabio Estevam
0 siblings, 0 replies; 15+ messages in thread
From: Fabio Estevam @ 2019-03-11 16:39 UTC (permalink / raw)
To: Eric Nelson
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-clk, Yongcai Huang, Colin Didier, Sascha Hauer,
Lucas Stach,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
NXP Linux Team, linux-kernel, Mark Rutland, Michael Turquette,
Rob Herring, Sascha Hauer, Stephen Boyd, Shawn Guo, tiny.windzz
On Mon, Mar 11, 2019 at 1:02 PM Eric Nelson <eric@nelint.com> wrote:
>
> Since we removed the PLL4_AUDIO_DIV clock, we need to replace
> any references to it in the device tree with PLL4_POST_DIV to
> keep the proper parents.
>
> Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div
2019-03-11 15:59 ` [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
2019-03-11 16:38 ` Fabio Estevam
@ 2019-03-11 18:35 ` Stephen Boyd
2019-03-11 20:48 ` Eric Nelson
2 siblings, 0 replies; 15+ messages in thread
From: Stephen Boyd @ 2019-03-11 18:35 UTC (permalink / raw)
To: Eric Nelson, devicetree, linux-clk
Cc: anson.huang, colin.didier, festevam, kernel, l.stach,
linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, shawnguo, tiny.windzz, Eric Nelson
Quoting Eric Nelson (2019-03-11 08:59:56)
> diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
> index b3cef29..34bb14d 100644
> --- a/include/dt-bindings/clock/imx6qdl-clock.h
> +++ b/include/dt-bindings/clock/imx6qdl-clock.h
> @@ -213,7 +213,15 @@
> #define IMX6QDL_CLK_CKO2 200
> #define IMX6QDL_CLK_CKO 201
> #define IMX6QDL_CLK_VDOA 202
> -#define IMX6QDL_CLK_PLL4_AUDIO_DIV 203
> +
> +/* The PLL4_AUDIO_DIV divider only appeared in
> + * early versions of the reference manual.
> + *
> + * Renamed to _BROKEN to prevent inadvertent use,
> + * but reserved the array slot to maintain DT binary
> + * compatibility.
> + */
> +#define IMX6QDL_CLK_PLL4_AUDIO_DIV_BROKEN 203
But it breaks the build. I don't get it. Just add a comment indicating
it shouldn't be used? That breaks the cross-tree dependency chain and
lets clk tree merge the clk driver part and arm-soc merge the dts part.
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div
2019-03-11 15:59 ` [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
2019-03-11 16:38 ` Fabio Estevam
2019-03-11 18:35 ` Stephen Boyd
@ 2019-03-11 20:48 ` Eric Nelson
2019-03-18 20:25 ` Stephen Boyd
2 siblings, 1 reply; 15+ messages in thread
From: Eric Nelson @ 2019-03-11 20:48 UTC (permalink / raw)
To: devicetree, linux-clk
Cc: anson.huang, colin.didier, festevam, kernel, l.stach,
linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, sboyd, shawnguo, tiny.windzz
> On March 11, 2019, 6:35 p.m. UTC, Stephen Boyd wrote:
>
> Quoting Eric Nelson (2019-03-11 08:59:56)
>> diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
>> index b3cef29..34bb14d 100644
>> --- a/include/dt-bindings/clock/imx6qdl-clock.h
>> +++ b/include/dt-bindings/clock/imx6qdl-clock.h
>> @@ -213,7 +213,15 @@
>> #define IMX6QDL_CLK_CKO2 200
>> #define IMX6QDL_CLK_CKO 201
>> #define IMX6QDL_CLK_VDOA 202
>> -#define IMX6QDL_CLK_PLL4_AUDIO_DIV 203
>> +
>> +/* The PLL4_AUDIO_DIV divider only appeared in
>> + * early versions of the reference manual.
>> + *
>> + * Renamed to _BROKEN to prevent inadvertent use,
>> + * but reserved the array slot to maintain DT binary
>> + * compatibility.
>> + */
>> +#define IMX6QDL_CLK_PLL4_AUDIO_DIV_BROKEN 203
>
> But it breaks the build. I don't get it. Just add a comment indicating
> it shouldn't be used? That breaks the cross-tree dependency chain and
> lets clk tree merge the clk driver part and arm-soc merge the dts part.
The device tree update also requires the update to clk-imx6q.c
for proper run-time operation, so I don't see how these two parts
can be separated.
I thought about leaving the PLL4_AUDIO_DIV clock in place but
turning it into a dummy (placeholder), but that might lead others
down the long path I traversed before I found out that my manual
was old and the clock didn't function.
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] clk: imx6q: remove unsupported pll4_audio_div
2019-03-10 23:18 [PATCH] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
2019-03-11 11:37 ` Lucas Stach
2019-03-11 14:20 ` [PATCH] clk: imx6q: remove unsupported pll4_audio_div kbuild test robot
@ 2019-03-13 7:43 ` kbuild test robot
2 siblings, 0 replies; 15+ messages in thread
From: kbuild test robot @ 2019-03-13 7:43 UTC (permalink / raw)
To: Eric Nelson
Cc: kbuild-all, linux-clk, anson.huang, clement.peron, colin.didier,
devicetree, festevam, kernel, l.stach, linux-arm-kernel,
linux-imx, linux-kernel, mark.rutland, mturquette, robh+dt,
s.hauer, sboyd, shawnguo, tiny.windzz, Eric Nelson
[-- Attachment #1: Type: text/plain, Size: 1348 bytes --]
Hi Eric,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on v5.0 next-20190306]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Eric-Nelson/clk-imx6q-remove-unsupported-pll4_audio_div/20190311-171723
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 8.2.0-11) 8.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.2.0 make.cross ARCH=arm
All errors (new ones prefixed by >>):
Error: arch/arm/boot/dts/imx6qdl-sabreauto.dtsi:287.34-35 syntax error
>> FATAL ERROR: Unable to parse input tree
--
Error: arch/arm/boot/dts/imx6q-cm-fx6.dts:451.11-12 syntax error
>> FATAL ERROR: Unable to parse input tree
--
Error: arch/arm/boot/dts/imx6q-novena.dts:421.14-15 syntax error
>> FATAL ERROR: Unable to parse input tree
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 45219 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div
2019-03-11 20:48 ` Eric Nelson
@ 2019-03-18 20:25 ` Stephen Boyd
2019-03-19 14:34 ` Aisheng Dong
0 siblings, 1 reply; 15+ messages in thread
From: Stephen Boyd @ 2019-03-18 20:25 UTC (permalink / raw)
To: Eric Nelson, devicetree, linux-clk
Cc: anson.huang, colin.didier, festevam, kernel, l.stach,
linux-arm-kernel, linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, shawnguo, tiny.windzz
Quoting Eric Nelson (2019-03-11 13:48:55)
> > On March 11, 2019, 6:35 p.m. UTC, Stephen Boyd wrote:
> > Quoting Eric Nelson (2019-03-11 08:59:56)
> >> + *
> >> + * Renamed to _BROKEN to prevent inadvertent use,
> >> + * but reserved the array slot to maintain DT binary
> >> + * compatibility.
> >> + */
> >> +#define IMX6QDL_CLK_PLL4_AUDIO_DIV_BROKEN 203
> >
> > But it breaks the build. I don't get it. Just add a comment indicating
> > it shouldn't be used? That breaks the cross-tree dependency chain and
> > lets clk tree merge the clk driver part and arm-soc merge the dts part.
> The device tree update also requires the update to clk-imx6q.c
> for proper run-time operation, so I don't see how these two parts
> can be separated.
>
> I thought about leaving the PLL4_AUDIO_DIV clock in place but
> turning it into a dummy (placeholder), but that might lead others
> down the long path I traversed before I found out that my manual
> was old and the clock didn't function.
I'm not suggesting that it's left as a dummy forever, just until the
other trees can merge their parts of this series and so that these
patches can be applied in order that they're sent. Right now, the kbuild
robot fails on this patch series because this patch intentionally breaks
the build. Please don't do that. Send patch series that are bisectable
so that the build doesn't break in the middle.
^ permalink raw reply [flat|nested] 15+ messages in thread
* RE: [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div
2019-03-18 20:25 ` Stephen Boyd
@ 2019-03-19 14:34 ` Aisheng Dong
0 siblings, 0 replies; 15+ messages in thread
From: Aisheng Dong @ 2019-03-19 14:34 UTC (permalink / raw)
To: Stephen Boyd, Eric Nelson, devicetree, linux-clk, S.j. Wang,
Daniel Baluta
Cc: Anson Huang, colin.didier, festevam, kernel, l.stach,
linux-arm-kernel, dl-linux-imx, linux-kernel, mark.rutland,
mturquette, robh+dt, s.hauer, shawnguo, tiny.windzz
> From: Stephen Boyd [mailto:sboyd@kernel.org]
>
> Quoting Eric Nelson (2019-03-11 13:48:55)
> > > On March 11, 2019, 6:35 p.m. UTC, Stephen Boyd wrote:
> > > Quoting Eric Nelson (2019-03-11 08:59:56)
> > >> + *
> > >> + * Renamed to _BROKEN to prevent inadvertent use,
> > >> + * but reserved the array slot to maintain DT binary
> > >> + * compatibility.
> > >> + */
> > >> +#define IMX6QDL_CLK_PLL4_AUDIO_DIV_BROKEN 203
> > >
> > > But it breaks the build. I don't get it. Just add a comment
> > > indicating it shouldn't be used? That breaks the cross-tree
> > > dependency chain and lets clk tree merge the clk driver part and arm-soc
> merge the dts part.
> > The device tree update also requires the update to clk-imx6q.c for
> > proper run-time operation, so I don't see how these two parts can be
> > separated.
> >
> > I thought about leaving the PLL4_AUDIO_DIV clock in place but turning
> > it into a dummy (placeholder), but that might lead others down the
> > long path I traversed before I found out that my manual was old and
> > the clock didn't function.
>
> I'm not suggesting that it's left as a dummy forever, just until the other trees
> can merge their parts of this series and so that these patches can be applied in
> order that they're sent. Right now, the kbuild robot fails on this patch series
> because this patch intentionally breaks the build. Please don't do that. Send
> patch series that are bisectable so that the build doesn't break in the middle.
A grep shows there're still many users of it.
$ grep -rn IMX6QDL_CLK_PLL4_AUDIO_DIV arch/arm/boot/dts/*.dts*
arch/arm/boot/dts/imx6q-cm-fx6.dts:451: <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
arch/arm/boot/dts/imx6q-cm-fx6.dts:452: assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi:287: assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi.orig:127: assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
arch/arm/boot/dts/imx6q-novena.dts:421: <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>,
We probably need to fix those device trees first and then can mark it as BROKEN
and remove from the driver support.
Copy NXP audio guys to double check if the issue exists on the downstream tree
as I saw the similar code there.
Shengjiu,
Can you help check it?
Regards
Dong Aisheng
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2019-03-19 14:35 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-10 23:18 [PATCH] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
2019-03-11 11:37 ` Lucas Stach
2019-03-11 14:02 ` Eric Nelson
2019-03-11 15:39 ` [V2 0/2] ARM: imx6qdl: remove PLL4_AUDIO_DIV clock Eric Nelson
2019-03-11 15:59 ` Eric Nelson
2019-03-11 15:59 ` [V2 1/2] clk: imx6q: remove unsupported pll4_audio_div Eric Nelson
2019-03-11 16:38 ` Fabio Estevam
2019-03-11 18:35 ` Stephen Boyd
2019-03-11 20:48 ` Eric Nelson
2019-03-18 20:25 ` Stephen Boyd
2019-03-19 14:34 ` Aisheng Dong
2019-03-11 15:59 ` [PATCH 2/2] ARM: dts: imx6q: remove references to PLL4_AUDIO_DIV Eric Nelson
2019-03-11 16:39 ` Fabio Estevam
2019-03-11 14:20 ` [PATCH] clk: imx6q: remove unsupported pll4_audio_div kbuild test robot
2019-03-13 7:43 ` kbuild test robot
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