[PATCH v3 00/11] i.MX6, DesignWare PCI improvements

[PATCH v3 00/11] i.MX6, DesignWare PCI improvements

[Andrey Smirnov]

Everyone:

This is the series containing various small improvements that I made
while reading the code and researching commit history of pci-imx6.c
and pcie-designware*.c files. All changes are optional, so commits
that don't seem like an improvement can be easily dropped. Hopefully
each patch is self-explanatory.

I tested this series on i.MX6Q, i.MX7D and i.MX8MQ.

Feedback is welcome!

Thanks,
Andrey Smirnov

Changes since [v2]:

    - All non i.MX6 patches dropped, since they were accepted as a
      seprarte series
      
    - Series rebased on lates 'dwc-pci' branch of PCI tree
    
    - Patches "PCI: imx6: Use flags to indicate support for suspend"
      and "PCI: imx6: Replace calls to udelay() with usleep_range()"
      added to the series

Changes since [v1]:

  - Dropped "PCI: imx6: Drop imx6_pcie_link_up()" due to the matter
    already having been addressed by "PCI: imx6: Fix link training
    status detection in link up check" from Trent Piepho

  - Changed "designware" -> "dwc" for all subject lines

  - Collected Acked-by's from Gustavo Pimentel

[v2] lkml.kernel.org/r/20190104174925.17153-1-andrew.smirnov@gmail.com
[v1] lkml.kernel.org/r/20181221072716.29017-1-andrew.smirnov@gmail.com

Andrey Smirnov (11):
  PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock()
  PCI: imx6: Remove redundant debug tracing
  PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change()
  PCI: imx6: Remove PCIE_PL_PFLR_* constants
  PCI: dwc: imx6: Share PHY debug register definitions
  PCI: imx6: Make use of BIT() in constant definitions
  PCI: imx6: Simplify bit operations in PHY functions
  PCI: imx6: Simplify pcie_phy_poll_ack()
  PCI: imx6: Restrict PHY register data to 16-bit
  PCI: imx6: Use flags to indicate support for suspend
  PCI: imx6: Replace calls to udelay() with usleep_range()

 drivers/pci/controller/dwc/pci-imx6.c        | 119 ++++++++-----------
 drivers/pci/controller/dwc/pcie-designware.c |  12 +-
 drivers/pci/controller/dwc/pcie-designware.h |   3 +
 3 files changed, 54 insertions(+), 80 deletions(-)

-- 
2.20.1

[PATCH v3 01/11] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock()

[Andrey Smirnov]

Make use of regmap_read_poll_timeout() to simplify
imx7d_pcie_wait_for_phy_pll_lock(). No functional change intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 21 +++++++--------------
 1 file changed, 7 insertions(+), 14 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 2eb39d5de4f6..fb0b29e5b1f0 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -89,9 +89,8 @@ struct imx6_pcie {
 };
 
 /* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */
-#define PHY_PLL_LOCK_WAIT_MAX_RETRIES	2000
-#define PHY_PLL_LOCK_WAIT_USLEEP_MIN	50
 #define PHY_PLL_LOCK_WAIT_USLEEP_MAX	200
+#define PHY_PLL_LOCK_WAIT_TIMEOUT	(2000 * PHY_PLL_LOCK_WAIT_USLEEP_MAX)
 
 /* PCIe Root Complex registers (memory-mapped) */
 #define PCIE_RC_IMX6_MSI_CAP			0x50
@@ -488,20 +487,14 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
 static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie)
 {
 	u32 val;
-	unsigned int retries;
 	struct device *dev = imx6_pcie->pci->dev;
 
-	for (retries = 0; retries < PHY_PLL_LOCK_WAIT_MAX_RETRIES; retries++) {
-		regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR22, &val);
-
-		if (val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED)
-			return;
-
-		usleep_range(PHY_PLL_LOCK_WAIT_USLEEP_MIN,
-			     PHY_PLL_LOCK_WAIT_USLEEP_MAX);
-	}
-
-	dev_err(dev, "PCIe PLL lock timeout\n");
+	if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr,
+				     IOMUXC_GPR22, val,
+				     val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED,
+				     PHY_PLL_LOCK_WAIT_USLEEP_MAX,
+				     PHY_PLL_LOCK_WAIT_TIMEOUT))
+		dev_err(dev, "PCIe PLL lock timeout\n");
 }
 
 static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
-- 
2.20.1

[PATCH v3 02/11] PCI: imx6: Remove redundant debug tracing

[Andrey Smirnov]

All calls to imx6_pcie_wait_for_link() share the same error path and
the state of PHY debug registers will already be printed there.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index fb0b29e5b1f0..7582d0b2fbe7 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -726,16 +726,9 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
 static int imx6_pcie_wait_for_link(struct imx6_pcie *imx6_pcie)
 {
 	struct dw_pcie *pci = imx6_pcie->pci;
-	struct device *dev = pci->dev;
 
 	/* check if the link is up or not */
-	if (!dw_pcie_wait_for_link(pci))
-		return 0;
-
-	dev_dbg(dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
-		dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R0),
-		dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1));
-	return -ETIMEDOUT;
+	return dw_pcie_wait_for_link(pci);
 }
 
 static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie)
-- 
2.20.1

[PATCH v3 03/11] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change()

[Andrey Smirnov]

Change error code from EINVAL to ETIMEDOUT in
imx6_pcie_wait_for_speed_change() since that error code seems more
appropriate.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 7582d0b2fbe7..3f4707072942 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -747,7 +747,7 @@ static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie)
 	}
 
 	dev_err(dev, "Speed change timeout\n");
-	return -EINVAL;
+	return -ETIMEDOUT;
 }
 
 static void imx6_pcie_ltssm_enable(struct device *dev)
-- 
2.20.1

[PATCH v3 04/11] PCI: imx6: Remove PCIE_PL_PFLR_* constants

[Andrey Smirnov]

Code using these constants was removed in commit a71280722eeb ("PCI:
imx6: Remove LTSSM disable workaround"). No functional change
intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 3f4707072942..92c40c250a34 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -103,9 +103,6 @@ struct imx6_pcie {
 
 /* PCIe Port Logic registers (memory-mapped) */
 #define PL_OFFSET 0x700
-#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
-#define PCIE_PL_PFLR_LINK_STATE_MASK		(0x3f << 16)
-#define PCIE_PL_PFLR_FORCE_LINK			(1 << 15)
 #define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
 #define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
 
-- 
2.20.1

[PATCH v3 05/11] PCI: dwc: imx6: Share PHY debug register definitions

[Andrey Smirnov]

Both pcie-designware.c and pci-imx6.c contain custom definitions for
PHY debug registers R0/R1 and on top of that there's already a
definition for R0 in pcie-designware.h. Move all of the definitions to
pcie-designware.h. No functional change intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c        |  6 ++----
 drivers/pci/controller/dwc/pcie-designware.c | 12 +++---------
 drivers/pci/controller/dwc/pcie-designware.h |  3 +++
 3 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 92c40c250a34..bb95a3273ca2 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -103,8 +103,6 @@ struct imx6_pcie {
 
 /* PCIe Port Logic registers (memory-mapped) */
 #define PL_OFFSET 0x700
-#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
-#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
 
 #define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
 #define PCIE_PHY_CTRL_DATA_LOC 0
@@ -839,8 +837,8 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
 
 err_reset_phy:
 	dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
-		dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R0),
-		dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1));
+		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
+		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
 	imx6_pcie_reset_phy(imx6_pcie);
 	return ret;
 }
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 31f6331ca46f..086e87a40316 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -14,12 +14,6 @@
 
 #include "pcie-designware.h"
 
-/* PCIe Port Logic registers */
-#define PLR_OFFSET			0x700
-#define PCIE_PHY_DEBUG_R1		(PLR_OFFSET + 0x2c)
-#define PCIE_PHY_DEBUG_R1_LINK_UP	(0x1 << 4)
-#define PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING	(0x1 << 29)
-
 int dw_pcie_read(void __iomem *addr, int size, u32 *val)
 {
 	if (!IS_ALIGNED((uintptr_t)addr, size)) {
@@ -334,9 +328,9 @@ int dw_pcie_link_up(struct dw_pcie *pci)
 	if (pci->ops->link_up)
 		return pci->ops->link_up(pci);
 
-	val = readl(pci->dbi_base + PCIE_PHY_DEBUG_R1);
-	return ((val & PCIE_PHY_DEBUG_R1_LINK_UP) &&
-		(!(val & PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING)));
+	val = readl(pci->dbi_base + PCIE_PORT_DEBUG1);
+	return ((val & PCIE_PORT_DEBUG1_LINK_UP) &&
+		(!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING)));
 }
 
 void dw_pcie_setup(struct dw_pcie *pci)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 377f4c0b52da..662bb9082c76 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -41,6 +41,9 @@
 #define PCIE_PORT_DEBUG0		0x728
 #define PORT_LOGIC_LTSSM_STATE_MASK	0x1f
 #define PORT_LOGIC_LTSSM_STATE_L0	0x11
+#define PCIE_PORT_DEBUG1		0x72C
+#define PCIE_PORT_DEBUG1_LINK_UP		(0x1 << 4)
+#define PCIE_PORT_DEBUG1_LINK_IN_TRAINING	(0x1 << 29)
 
 #define PCIE_LINK_WIDTH_SPEED_CONTROL	0x80C
 #define PORT_LOGIC_SPEED_CHANGE		BIT(17)
-- 
2.20.1

[PATCH v3 06/11] PCI: imx6: Make use of BIT() in constant definitions

[Andrey Smirnov]

Avoid using explicit left shifts and convert various definitions to
use BIT() instead. No functional change intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index bb95a3273ca2..b1f30b94fb30 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -118,14 +118,14 @@ struct imx6_pcie {
 
 /* PHY registers (not memory-mapped) */
 #define PCIE_PHY_ATEOVRD			0x10
-#define  PCIE_PHY_ATEOVRD_EN			(0x1 << 2)
+#define  PCIE_PHY_ATEOVRD_EN			BIT(2)
 #define  PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT	0
 #define  PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK	0x1
 
 #define PCIE_PHY_MPLL_OVRD_IN_LO		0x11
 #define  PCIE_PHY_MPLL_MULTIPLIER_SHIFT		2
 #define  PCIE_PHY_MPLL_MULTIPLIER_MASK		0x7f
-#define  PCIE_PHY_MPLL_MULTIPLIER_OVRD		(0x1 << 9)
+#define  PCIE_PHY_MPLL_MULTIPLIER_OVRD		BIT(9)
 
 #define PCIE_PHY_RX_ASIC_OUT 0x100D
 #define PCIE_PHY_RX_ASIC_OUT_VALID	(1 << 0)
@@ -148,8 +148,8 @@ struct imx6_pcie {
 #define PCIE_PHY_CMN_REG26_ATT_MODE	0xBC
 
 #define PHY_RX_OVRD_IN_LO 0x1005
-#define PHY_RX_OVRD_IN_LO_RX_DATA_EN (1 << 5)
-#define PHY_RX_OVRD_IN_LO_RX_PLL_EN (1 << 3)
+#define PHY_RX_OVRD_IN_LO_RX_DATA_EN		BIT(5)
+#define PHY_RX_OVRD_IN_LO_RX_PLL_EN		BIT(3)
 
 static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, int exp_val)
 {
-- 
2.20.1

[PATCH v3 07/11] PCI: imx6: Simplify bit operations in PHY functions

[Andrey Smirnov]

Simplify the code by incorporating left shifts into constant
defnitions as well as using FIELD_PREP/GENMASK. No functional change
intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 28 +++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index b1f30b94fb30..a49e5e491e12 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -105,11 +105,11 @@ struct imx6_pcie {
 #define PL_OFFSET 0x700
 
 #define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
-#define PCIE_PHY_CTRL_DATA_LOC 0
-#define PCIE_PHY_CTRL_CAP_ADR_LOC 16
-#define PCIE_PHY_CTRL_CAP_DAT_LOC 17
-#define PCIE_PHY_CTRL_WR_LOC 18
-#define PCIE_PHY_CTRL_RD_LOC 19
+#define PCIE_PHY_CTRL_DATA(x)		FIELD_PREP(GENMASK(15, 0), (x))
+#define PCIE_PHY_CTRL_CAP_ADR		BIT(16)
+#define PCIE_PHY_CTRL_CAP_DAT		BIT(17)
+#define PCIE_PHY_CTRL_WR		BIT(18)
+#define PCIE_PHY_CTRL_RD		BIT(19)
 
 #define PCIE_PHY_STAT (PL_OFFSET + 0x110)
 #define PCIE_PHY_STAT_ACK_LOC 16
@@ -178,17 +178,17 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
 	u32 val;
 	int ret;
 
-	val = addr << PCIE_PHY_CTRL_DATA_LOC;
+	val = PCIE_PHY_CTRL_DATA(addr);
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
 
-	val |= (0x1 << PCIE_PHY_CTRL_CAP_ADR_LOC);
+	val |= PCIE_PHY_CTRL_CAP_ADR;
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
 
 	ret = pcie_phy_poll_ack(imx6_pcie, 1);
 	if (ret)
 		return ret;
 
-	val = addr << PCIE_PHY_CTRL_DATA_LOC;
+	val = PCIE_PHY_CTRL_DATA(addr);
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
 
 	return pcie_phy_poll_ack(imx6_pcie, 0);
@@ -206,7 +206,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
 		return ret;
 
 	/* assert Read signal */
-	phy_ctl = 0x1 << PCIE_PHY_CTRL_RD_LOC;
+	phy_ctl = PCIE_PHY_CTRL_RD;
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, phy_ctl);
 
 	ret = pcie_phy_poll_ack(imx6_pcie, 1);
@@ -234,11 +234,11 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
 	if (ret)
 		return ret;
 
-	var = data << PCIE_PHY_CTRL_DATA_LOC;
+	var = PCIE_PHY_CTRL_DATA(data);
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
 
 	/* capture data */
-	var |= (0x1 << PCIE_PHY_CTRL_CAP_DAT_LOC);
+	var |= PCIE_PHY_CTRL_CAP_DAT;
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
 
 	ret = pcie_phy_poll_ack(imx6_pcie, 1);
@@ -246,7 +246,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
 		return ret;
 
 	/* deassert cap data */
-	var = data << PCIE_PHY_CTRL_DATA_LOC;
+	var = PCIE_PHY_CTRL_DATA(data);
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
 
 	/* wait for ack de-assertion */
@@ -255,7 +255,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
 		return ret;
 
 	/* assert wr signal */
-	var = 0x1 << PCIE_PHY_CTRL_WR_LOC;
+	var = PCIE_PHY_CTRL_WR;
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
 
 	/* wait for ack */
@@ -264,7 +264,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
 		return ret;
 
 	/* deassert wr signal */
-	var = data << PCIE_PHY_CTRL_DATA_LOC;
+	var = PCIE_PHY_CTRL_DATA(data);
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
 
 	/* wait for ack de-assertion */
-- 
2.20.1

[PATCH v3 08/11] PCI: imx6: Simplify pcie_phy_poll_ack()

[Andrey Smirnov]

Simplify pcie_phy_poll_ack() by incorporating shifting into constant
definition and convert the code to use 'bool'. No functional change
intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index a49e5e491e12..7c3ffb751002 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -112,7 +112,7 @@ struct imx6_pcie {
 #define PCIE_PHY_CTRL_RD		BIT(19)
 
 #define PCIE_PHY_STAT (PL_OFFSET + 0x110)
-#define PCIE_PHY_STAT_ACK_LOC 16
+#define PCIE_PHY_STAT_ACK		BIT(16)
 
 #define PCIE_LINK_WIDTH_SPEED_CONTROL	0x80C
 
@@ -151,16 +151,16 @@ struct imx6_pcie {
 #define PHY_RX_OVRD_IN_LO_RX_DATA_EN		BIT(5)
 #define PHY_RX_OVRD_IN_LO_RX_PLL_EN		BIT(3)
 
-static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, int exp_val)
+static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val)
 {
 	struct dw_pcie *pci = imx6_pcie->pci;
-	u32 val;
+	bool val;
 	u32 max_iterations = 10;
 	u32 wait_counter = 0;
 
 	do {
-		val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
-		val = (val >> PCIE_PHY_STAT_ACK_LOC) & 0x1;
+		val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT) &
+			PCIE_PHY_STAT_ACK;
 		wait_counter++;
 
 		if (val == exp_val)
-- 
2.20.1

[PATCH v3 09/11] PCI: imx6: Restrict PHY register data to 16-bit

[Andrey Smirnov]

PHY registers on i.MX6 are 16-bit wide, so we can get rid of explicit
masking if we restrict pcie_phy_read/pcie_phy_write to use 'u16'
instead of 'int'. No functional change intended.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 7c3ffb751002..9c658ef55aa4 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -195,10 +195,10 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
 }
 
 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
-static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
+static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
 {
 	struct dw_pcie *pci = imx6_pcie->pci;
-	u32 val, phy_ctl;
+	u32 phy_ctl;
 	int ret;
 
 	ret = pcie_phy_wait_ack(imx6_pcie, addr);
@@ -213,8 +213,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
 	if (ret)
 		return ret;
 
-	val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
-	*data = val & 0xffff;
+	*data = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
 
 	/* deassert Read signal */
 	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, 0x00);
@@ -222,7 +221,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
 	return pcie_phy_poll_ack(imx6_pcie, 0);
 }
 
-static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
+static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
 {
 	struct dw_pcie *pci = imx6_pcie->pci;
 	u32 var;
@@ -279,7 +278,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
 
 static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
 {
-	u32 tmp;
+	u16 tmp;
 
 	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
 		return;
@@ -675,7 +674,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
 {
 	unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy);
 	int mult, div;
-	u32 val;
+	u16 val;
 
 	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
 		return 0;
-- 
2.20.1

Re: [PATCH v3 00/11] i.MX6, DesignWare PCI improvements

[Lorenzo Pieralisi]

On Sun, Mar 31, 2019 at 09:25:36PM -0700, Andrey Smirnov wrote:
> Everyone:
> 
> This is the series containing various small improvements that I made
> while reading the code and researching commit history of pci-imx6.c
> and pcie-designware*.c files. All changes are optional, so commits
> that don't seem like an improvement can be easily dropped. Hopefully
> each patch is self-explanatory.
> 
> I tested this series on i.MX6Q, i.MX7D and i.MX8MQ.
> 
> Feedback is welcome!
> 
> Thanks,
> Andrey Smirnov
> 
> Changes since [v2]:
> 
>     - All non i.MX6 patches dropped, since they were accepted as a
>       seprarte series
>       
>     - Series rebased on lates 'dwc-pci' branch of PCI tree
>     
>     - Patches "PCI: imx6: Use flags to indicate support for suspend"
>       and "PCI: imx6: Replace calls to udelay() with usleep_range()"
>       added to the series
> 
> Changes since [v1]:
> 
>   - Dropped "PCI: imx6: Drop imx6_pcie_link_up()" due to the matter
>     already having been addressed by "PCI: imx6: Fix link training
>     status detection in link up check" from Trent Piepho
> 
>   - Changed "designware" -> "dwc" for all subject lines
> 
>   - Collected Acked-by's from Gustavo Pimentel
> 
> [v2] lkml.kernel.org/r/20190104174925.17153-1-andrew.smirnov@gmail.com
> [v1] lkml.kernel.org/r/20181221072716.29017-1-andrew.smirnov@gmail.com
> 
> Andrey Smirnov (11):
>   PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock()
>   PCI: imx6: Remove redundant debug tracing
>   PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change()
>   PCI: imx6: Remove PCIE_PL_PFLR_* constants
>   PCI: dwc: imx6: Share PHY debug register definitions
>   PCI: imx6: Make use of BIT() in constant definitions
>   PCI: imx6: Simplify bit operations in PHY functions
>   PCI: imx6: Simplify pcie_phy_poll_ack()
>   PCI: imx6: Restrict PHY register data to 16-bit
>   PCI: imx6: Use flags to indicate support for suspend
>   PCI: imx6: Replace calls to udelay() with usleep_range()
> 
>  drivers/pci/controller/dwc/pci-imx6.c        | 119 ++++++++-----------
>  drivers/pci/controller/dwc/pcie-designware.c |  12 +-
>  drivers/pci/controller/dwc/pcie-designware.h |   3 +
>  3 files changed, 54 insertions(+), 80 deletions(-)

I am waiting for Lucas's review/ACKs to proceed with this
series.

Thanks,
Lorenzo

Re: [PATCH v3 01/11] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock()

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Make use of regmap_read_poll_timeout() to simplify
> imx7d_pcie_wait_for_phy_pll_lock(). No functional change intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 21 +++++++--------------
>  1 file changed, 7 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 2eb39d5de4f6..fb0b29e5b1f0 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -89,9 +89,8 @@ struct imx6_pcie {
>  };
>  
>  /* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */
> > -#define PHY_PLL_LOCK_WAIT_MAX_RETRIES	2000
> > -#define PHY_PLL_LOCK_WAIT_USLEEP_MIN	50
> >  #define PHY_PLL_LOCK_WAIT_USLEEP_MAX	200
> > +#define PHY_PLL_LOCK_WAIT_TIMEOUT	(2000 * PHY_PLL_LOCK_WAIT_USLEEP_MAX)
>  
>  /* PCIe Root Complex registers (memory-mapped) */
> >  #define PCIE_RC_IMX6_MSI_CAP			0x50
> @@ -488,20 +487,14 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
>  static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie)
>  {
> >  	u32 val;
> > -	unsigned int retries;
> >  	struct device *dev = imx6_pcie->pci->dev;
>  
> > -	for (retries = 0; retries < PHY_PLL_LOCK_WAIT_MAX_RETRIES; retries++) {
> > -		regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR22, &val);
> -
> > -		if (val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED)
> > -			return;
> -
> > -		usleep_range(PHY_PLL_LOCK_WAIT_USLEEP_MIN,
> > -			     PHY_PLL_LOCK_WAIT_USLEEP_MAX);
> > -	}
> -
> > -	dev_err(dev, "PCIe PLL lock timeout\n");
> > +	if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr,
> > +				     IOMUXC_GPR22, val,
> > +				     val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED,
> > +				     PHY_PLL_LOCK_WAIT_USLEEP_MAX,
> > +				     PHY_PLL_LOCK_WAIT_TIMEOUT))
> > +		dev_err(dev, "PCIe PLL lock timeout\n");
>  }
>  
>  static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)

Re: [PATCH v3 02/11] PCI: imx6: Remove redundant debug tracing

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> All calls to imx6_pcie_wait_for_link() share the same error path and
> the state of PHY debug registers will already be printed there.

With this change we can drop imx6_pcie_wait_for_link altogether, as
it's now just wrapper around dw_pcie_wait_for_link that pulls out the
dw_pcie struct from imx6_pcie. Both callers have dw_pcie already
available, so there is no point in keeping this function.

Regards,
Lucas

> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 9 +--------
>  1 file changed, 1 insertion(+), 8 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index fb0b29e5b1f0..7582d0b2fbe7 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -726,16 +726,9 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
>  static int imx6_pcie_wait_for_link(struct imx6_pcie *imx6_pcie)
>  {
> >  	struct dw_pcie *pci = imx6_pcie->pci;
> > -	struct device *dev = pci->dev;
>  
> >  	/* check if the link is up or not */
> > -	if (!dw_pcie_wait_for_link(pci))
> > -		return 0;
> -
> > -	dev_dbg(dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
> > -		dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R0),
> > -		dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1));
> > -	return -ETIMEDOUT;
> > +	return dw_pcie_wait_for_link(pci);
>  }
>  
>  static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie)

Re: [PATCH v3 03/11] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change()

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Change error code from EINVAL to ETIMEDOUT in
> imx6_pcie_wait_for_speed_change() since that error code seems more
> appropriate.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 7582d0b2fbe7..3f4707072942 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -747,7 +747,7 @@ static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie)
> >  	}
>  
> >  	dev_err(dev, "Speed change timeout\n");
> > -	return -EINVAL;
> > +	return -ETIMEDOUT;
>  }
>  
>  static void imx6_pcie_ltssm_enable(struct device *dev)

Re: [PATCH v3 04/11] PCI: imx6: Remove PCIE_PL_PFLR_* constants

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Code using these constants was removed in commit a71280722eeb ("PCI:
> imx6: Remove LTSSM disable workaround"). No functional change
> intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 3f4707072942..92c40c250a34 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -103,9 +103,6 @@ struct imx6_pcie {
>  
>  /* PCIe Port Logic registers (memory-mapped) */
>  #define PL_OFFSET 0x700
> -#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
> > -#define PCIE_PL_PFLR_LINK_STATE_MASK		(0x3f << 16)
> > -#define PCIE_PL_PFLR_FORCE_LINK			(1 << 15)
>  #define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
>  #define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
>  

Re: [PATCH v3 05/11] PCI: dwc: imx6: Share PHY debug register definitions

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Both pcie-designware.c and pci-imx6.c contain custom definitions for
> PHY debug registers R0/R1 and on top of that there's already a
> definition for R0 in pcie-designware.h. Move all of the definitions to
> pcie-designware.h. No functional change intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c        |  6 ++----
>  drivers/pci/controller/dwc/pcie-designware.c | 12 +++---------
>  drivers/pci/controller/dwc/pcie-designware.h |  3 +++
>  3 files changed, 8 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 92c40c250a34..bb95a3273ca2 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -103,8 +103,6 @@ struct imx6_pcie {
>  
>  /* PCIe Port Logic registers (memory-mapped) */
>  #define PL_OFFSET 0x700
> -#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
> -#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
>  
>  #define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
>  #define PCIE_PHY_CTRL_DATA_LOC 0
> @@ -839,8 +837,8 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
>  
>  err_reset_phy:
> >  	dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
> > -		dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R0),
> > -		dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1));
> > +		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
> > +		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
> >  	imx6_pcie_reset_phy(imx6_pcie);
> >  	return ret;
>  }
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 31f6331ca46f..086e87a40316 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -14,12 +14,6 @@
>  
>  #include "pcie-designware.h"
>  
> -/* PCIe Port Logic registers */
> > -#define PLR_OFFSET			0x700
> > -#define PCIE_PHY_DEBUG_R1		(PLR_OFFSET + 0x2c)
> > -#define PCIE_PHY_DEBUG_R1_LINK_UP	(0x1 << 4)
> > -#define PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING	(0x1 << 29)
> -
>  int dw_pcie_read(void __iomem *addr, int size, u32 *val)
>  {
> >  	if (!IS_ALIGNED((uintptr_t)addr, size)) {
> @@ -334,9 +328,9 @@ int dw_pcie_link_up(struct dw_pcie *pci)
> >  	if (pci->ops->link_up)
> >  		return pci->ops->link_up(pci);
>  
> > -	val = readl(pci->dbi_base + PCIE_PHY_DEBUG_R1);
> > -	return ((val & PCIE_PHY_DEBUG_R1_LINK_UP) &&
> > -		(!(val & PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING)));
> > +	val = readl(pci->dbi_base + PCIE_PORT_DEBUG1);
> > +	return ((val & PCIE_PORT_DEBUG1_LINK_UP) &&
> > +		(!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING)));
>  }
>  
>  void dw_pcie_setup(struct dw_pcie *pci)
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 377f4c0b52da..662bb9082c76 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -41,6 +41,9 @@
> >  #define PCIE_PORT_DEBUG0		0x728
> >  #define PORT_LOGIC_LTSSM_STATE_MASK	0x1f
> >  #define PORT_LOGIC_LTSSM_STATE_L0	0x11
> > +#define PCIE_PORT_DEBUG1		0x72C
> > +#define PCIE_PORT_DEBUG1_LINK_UP		(0x1 << 4)
> > +#define PCIE_PORT_DEBUG1_LINK_IN_TRAINING	(0x1 << 29)
>  
> >  #define PCIE_LINK_WIDTH_SPEED_CONTROL	0x80C
> >  #define PORT_LOGIC_SPEED_CHANGE		BIT(17)

Re: [PATCH v3 06/11] PCI: imx6: Make use of BIT() in constant definitions

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Avoid using explicit left shifts and convert various definitions to
> use BIT() instead. No functional change intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index bb95a3273ca2..b1f30b94fb30 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -118,14 +118,14 @@ struct imx6_pcie {
>  
>  /* PHY registers (not memory-mapped) */
> >  #define PCIE_PHY_ATEOVRD			0x10
> > -#define  PCIE_PHY_ATEOVRD_EN			(0x1 << 2)
> > +#define  PCIE_PHY_ATEOVRD_EN			BIT(2)
> >  #define  PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT	0
> >  #define  PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK	0x1
>  
> >  #define PCIE_PHY_MPLL_OVRD_IN_LO		0x11
> >  #define  PCIE_PHY_MPLL_MULTIPLIER_SHIFT		2
> >  #define  PCIE_PHY_MPLL_MULTIPLIER_MASK		0x7f
> > -#define  PCIE_PHY_MPLL_MULTIPLIER_OVRD		(0x1 << 9)
> > +#define  PCIE_PHY_MPLL_MULTIPLIER_OVRD		BIT(9)
>  
>  #define PCIE_PHY_RX_ASIC_OUT 0x100D
> >  #define PCIE_PHY_RX_ASIC_OUT_VALID	(1 << 0)
> @@ -148,8 +148,8 @@ struct imx6_pcie {
> >  #define PCIE_PHY_CMN_REG26_ATT_MODE	0xBC
>  
>  #define PHY_RX_OVRD_IN_LO 0x1005
> -#define PHY_RX_OVRD_IN_LO_RX_DATA_EN (1 << 5)
> -#define PHY_RX_OVRD_IN_LO_RX_PLL_EN (1 << 3)
> > +#define PHY_RX_OVRD_IN_LO_RX_DATA_EN		BIT(5)
> > +#define PHY_RX_OVRD_IN_LO_RX_PLL_EN		BIT(3)
>  
>  static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, int exp_val)
>  {

Re: [PATCH v3 07/11] PCI: imx6: Simplify bit operations in PHY functions

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Simplify the code by incorporating left shifts into constant
> defnitions as well as using FIELD_PREP/GENMASK. No functional change
> intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 28 +++++++++++++--------------
>  1 file changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index b1f30b94fb30..a49e5e491e12 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -105,11 +105,11 @@ struct imx6_pcie {
>  #define PL_OFFSET 0x700
>  
>  #define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
> -#define PCIE_PHY_CTRL_DATA_LOC 0
> -#define PCIE_PHY_CTRL_CAP_ADR_LOC 16
> -#define PCIE_PHY_CTRL_CAP_DAT_LOC 17
> -#define PCIE_PHY_CTRL_WR_LOC 18
> -#define PCIE_PHY_CTRL_RD_LOC 19
> > +#define PCIE_PHY_CTRL_DATA(x)		FIELD_PREP(GENMASK(15, 0), (x))
> > +#define PCIE_PHY_CTRL_CAP_ADR		BIT(16)
> > +#define PCIE_PHY_CTRL_CAP_DAT		BIT(17)
> > +#define PCIE_PHY_CTRL_WR		BIT(18)
> > +#define PCIE_PHY_CTRL_RD		BIT(19)
>  
>  #define PCIE_PHY_STAT (PL_OFFSET + 0x110)
>  #define PCIE_PHY_STAT_ACK_LOC 16
> @@ -178,17 +178,17 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
> >  	u32 val;
> >  	int ret;
>  
> > -	val = addr << PCIE_PHY_CTRL_DATA_LOC;
> > +	val = PCIE_PHY_CTRL_DATA(addr);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
>  
> > -	val |= (0x1 << PCIE_PHY_CTRL_CAP_ADR_LOC);
> > +	val |= PCIE_PHY_CTRL_CAP_ADR;
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
>  
> >  	ret = pcie_phy_poll_ack(imx6_pcie, 1);
> >  	if (ret)
> >  		return ret;
>  
> > -	val = addr << PCIE_PHY_CTRL_DATA_LOC;
> > +	val = PCIE_PHY_CTRL_DATA(addr);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
>  
> >  	return pcie_phy_poll_ack(imx6_pcie, 0);
> @@ -206,7 +206,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
> >  		return ret;
>  
> >  	/* assert Read signal */
> > -	phy_ctl = 0x1 << PCIE_PHY_CTRL_RD_LOC;
> > +	phy_ctl = PCIE_PHY_CTRL_RD;
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, phy_ctl);
>  
> >  	ret = pcie_phy_poll_ack(imx6_pcie, 1);
> @@ -234,11 +234,11 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> >  	if (ret)
> >  		return ret;
>  
> > -	var = data << PCIE_PHY_CTRL_DATA_LOC;
> > +	var = PCIE_PHY_CTRL_DATA(data);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	/* capture data */
> > -	var |= (0x1 << PCIE_PHY_CTRL_CAP_DAT_LOC);
> > +	var |= PCIE_PHY_CTRL_CAP_DAT;
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	ret = pcie_phy_poll_ack(imx6_pcie, 1);
> @@ -246,7 +246,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> >  		return ret;
>  
> >  	/* deassert cap data */
> > -	var = data << PCIE_PHY_CTRL_DATA_LOC;
> > +	var = PCIE_PHY_CTRL_DATA(data);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	/* wait for ack de-assertion */
> @@ -255,7 +255,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> >  		return ret;
>  
> >  	/* assert wr signal */
> > -	var = 0x1 << PCIE_PHY_CTRL_WR_LOC;
> > +	var = PCIE_PHY_CTRL_WR;
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	/* wait for ack */
> @@ -264,7 +264,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> >  		return ret;
>  
> >  	/* deassert wr signal */
> > -	var = data << PCIE_PHY_CTRL_DATA_LOC;
> > +	var = PCIE_PHY_CTRL_DATA(data);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	/* wait for ack de-assertion */

Re: [PATCH v3 08/11] PCI: imx6: Simplify pcie_phy_poll_ack()

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Simplify pcie_phy_poll_ack() by incorporating shifting into constant
> definition and convert the code to use 'bool'. No functional change
> intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index a49e5e491e12..7c3ffb751002 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -112,7 +112,7 @@ struct imx6_pcie {
> >  #define PCIE_PHY_CTRL_RD		BIT(19)
>  
>  #define PCIE_PHY_STAT (PL_OFFSET + 0x110)
> -#define PCIE_PHY_STAT_ACK_LOC 16
> > +#define PCIE_PHY_STAT_ACK		BIT(16)
>  
> >  #define PCIE_LINK_WIDTH_SPEED_CONTROL	0x80C
>  
> @@ -151,16 +151,16 @@ struct imx6_pcie {
> >  #define PHY_RX_OVRD_IN_LO_RX_DATA_EN		BIT(5)
> >  #define PHY_RX_OVRD_IN_LO_RX_PLL_EN		BIT(3)
>  
> -static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, int exp_val)
> +static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val)

This looks like only going half the way to me. The parameter type is
changed to bool, but the callers still use 0 and 1 directly. If we use
bool here the callers should be changed to true/false.

>  {
>  	struct dw_pcie *pci = imx6_pcie->pci;
> -	u32 val;
> +	bool val;
>  	u32 max_iterations = 10;
>  	u32 wait_counter = 0;
>  
>  	do {
> -		val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
> -		val = (val >> PCIE_PHY_STAT_ACK_LOC) & 0x1;
> +		val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT) &
> +			PCIE_PHY_STAT_ACK;

I think this needs to be
val = !!(dw_pcie_readl_dbi(pci, PCIE_PHY_STAT) & PCIE_PHY_STAT_ACK);
as the ACK bit isn't shifted down into bit position 0 anymore.

>  		wait_counter++;
>  
> >  		if (val == exp_val)

Re: [PATCH v3 09/11] PCI: imx6: Restrict PHY register data to 16-bit

[Lucas Stach]

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> PHY registers on i.MX6 are 16-bit wide, so we can get rid of explicit
> masking if we restrict pcie_phy_read/pcie_phy_write to use 'u16'
> instead of 'int'. No functional change intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 13 ++++++-------
>  1 file changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 7c3ffb751002..9c658ef55aa4 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -195,10 +195,10 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
>  }
>  
>  /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
> -static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
> +static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
>  {
> >  	struct dw_pcie *pci = imx6_pcie->pci;
> > -	u32 val, phy_ctl;
> > +	u32 phy_ctl;
> >  	int ret;
>  
> >  	ret = pcie_phy_wait_ack(imx6_pcie, addr);
> @@ -213,8 +213,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
> >  	if (ret)
> >  		return ret;
>  
> > -	val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
> > -	*data = val & 0xffff;
> > +	*data = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
>  
> >  	/* deassert Read signal */
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, 0x00);
> @@ -222,7 +221,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
> >  	return pcie_phy_poll_ack(imx6_pcie, 0);
>  }
>  
> -static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> +static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
>  {
> >  	struct dw_pcie *pci = imx6_pcie->pci;
> >  	u32 var;
> @@ -279,7 +278,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
>  
>  static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
>  {
> > -	u32 tmp;
> > +	u16 tmp;
>  
> >  	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
> >  		return;
> @@ -675,7 +674,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
>  {
> >  	unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy);
> >  	int mult, div;
> > -	u32 val;
> > +	u16 val;
>  
> >  	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
> >  		return 0;

Re: [PATCH v3 08/11] PCI: imx6: Simplify pcie_phy_poll_ack()

[Andrey Smirnov]

On Fri, Apr 12, 2019 at 9:12 AM Lucas Stach <l.stach@pengutronix.de> wrote:
>
> Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> > Simplify pcie_phy_poll_ack() by incorporating shifting into constant
> > definition and convert the code to use 'bool'. No functional change
> > intended.
> >
> > > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > > Cc: Chris Healy <cphealy@gmail.com>
> > > Cc: Lucas Stach <l.stach@pengutronix.de>
> > > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> > Cc: linux-imx@nxp.com
> > Cc: linux-arm-kernel@lists.infradead.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-pci@vger.kernel.org
> > > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> > ---
> >  drivers/pci/controller/dwc/pci-imx6.c | 10 +++++-----
> >  1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> > index a49e5e491e12..7c3ffb751002 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -112,7 +112,7 @@ struct imx6_pcie {
> > >  #define PCIE_PHY_CTRL_RD           BIT(19)
> >
> >  #define PCIE_PHY_STAT (PL_OFFSET + 0x110)
> > -#define PCIE_PHY_STAT_ACK_LOC 16
> > > +#define PCIE_PHY_STAT_ACK          BIT(16)
> >
> > >  #define PCIE_LINK_WIDTH_SPEED_CONTROL      0x80C
> >
> > @@ -151,16 +151,16 @@ struct imx6_pcie {
> > >  #define PHY_RX_OVRD_IN_LO_RX_DATA_EN               BIT(5)
> > >  #define PHY_RX_OVRD_IN_LO_RX_PLL_EN                BIT(3)
> >
> > -static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, int exp_val)
> > +static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val)
>
> This looks like only going half the way to me. The parameter type is
> changed to bool, but the callers still use 0 and 1 directly. If we use
> bool here the callers should be changed to true/false.
>

OK, will change in next version.

> >  {
> >       struct dw_pcie *pci = imx6_pcie->pci;
> > -     u32 val;
> > +     bool val;
> >       u32 max_iterations = 10;
> >       u32 wait_counter = 0;
> >
> >       do {
> > -             val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
> > -             val = (val >> PCIE_PHY_STAT_ACK_LOC) & 0x1;
> > +             val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT) &
> > +                     PCIE_PHY_STAT_ACK;
>
> I think this needs to be
> val = !!(dw_pcie_readl_dbi(pci, PCIE_PHY_STAT) & PCIE_PHY_STAT_ACK);
> as the ACK bit isn't shifted down into bit position 0 anymore.
>

That should already be taken care of by conversion to bool/_Bool(see
"Using bool" in Documentation/process/coding-style.rst) and was one of
the reasons I converted "val" to that type.

Thanks,
Andrey Smirnov

Re: [PATCH v3 02/11] PCI: imx6: Remove redundant debug tracing

[Andrey Smirnov]

On Fri, Apr 12, 2019 at 8:53 AM Lucas Stach <l.stach@pengutronix.de> wrote:
>
> Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> > All calls to imx6_pcie_wait_for_link() share the same error path and
> > the state of PHY debug registers will already be printed there.
>
> With this change we can drop imx6_pcie_wait_for_link altogether, as
> it's now just wrapper around dw_pcie_wait_for_link that pulls out the
> dw_pcie struct from imx6_pcie. Both callers have dw_pcie already
> available, so there is no point in keeping this function.
>

Good point, will do.

Thanks,
Andrey Smirnov