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From: CK Hu <ck.hu@mediatek.com>
To: Jitao Shi <jitao.shi@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>, <linux-pwm@vger.kernel.org>,
	David Airlie <airlied@linux.ie>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Thierry Reding <treding@nvidia.com>,
	"Ajay Kumar" <ajaykumar.rs@samsung.com>,
	Inki Dae <inki.dae@samsung.com>,
	"Rahul Sharma" <rahul.sharma@samsung.com>,
	Sean Paul <seanpaul@chromium.org>,
	Vincent Palatin <vpalatin@chromium.org>,
	Andy Yan <andy.yan@rock-chips.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Russell King" <rmk+kernel@arm.linux.org.uk>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>,
	Sascha Hauer <kernel@pengutronix.de>, <yingjoe.chen@mediatek.com>,
	<eddie.huang@mediatek.com>, <cawa.cheng@mediatek.com>,
	<bibby.hsieh@mediatek.com>, <stonea168@163.com>
Subject: Re: [v2 3/5] drm/mediatek: add dsi reg commit control
Date: Wed, 8 May 2019 10:56:40 +0800	[thread overview]
Message-ID: <1557284200.31731.8.camel@mtksdaap41> (raw)
In-Reply-To: <20190416060501.76276-4-jitao.shi@mediatek.com>

Hi, Jitao:

On Tue, 2019-04-16 at 14:04 +0800, Jitao Shi wrote:
> New DSI IP has shadow register and working reg. The register
> values are writen to shadow register. And then trigger with
> commit reg, the register values will be moved working register.

This patch looks good, but the message is not complete. The message make
us believe you use shadow register to work, but actually, shadow
register is default turn on in new DSI IP and you want to turn off it.

Regards,
CK

> 
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 573e6bec6d36..be42405a0a78 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -131,6 +131,10 @@
>  #define VM_CMD_EN			BIT(0)
>  #define TS_VFP_EN			BIT(5)
>  
> +#define DSI_SHADOW_DEBUG	0x190U
> +#define FORCE_COMMIT		BIT(0)
> +#define BYPASS_SHADOW		BIT(1)
> +
>  #define CONFIG				(0xff << 0)
>  #define SHORT_PACKET			0
>  #define LONG_PACKET			2
> @@ -157,6 +161,7 @@ struct phy;
>  
>  struct mtk_dsi_driver_data {
>  	const u32 reg_cmdq_off;
> +	bool has_shadow_ctl;
>  };
>  
>  struct mtk_dsi {
> @@ -594,6 +599,11 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
>  	}
>  
>  	mtk_dsi_enable(dsi);
> +
> +	if (dsi->driver_data->has_shadow_ctl)
> +		writel(FORCE_COMMIT | BYPASS_SHADOW,
> +		       dsi->regs + DSI_SHADOW_DEBUG);
> +
>  	mtk_dsi_reset_engine(dsi);
>  	mtk_dsi_phy_timconfig(dsi);
>  



  reply	other threads:[~2019-05-08  2:56 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-16  6:04 [v2 0/5] support dsi for mt8183 Jitao Shi
2019-04-16  6:04 ` [v2 1/5] drm/mediatek: move mipi_dsi_host_register to probe Jitao Shi
2019-05-07  9:52   ` CK Hu
     [not found]     ` <1558258588.367.5.camel@mszsdaap41>
2019-05-20  7:06       ` CK Hu
2019-04-16  6:04 ` [v2 2/5] drm/mediatek: CMDQ reg address of mt8173 is different with mt2701 Jitao Shi
2019-04-17  4:58   ` kbuild test robot
2019-04-18  7:51   ` Nicolas Boichat
2019-05-08  2:39   ` CK Hu
     [not found]     ` <1558258406.367.2.camel@mszsdaap41>
2019-05-20  8:34       ` CK Hu
2019-04-16  6:04 ` [v2 3/5] drm/mediatek: add dsi reg commit control Jitao Shi
2019-05-08  2:56   ` CK Hu [this message]
2019-04-16  6:05 ` [v2 4/5] drm/mediatek: add frame size control Jitao Shi
2019-05-08  2:59   ` CK Hu
2019-04-16  6:05 ` [v2 5/5] drm/mediatek: add mt8183 dsi driver support Jitao Shi
2019-05-08  3:00   ` CK Hu

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