* [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients
@ 2020-01-07 10:45 Rajendra Nayak
2020-01-07 10:45 ` [PATCH 2/3] arm64: dts: qcom: sc7180: Add CPU capacity values Rajendra Nayak
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Rajendra Nayak @ 2020-01-07 10:45 UTC (permalink / raw)
To: agross, bjorn.andersson; +Cc: linux-arm-msm, linux-kernel, mka, Rajendra Nayak
Add dynamic power coefficients for Silver and Gold CPUs on
SC7180 SoC.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 8011c5f..fb78bb8 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -86,6 +86,7 @@
compatible = "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -103,6 +104,7 @@
compatible = "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_100>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -117,6 +119,7 @@
compatible = "arm,armv8";
reg = <0x0 0x200>;
enable-method = "psci";
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_200>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -131,6 +134,7 @@
compatible = "arm,armv8";
reg = <0x0 0x300>;
enable-method = "psci";
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_300>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -145,6 +149,7 @@
compatible = "arm,armv8";
reg = <0x0 0x400>;
enable-method = "psci";
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_400>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -159,6 +164,7 @@
compatible = "arm,armv8";
reg = <0x0 0x500>;
enable-method = "psci";
+ dynamic-power-coefficient = <100>;
next-level-cache = <&L2_500>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -173,6 +179,7 @@
compatible = "arm,armv8";
reg = <0x0 0x600>;
enable-method = "psci";
+ dynamic-power-coefficient = <405>;
next-level-cache = <&L2_600>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 1>;
@@ -187,6 +194,7 @@
compatible = "arm,armv8";
reg = <0x0 0x700>;
enable-method = "psci";
+ dynamic-power-coefficient = <405>;
next-level-cache = <&L2_700>;
#cooling-cells = <2>;
qcom,freq-domain = <&cpufreq_hw 1>;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/3] arm64: dts: qcom: sc7180: Add CPU capacity values
2020-01-07 10:45 [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients Rajendra Nayak
@ 2020-01-07 10:45 ` Rajendra Nayak
2020-01-07 10:45 ` [PATCH 3/3] arm64: dts: qcom: sc7180: Add CPU topology Rajendra Nayak
2020-02-14 11:15 ` [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients Rajendra Nayak
2 siblings, 0 replies; 4+ messages in thread
From: Rajendra Nayak @ 2020-01-07 10:45 UTC (permalink / raw)
To: agross, bjorn.andersson; +Cc: linux-arm-msm, linux-kernel, mka, Rajendra Nayak
Specify the relative CPU capacity of all SC7180 cpu cores.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index fb78bb8..4890537 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -86,6 +86,7 @@
compatible = "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
@@ -104,6 +105,7 @@
compatible = "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_100>;
#cooling-cells = <2>;
@@ -119,6 +121,7 @@
compatible = "arm,armv8";
reg = <0x0 0x200>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_200>;
#cooling-cells = <2>;
@@ -134,6 +137,7 @@
compatible = "arm,armv8";
reg = <0x0 0x300>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_300>;
#cooling-cells = <2>;
@@ -149,6 +153,7 @@
compatible = "arm,armv8";
reg = <0x0 0x400>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_400>;
#cooling-cells = <2>;
@@ -164,6 +169,7 @@
compatible = "arm,armv8";
reg = <0x0 0x500>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
next-level-cache = <&L2_500>;
#cooling-cells = <2>;
@@ -179,6 +185,7 @@
compatible = "arm,armv8";
reg = <0x0 0x600>;
enable-method = "psci";
+ capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <405>;
next-level-cache = <&L2_600>;
#cooling-cells = <2>;
@@ -194,6 +201,7 @@
compatible = "arm,armv8";
reg = <0x0 0x700>;
enable-method = "psci";
+ capacity-dmips-mhz = <1740>;
dynamic-power-coefficient = <405>;
next-level-cache = <&L2_700>;
#cooling-cells = <2>;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] arm64: dts: qcom: sc7180: Add CPU topology
2020-01-07 10:45 [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients Rajendra Nayak
2020-01-07 10:45 ` [PATCH 2/3] arm64: dts: qcom: sc7180: Add CPU capacity values Rajendra Nayak
@ 2020-01-07 10:45 ` Rajendra Nayak
2020-02-14 11:15 ` [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients Rajendra Nayak
2 siblings, 0 replies; 4+ messages in thread
From: Rajendra Nayak @ 2020-01-07 10:45 UTC (permalink / raw)
To: agross, bjorn.andersson; +Cc: linux-arm-msm, linux-kernel, mka, Rajendra Nayak
SC7180 has 2 big cores and 6 LITTLE ones in a single cluster
with shared L3.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 4890537..3b9314a 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -211,6 +211,42 @@
next-level-cache = <&L3_0>;
};
};
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&CPU0>;
+ };
+
+ core1 {
+ cpu = <&CPU1>;
+ };
+
+ core2 {
+ cpu = <&CPU2>;
+ };
+
+ core3 {
+ cpu = <&CPU3>;
+ };
+
+ core4 {
+ cpu = <&CPU4>;
+ };
+
+ core5 {
+ cpu = <&CPU5>;
+ };
+
+ core6 {
+ cpu = <&CPU6>;
+ };
+
+ core7 {
+ cpu = <&CPU7>;
+ };
+ };
+ };
};
memory@80000000 {
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients
2020-01-07 10:45 [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients Rajendra Nayak
2020-01-07 10:45 ` [PATCH 2/3] arm64: dts: qcom: sc7180: Add CPU capacity values Rajendra Nayak
2020-01-07 10:45 ` [PATCH 3/3] arm64: dts: qcom: sc7180: Add CPU topology Rajendra Nayak
@ 2020-02-14 11:15 ` Rajendra Nayak
2 siblings, 0 replies; 4+ messages in thread
From: Rajendra Nayak @ 2020-02-14 11:15 UTC (permalink / raw)
To: agross, bjorn.andersson; +Cc: linux-arm-msm, linux-kernel, mka
On 1/7/2020 4:15 PM, Rajendra Nayak wrote:
> Add dynamic power coefficients for Silver and Gold CPUs on
> SC7180 SoC.
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
Andy/Bjorn, can we pull this series in for 5.7?
Its essential to get EAS function on sc7180 devices.
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 8011c5f..fb78bb8 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -86,6 +86,7 @@
> compatible = "arm,armv8";
> reg = <0x0 0x0>;
> enable-method = "psci";
> + dynamic-power-coefficient = <100>;
> next-level-cache = <&L2_0>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -103,6 +104,7 @@
> compatible = "arm,armv8";
> reg = <0x0 0x100>;
> enable-method = "psci";
> + dynamic-power-coefficient = <100>;
> next-level-cache = <&L2_100>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -117,6 +119,7 @@
> compatible = "arm,armv8";
> reg = <0x0 0x200>;
> enable-method = "psci";
> + dynamic-power-coefficient = <100>;
> next-level-cache = <&L2_200>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -131,6 +134,7 @@
> compatible = "arm,armv8";
> reg = <0x0 0x300>;
> enable-method = "psci";
> + dynamic-power-coefficient = <100>;
> next-level-cache = <&L2_300>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -145,6 +149,7 @@
> compatible = "arm,armv8";
> reg = <0x0 0x400>;
> enable-method = "psci";
> + dynamic-power-coefficient = <100>;
> next-level-cache = <&L2_400>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -159,6 +164,7 @@
> compatible = "arm,armv8";
> reg = <0x0 0x500>;
> enable-method = "psci";
> + dynamic-power-coefficient = <100>;
> next-level-cache = <&L2_500>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -173,6 +179,7 @@
> compatible = "arm,armv8";
> reg = <0x0 0x600>;
> enable-method = "psci";
> + dynamic-power-coefficient = <405>;
> next-level-cache = <&L2_600>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> @@ -187,6 +194,7 @@
> compatible = "arm,armv8";
> reg = <0x0 0x700>;
> enable-method = "psci";
> + dynamic-power-coefficient = <405>;
> next-level-cache = <&L2_700>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 1>;
>
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-02-14 11:16 UTC | newest]
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2020-01-07 10:45 [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients Rajendra Nayak
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2020-01-07 10:45 ` [PATCH 3/3] arm64: dts: qcom: sc7180: Add CPU topology Rajendra Nayak
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