From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <frankc@nvidia.com>, <hverkuil@xs4all.nl>
Cc: <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [RFC PATCH v1 3/5] dt-binding: tegra: Add VI and CSI bindings
Date: Tue, 28 Jan 2020 10:23:19 -0800 [thread overview]
Message-ID: <1580235801-4129-4-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1580235801-4129-1-git-send-email-skomatineni@nvidia.com>
Tegra contains VI controller which can support up to 6 MIPI CSI
camera sensors.
Each Tegra CSI port from CSI unit can be one-to-one mapper to
VI channel and can capture from an external camera sensor or
from built-in test pattern generator.
This patch adds dt-bindings for Tegra VI and CSI.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
.../bindings/display/tegra/nvidia,tegra20-host1x.txt | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
index 9999255ac5b6..47cd6532b7d3 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
@@ -40,7 +40,7 @@ of the following host1x client modules:
Required properties:
- compatible: "nvidia,tegra<chip>-vi"
- - reg: Physical base address and length of the controller's registers.
+ - reg: Physical base address and length of the controller registers.
- interrupts: The interrupt outputs from the controller.
- clocks: Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
@@ -49,6 +49,14 @@ of the following host1x client modules:
- reset-names: Must include the following entries:
- vi
+- csi: mipi csi interface to vi
+
+ Required properties:
+ - compatible: "nvidia,tegra<chip>-csi"
+ - reg: Physical base address and length of the controller registers.
+ - clocks: Must contain entries csi, cilab, cilcd, cile clocks.
+ See ../clocks/clock-bindings.txt for details.
+
- epp: encoder pre-processor
Required properties:
--
2.7.4
next prev parent reply other threads:[~2020-01-28 18:23 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-28 18:23 [RFC PATCH v1 0/5] Add Tegra driver for video capture Sowjanya Komatineni
2020-01-28 18:23 ` [RFC PATCH v1 1/5] dt-bindings: clock: tegra: Add clk id for CSI TPG clock Sowjanya Komatineni
2020-02-05 19:23 ` Stephen Boyd
2020-01-28 18:23 ` [RFC PATCH v1 2/5] clk: tegra: Add Tegra210 CSI TPG clock gate Sowjanya Komatineni
2020-02-05 19:23 ` Stephen Boyd
2020-01-28 18:23 ` Sowjanya Komatineni [this message]
2020-01-28 20:32 ` [RFC PATCH v1 3/5] dt-binding: tegra: Add VI and CSI bindings Helen Koike
2020-01-28 21:04 ` Sowjanya Komatineni
2020-01-28 18:23 ` [RFC PATCH v1 4/5] media: tegra: Add Tegra Video input driver for Tegra210 Sowjanya Komatineni
2020-01-28 21:45 ` Helen Koike
2020-01-28 22:13 ` Sowjanya Komatineni
2020-01-29 0:49 ` Sowjanya Komatineni
2020-01-29 1:05 ` Helen Koike
2020-01-29 2:11 ` Sowjanya Komatineni
2020-01-29 5:59 ` Sowjanya Komatineni
2020-01-29 10:31 ` Helen Koike
2020-01-29 17:49 ` Sowjanya Komatineni
2020-01-29 18:15 ` Sowjanya Komatineni
2020-01-29 18:46 ` Helen Koike
2020-01-29 22:40 ` Sowjanya Komatineni
2020-01-29 18:29 ` Helen Koike
2020-01-29 18:46 ` Sowjanya Komatineni
2020-01-29 10:09 ` Thierry Reding
2020-01-29 16:25 ` Sowjanya Komatineni
2020-01-29 11:13 ` Thierry Reding
2020-01-29 17:23 ` Sowjanya Komatineni
2020-01-30 12:20 ` Thierry Reding
2020-01-30 17:02 ` Sowjanya Komatineni
2020-01-29 14:16 ` Hans Verkuil (hansverk)
2020-01-29 17:27 ` Sowjanya Komatineni
2020-01-30 14:45 ` Hans Verkuil
2020-02-05 19:26 ` Stephen Boyd
2020-02-05 19:54 ` Sowjanya Komatineni
2020-01-28 18:23 ` [RFC PATCH v1 5/5] arm64: tegra: Add Tegra VI CSI suppport in device tree Sowjanya Komatineni
2020-01-29 9:46 ` Thierry Reding
2020-01-29 16:22 ` Sowjanya Komatineni
2020-01-30 12:36 ` Thierry Reding
2020-01-30 17:18 ` Sowjanya Komatineni
2020-01-30 17:58 ` Thierry Reding
2020-01-30 18:58 ` Sowjanya Komatineni
2020-01-30 20:18 ` Sowjanya Komatineni
2020-01-31 2:57 ` Sowjanya Komatineni
2020-01-30 14:41 ` [RFC PATCH v1 0/5] Add Tegra driver for video capture Hans Verkuil
2020-01-30 15:42 ` Thierry Reding
2020-01-31 14:29 ` Hans Verkuil
2020-01-31 17:03 ` Thierry Reding
2020-01-31 17:37 ` Hans Verkuil
2020-01-31 20:31 ` Thierry Reding
2020-02-04 9:50 ` Hans Verkuil
2020-01-30 17:20 ` Sowjanya Komatineni
2020-02-04 12:53 ` Hans Verkuil
2020-02-04 16:42 ` Sowjanya Komatineni
2020-02-04 17:22 ` Hans Verkuil
2020-02-04 19:02 ` Sowjanya Komatineni
2020-02-05 7:57 ` Hans Verkuil
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