[PATCH v3 00/13] Add generic MFD i.MX mix and audiomix support

[PATCH v3 00/13] Add generic MFD i.MX mix and audiomix support

[Abel Vesa]

The i.MX8MP has some new IPs called mixes. They are formed usually by some
GPRs that can be split into different functionalities. The first example
here is the audiomix which has dedicated registers that can be registered
as a clock controller and some other registers that can be registered as
a reset controller, plus some dedicated ones that will be registered as
syscon and used by each dedicated audio IP.

More mixes to be following the same structure are to come, like hdmimix,
dispmix and mediamix. They will all be populated and registered by the MFD
imx-mix generic driver.

Changes since v2:
 * removed the runtime PM for now
 * changed the new SPDX identifiers to GPL-2.0-only
 * took care of the DT schema comment

Abel Vesa (13):
  mfd: Add i.MX generic mix support
  Documentation: mfd: Add DT bindings for i.MX Mix
  arm64: dts: imx8mp: Add AIPS 4 and 5
  arm64: dts: imx8mp: Add audiomix node
  clk: imx: gate2: Allow single bit gating clock
  clk: imx: pll14xx: Add the device as argument when registering
  clk: imx: Add helpers for passing the device as argument
  dt-bindings: clocks: imx8mp: Add ids for audiomix clocks
  clk: imx: Add audiomix clock controller support
  arm64: dts: imx8mp: Add audiomix clock controller node
  dt-bindings: reset: imx8mp: Add ids for audiomix reset
  reset: imx: Add audiomix reset controller support
  arm64: dts: imx8mp: Add audiomix reset controller node

 .../devicetree/bindings/mfd/fsl,imx-mix.yaml       |  34 ++++
 arch/arm64/boot/dts/freescale/imx8mp.dtsi          |  41 ++++-
 drivers/clk/imx/Makefile                           |   2 +-
 drivers/clk/imx/clk-audiomix.c                     | 175 +++++++++++++++++++++
 drivers/clk/imx/clk-gate2.c                        |  31 +++-
 drivers/clk/imx/clk-pll14xx.c                      |   8 +-
 drivers/clk/imx/clk.h                              |  55 ++++++-
 drivers/mfd/Kconfig                                |  11 ++
 drivers/mfd/Makefile                               |   1 +
 drivers/mfd/imx-mix.c                              |  48 ++++++
 drivers/reset/Kconfig                              |   7 +
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-imx-audiomix.c                 | 117 ++++++++++++++
 include/dt-bindings/clock/imx8mp-clock.h           |  62 ++++++++
 include/dt-bindings/reset/imx-audiomix-reset.h     |  15 ++
 15 files changed, 590 insertions(+), 18 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml
 create mode 100644 drivers/clk/imx/clk-audiomix.c
 create mode 100644 drivers/mfd/imx-mix.c
 create mode 100644 drivers/reset/reset-imx-audiomix.c
 create mode 100644 include/dt-bindings/reset/imx-audiomix-reset.h

-- 
2.7.4

[PATCH v3 01/13] mfd: Add i.MX generic mix support

[Abel Vesa]

Some of the i.MX SoCs have a IP for interfacing the dedicated IPs with
clocks, resets and interrupts, plus some other specific control registers.
To allow the functionality to be split between drivers, this MFD driver is
added that has only two purposes: register the devices and map the entire
register addresses. Everything else is left to the dedicated drivers that
will bind to the registered devices.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/mfd/Kconfig   | 11 +++++++++++
 drivers/mfd/Makefile  |  1 +
 drivers/mfd/imx-mix.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 60 insertions(+)
 create mode 100644 drivers/mfd/imx-mix.c

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 0a59249..7eeb17f 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -460,6 +460,17 @@ config MFD_MX25_TSADC
 	  i.MX25 processors. They consist of a conversion queue for general
 	  purpose ADC and a queue for Touchscreens.
 
+config MFD_IMX_MIX
+	tristate "NXP i.MX Generic Mix Control Driver"
+	depends on OF || COMPILE_TEST
+	help
+	  Enable generic mixes support. On some i.MX platforms, there are
+	  devices that are a mix of multiple functionalities like reset
+	  controllers, clock controllers and some others. In order to split
+	  those functionalities between the right drivers, this MFD populates
+	  with virtual devices based on what's found in the devicetree node,
+	  leaving the rest of the behavior control to the dedicated driver.
+
 config MFD_HI6421_PMIC
 	tristate "HiSilicon Hi6421 PMU/Codec IC"
 	depends on OF
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index f935d10..5b2ae5d 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -113,6 +113,7 @@ obj-$(CONFIG_MFD_TWL4030_AUDIO)	+= twl4030-audio.o
 obj-$(CONFIG_TWL6040_CORE)	+= twl6040.o
 
 obj-$(CONFIG_MFD_MX25_TSADC)	+= fsl-imx25-tsadc.o
+obj-$(CONFIG_MFD_IMX_MIX)	+= imx-mix.o
 
 obj-$(CONFIG_MFD_MC13XXX)	+= mc13xxx-core.o
 obj-$(CONFIG_MFD_MC13XXX_SPI)	+= mc13xxx-spi.o
diff --git a/drivers/mfd/imx-mix.c b/drivers/mfd/imx-mix.c
new file mode 100644
index 00000000..4ea456f
--- /dev/null
+++ b/drivers/mfd/imx-mix.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+
+#include <linux/mfd/core.h>
+
+static int imx_mix_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct resource *res;
+	void __iomem *base;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	dev_set_drvdata(dev, base);
+
+	return devm_of_platform_populate(dev);
+}
+
+static const struct of_device_id imx_mix_of_match[] = {
+	{ .compatible = "fsl,imx8mp-mix" },
+	{ /* Sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, imx_mix_of_match);
+
+static struct platform_driver imx_mix_driver = {
+	.probe = imx_mix_probe,
+	.driver = {
+		.name = "imx-mix",
+		.of_match_table = of_match_ptr(imx_mix_of_match),
+	},
+};
+module_platform_driver(imx_mix_driver);
-- 
2.7.4

Re: [PATCH v3 01/13] mfd: Add i.MX generic mix support

[Lee Jones]

On Wed, 15 Apr 2020, Abel Vesa wrote:

> Some of the i.MX SoCs have a IP for interfacing the dedicated IPs with
> clocks, resets and interrupts, plus some other specific control registers.
> To allow the functionality to be split between drivers, this MFD driver is
> added that has only two purposes: register the devices and map the entire
> register addresses. Everything else is left to the dedicated drivers that
> will bind to the registered devices.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  drivers/mfd/Kconfig   | 11 +++++++++++
>  drivers/mfd/Makefile  |  1 +
>  drivers/mfd/imx-mix.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 60 insertions(+)
>  create mode 100644 drivers/mfd/imx-mix.c

For completeness - Arnd's reply to this patch:

  https://www.spinics.net/lists/linux-clk/msg47703.html

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH v3 01/13] mfd: Add i.MX generic mix support

[Abel Vesa]

On 20-04-17 09:07:47, Lee Jones wrote:
> On Wed, 15 Apr 2020, Abel Vesa wrote:
>
> > Some of the i.MX SoCs have a IP for interfacing the dedicated IPs with
> > clocks, resets and interrupts, plus some other specific control registers.
> > To allow the functionality to be split between drivers, this MFD driver is
> > added that has only two purposes: register the devices and map the entire
> > register addresses. Everything else is left to the dedicated drivers that
> > will bind to the registered devices.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > ---
> >  drivers/mfd/Kconfig   | 11 +++++++++++
> >  drivers/mfd/Makefile  |  1 +
> >  drivers/mfd/imx-mix.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 60 insertions(+)
> >  create mode 100644 drivers/mfd/imx-mix.c
>
> For completeness - Arnd's reply to this patch:
>
>  https://www.spinics.net/lists/linux-clk/msg47703.html

I'm replying here to Arnd's reply.

I'm trying to give here a whole picture of the entire problem while the
documentation for i.MX8MP is _not yet_ public.

Historically, each IP would have its own enclosure for all the related GPRs.
Starting with i.MX8MP some GPRs (and some subparts) from the IP were placed
inside these mixes.

Audiomix for example, has multiple SAIs, a PLL, and some reset bits for EARC and
some GPRs for AudioDSP. This means that i.MX8MP has 7 SAIs, 1 EARC and 1 AudioDSP.
Future platforms might have different numbers of SAIs, EARCs or AudioDSPs. The PLL
can't be placed in one of those SAIs and it was placed in audiomix.
The i.MX8MP has at least 4 of these mixes.

Now, the commonalities between all mixes are:
 - have their own power domains
 - driven by dedicated clock slice
 - contain clocks and resets
 - some very subsystem specific GPRs

Knowing that each mix has its own power domain, AFAICT, it needs to be registered
as a single device. Considering that it can have clocks (audiomix has gates,
muxes and plls), I believe that needs a clock driver, even more so since the
muxes need their parents from the platform clock driver. Same principle applies
to reset bits. The subsystem specific GPRs can be registered as syscon devices
and taken care of by its counterpart IP (e.g. the AudioDSP specific regs would
be taken care of by the DSP driver, if there is one).

Now based on all of the above, by using MFD we take care of the power domain
control for the entire mix, plus, the MFD doesn't have any kind of
functionality by its own, relying on its children devices that are populated
based on what is in the mix MFD devicetree node.

> --
> Lee Jones [李琼斯]
> Linaro Services Technical Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog

RE: [PATCH v3 01/13] mfd: Add i.MX generic mix support

[Aisheng Dong]

> From: Abel Vesa <abel.vesa@nxp.com>
> Sent: Wednesday, April 22, 2020 5:19 PM
> On 20-04-17 09:07:47, Lee Jones wrote:
> > On Wed, 15 Apr 2020, Abel Vesa wrote:
> >
> > > Some of the i.MX SoCs have a IP for interfacing the dedicated IPs
> > > with clocks, resets and interrupts, plus some other specific control registers.
> > > To allow the functionality to be split between drivers, this MFD
> > > driver is added that has only two purposes: register the devices and
> > > map the entire register addresses. Everything else is left to the
> > > dedicated drivers that will bind to the registered devices.
> > >
> > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > > ---
> > >  drivers/mfd/Kconfig   | 11 +++++++++++
> > >  drivers/mfd/Makefile  |  1 +
> > >  drivers/mfd/imx-mix.c | 48
> > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > >  3 files changed, 60 insertions(+)
> > >  create mode 100644 drivers/mfd/imx-mix.c
> >
> > For completeness - Arnd's reply to this patch:
> >
> 
> I'm replying here to Arnd's reply.
> 
> I'm trying to give here a whole picture of the entire problem while the
> documentation for i.MX8MP is _not yet_ public.
> 
> Historically, each IP would have its own enclosure for all the related GPRs.
> Starting with i.MX8MP some GPRs (and some subparts) from the IP were placed
> inside these mixes.
> 
> Audiomix for example, has multiple SAIs, a PLL, and some reset bits for EARC
> and some GPRs for AudioDSP. This means that i.MX8MP has 7 SAIs, 1 EARC and
> 1 AudioDSP.
> Future platforms might have different numbers of SAIs, EARCs or AudioDSPs.
> The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> The i.MX8MP has at least 4 of these mixes.
> 
> Now, the commonalities between all mixes are:
>  - have their own power domains
>  - driven by dedicated clock slice
>  - contain clocks and resets
>  - some very subsystem specific GPRs
> 
> Knowing that each mix has its own power domain, AFAICT, it needs to be
> registered as a single device. Considering that it can have clocks (audiomix has
> gates, muxes and plls), I believe that needs a clock driver, even more so since the
> muxes need their parents from the platform clock driver. Same principle applies
> to reset bits. The subsystem specific GPRs can be registered as syscon devices
> and taken care of by its counterpart IP (e.g. the AudioDSP specific regs would be
> taken care of by the DSP driver, if there is one).
> 
> Now based on all of the above, by using MFD we take care of the power domain
> control for the entire mix, plus, the MFD doesn't have any kind of functionality
> by its own, relying on its children devices that are populated based on what is in
> the mix MFD devicetree node.
> 

How about doing like this which maybe can address Arnd's concerns?
audiomix: audiomix@30e20000 {
        compatible = "fsl,imx8mp-audiomix", "syscon";
        reg = <0x30e20000 xxx>,
              <0x30e20xxx xxx>;
        reg-names = "audio", "reset", "...";
        #clock-cells = <1>;
        #reset-cells = <1>;
        power-domains = <&audiomix_pd>;
}

That means we have one combo driver registering two controllers (clk/reset), both use
the same power domain as audiomix.
And it can be easily extended to support more services provided by audiomix over syscon
if needed.
Then the 'dummy' MDF driver is not needed anymore.

Jones & Arnd,
How do you think?

Regards
Aisheng

> > --
> > Lee Jones [李琼斯]
> > Linaro Services Technical Lead
> > Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook
> > | Twitter | Blog

Re: [PATCH v3 01/13] mfd: Add i.MX generic mix support

[Lee Jones]

On Thu, 23 Apr 2020, Aisheng Dong wrote:

> > From: Abel Vesa <abel.vesa@nxp.com>
> > Sent: Wednesday, April 22, 2020 5:19 PM
> > On 20-04-17 09:07:47, Lee Jones wrote:
> > > On Wed, 15 Apr 2020, Abel Vesa wrote:
> > >
> > > > Some of the i.MX SoCs have a IP for interfacing the dedicated IPs
> > > > with clocks, resets and interrupts, plus some other specific control registers.
> > > > To allow the functionality to be split between drivers, this MFD
> > > > driver is added that has only two purposes: register the devices and
> > > > map the entire register addresses. Everything else is left to the
> > > > dedicated drivers that will bind to the registered devices.
> > > >
> > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > > > ---
> > > >  drivers/mfd/Kconfig   | 11 +++++++++++
> > > >  drivers/mfd/Makefile  |  1 +
> > > >  drivers/mfd/imx-mix.c | 48
> > > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > >  3 files changed, 60 insertions(+)
> > > >  create mode 100644 drivers/mfd/imx-mix.c
> > >
> > > For completeness - Arnd's reply to this patch:
> > >
> > 
> > I'm replying here to Arnd's reply.
> > 
> > I'm trying to give here a whole picture of the entire problem while the
> > documentation for i.MX8MP is _not yet_ public.
> > 
> > Historically, each IP would have its own enclosure for all the related GPRs.
> > Starting with i.MX8MP some GPRs (and some subparts) from the IP were placed
> > inside these mixes.
> > 
> > Audiomix for example, has multiple SAIs, a PLL, and some reset bits for EARC
> > and some GPRs for AudioDSP. This means that i.MX8MP has 7 SAIs, 1 EARC and
> > 1 AudioDSP.
> > Future platforms might have different numbers of SAIs, EARCs or AudioDSPs.
> > The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> > The i.MX8MP has at least 4 of these mixes.
> > 
> > Now, the commonalities between all mixes are:
> >  - have their own power domains
> >  - driven by dedicated clock slice
> >  - contain clocks and resets
> >  - some very subsystem specific GPRs
> > 
> > Knowing that each mix has its own power domain, AFAICT, it needs to be
> > registered as a single device. Considering that it can have clocks (audiomix has
> > gates, muxes and plls), I believe that needs a clock driver, even more so since the
> > muxes need their parents from the platform clock driver. Same principle applies
> > to reset bits. The subsystem specific GPRs can be registered as syscon devices
> > and taken care of by its counterpart IP (e.g. the AudioDSP specific regs would be
> > taken care of by the DSP driver, if there is one).
> > 
> > Now based on all of the above, by using MFD we take care of the power domain
> > control for the entire mix, plus, the MFD doesn't have any kind of functionality
> > by its own, relying on its children devices that are populated based on what is in
> > the mix MFD devicetree node.
> > 
> 
> How about doing like this which maybe can address Arnd's concerns?
> audiomix: audiomix@30e20000 {
>         compatible = "fsl,imx8mp-audiomix", "syscon";
>         reg = <0x30e20000 xxx>,
>               <0x30e20xxx xxx>;
>         reg-names = "audio", "reset", "...";
>         #clock-cells = <1>;
>         #reset-cells = <1>;
>         power-domains = <&audiomix_pd>;
> }
> 
> That means we have one combo driver registering two controllers (clk/reset), both use
> the same power domain as audiomix.
> And it can be easily extended to support more services provided by audiomix over syscon
> if needed.
> Then the 'dummy' MDF driver is not needed anymore.
> 
> Jones & Arnd,
> How do you think?

Sounds okay in principle.  Anything that prevents the existence of a
dummy (a.k.a. pointless) MFD must be seen as a positive move.

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH v3 01/13] mfd: Add i.MX generic mix support

[Abel Vesa]

On 20-04-24 07:27:27, Lee Jones wrote:
> On Thu, 23 Apr 2020, Aisheng Dong wrote:
> 
> > > From: Abel Vesa <abel.vesa@nxp.com>
> > > Sent: Wednesday, April 22, 2020 5:19 PM
> > > On 20-04-17 09:07:47, Lee Jones wrote:
> > > > On Wed, 15 Apr 2020, Abel Vesa wrote:
> > > >
> > > > > Some of the i.MX SoCs have a IP for interfacing the dedicated IPs
> > > > > with clocks, resets and interrupts, plus some other specific control registers.
> > > > > To allow the functionality to be split between drivers, this MFD
> > > > > driver is added that has only two purposes: register the devices and
> > > > > map the entire register addresses. Everything else is left to the
> > > > > dedicated drivers that will bind to the registered devices.
> > > > >
> > > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > > > > ---
> > > > >  drivers/mfd/Kconfig   | 11 +++++++++++
> > > > >  drivers/mfd/Makefile  |  1 +
> > > > >  drivers/mfd/imx-mix.c | 48
> > > > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > > >  3 files changed, 60 insertions(+)
> > > > >  create mode 100644 drivers/mfd/imx-mix.c
> > > >
> > > > For completeness - Arnd's reply to this patch:
> > > >
> > > 
> > > I'm replying here to Arnd's reply.
> > > 
> > > I'm trying to give here a whole picture of the entire problem while the
> > > documentation for i.MX8MP is _not yet_ public.
> > > 
> > > Historically, each IP would have its own enclosure for all the related GPRs.
> > > Starting with i.MX8MP some GPRs (and some subparts) from the IP were placed
> > > inside these mixes.
> > > 
> > > Audiomix for example, has multiple SAIs, a PLL, and some reset bits for EARC
> > > and some GPRs for AudioDSP. This means that i.MX8MP has 7 SAIs, 1 EARC and
> > > 1 AudioDSP.
> > > Future platforms might have different numbers of SAIs, EARCs or AudioDSPs.
> > > The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> > > The i.MX8MP has at least 4 of these mixes.
> > > 
> > > Now, the commonalities between all mixes are:
> > >  - have their own power domains
> > >  - driven by dedicated clock slice
> > >  - contain clocks and resets
> > >  - some very subsystem specific GPRs
> > > 
> > > Knowing that each mix has its own power domain, AFAICT, it needs to be
> > > registered as a single device. Considering that it can have clocks (audiomix has
> > > gates, muxes and plls), I believe that needs a clock driver, even more so since the
> > > muxes need their parents from the platform clock driver. Same principle applies
> > > to reset bits. The subsystem specific GPRs can be registered as syscon devices
> > > and taken care of by its counterpart IP (e.g. the AudioDSP specific regs would be
> > > taken care of by the DSP driver, if there is one).
> > > 
> > > Now based on all of the above, by using MFD we take care of the power domain
> > > control for the entire mix, plus, the MFD doesn't have any kind of functionality
> > > by its own, relying on its children devices that are populated based on what is in
> > > the mix MFD devicetree node.
> > > 
> > 
> > How about doing like this which maybe can address Arnd's concerns?
> > audiomix: audiomix@30e20000 {
> >         compatible = "fsl,imx8mp-audiomix", "syscon";
> >         reg = <0x30e20000 xxx>,
> >               <0x30e20xxx xxx>;
> >         reg-names = "audio", "reset", "...";
> >         #clock-cells = <1>;
> >         #reset-cells = <1>;
> >         power-domains = <&audiomix_pd>;
> > }
> > 
> > That means we have one combo driver registering two controllers (clk/reset), both use
> > the same power domain as audiomix.
> > And it can be easily extended to support more services provided by audiomix over syscon
> > if needed.
> > Then the 'dummy' MDF driver is not needed anymore.
> > 
> > Jones & Arnd,
> > How do you think?
> 
> Sounds okay in principle.  Anything that prevents the existence of a
> dummy (a.k.a. pointless) MFD must be seen as a positive move.
> 

OK, I'll do it in a single driver and single dts node.

But there might be an issue with the placement of this new driver.

drivers/clk/imx/ could be an option, but the driver will use a lot
of different APIs from different subsystems. Not the audiomix, but
the future mixes.

> -- 
> Lee Jones [李琼斯]
> Linaro Services Technical Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog

RE: [PATCH v3 01/13] mfd: Add i.MX generic mix support

[Aisheng Dong]

> From: Abel Vesa <abel.vesa@nxp.com>
> Sent: Thursday, April 30, 2020 6:04 PM
> To: Lee Jones <lee.jones@linaro.org>
> On 20-04-24 07:27:27, Lee Jones wrote:
> > On Thu, 23 Apr 2020, Aisheng Dong wrote:
> >
> > > > From: Abel Vesa <abel.vesa@nxp.com>
> > > > Sent: Wednesday, April 22, 2020 5:19 PM On 20-04-17 09:07:47, Lee
> > > > Jones wrote:
> > > > > On Wed, 15 Apr 2020, Abel Vesa wrote:
> > > > >
> > > > > > Some of the i.MX SoCs have a IP for interfacing the dedicated
> > > > > > IPs with clocks, resets and interrupts, plus some other specific control
> registers.
> > > > > > To allow the functionality to be split between drivers, this
> > > > > > MFD driver is added that has only two purposes: register the
> > > > > > devices and map the entire register addresses. Everything else
> > > > > > is left to the dedicated drivers that will bind to the registered devices.
> > > > > >
> > > > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > > > > > ---
> > > > > >  drivers/mfd/Kconfig   | 11 +++++++++++
> > > > > >  drivers/mfd/Makefile  |  1 +
> > > > > >  drivers/mfd/imx-mix.c | 48
> > > > > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > >  3 files changed, 60 insertions(+)  create mode 100644
> > > > > > drivers/mfd/imx-mix.c
> > > > >
> > > > > For completeness - Arnd's reply to this patch:
> > > > >
> > > >
> > > > I'm replying here to Arnd's reply.
> > > >
> > > > I'm trying to give here a whole picture of the entire problem
> > > > while the documentation for i.MX8MP is _not yet_ public.
> > > >
> > > > Historically, each IP would have its own enclosure for all the related GPRs.
> > > > Starting with i.MX8MP some GPRs (and some subparts) from the IP
> > > > were placed inside these mixes.
> > > >
> > > > Audiomix for example, has multiple SAIs, a PLL, and some reset
> > > > bits for EARC and some GPRs for AudioDSP. This means that i.MX8MP
> > > > has 7 SAIs, 1 EARC and
> > > > 1 AudioDSP.
> > > > Future platforms might have different numbers of SAIs, EARCs or
> AudioDSPs.
> > > > The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> > > > The i.MX8MP has at least 4 of these mixes.
> > > >
> > > > Now, the commonalities between all mixes are:
> > > >  - have their own power domains
> > > >  - driven by dedicated clock slice
> > > >  - contain clocks and resets
> > > >  - some very subsystem specific GPRs
> > > >
> > > > Knowing that each mix has its own power domain, AFAICT, it needs
> > > > to be registered as a single device. Considering that it can have
> > > > clocks (audiomix has gates, muxes and plls), I believe that needs
> > > > a clock driver, even more so since the muxes need their parents
> > > > from the platform clock driver. Same principle applies to reset
> > > > bits. The subsystem specific GPRs can be registered as syscon
> > > > devices and taken care of by its counterpart IP (e.g. the AudioDSP specific
> regs would be taken care of by the DSP driver, if there is one).
> > > >
> > > > Now based on all of the above, by using MFD we take care of the
> > > > power domain control for the entire mix, plus, the MFD doesn't
> > > > have any kind of functionality by its own, relying on its children
> > > > devices that are populated based on what is in the mix MFD devicetree
> node.
> > > >
> > >
> > > How about doing like this which maybe can address Arnd's concerns?
> > > audiomix: audiomix@30e20000 {
> > >         compatible = "fsl,imx8mp-audiomix", "syscon";
> > >         reg = <0x30e20000 xxx>,
> > >               <0x30e20xxx xxx>;
> > >         reg-names = "audio", "reset", "...";
> > >         #clock-cells = <1>;
> > >         #reset-cells = <1>;
> > >         power-domains = <&audiomix_pd>; }
> > >
> > > That means we have one combo driver registering two controllers
> > > (clk/reset), both use the same power domain as audiomix.
> > > And it can be easily extended to support more services provided by
> > > audiomix over syscon if needed.
> > > Then the 'dummy' MDF driver is not needed anymore.
> > >
> > > Jones & Arnd,
> > > How do you think?
> >
> > Sounds okay in principle.  Anything that prevents the existence of a
> > dummy (a.k.a. pointless) MFD must be seen as a positive move.
> >
> 
> OK, I'll do it in a single driver and single dts node.
> 
> But there might be an issue with the placement of this new driver.
> 
> drivers/clk/imx/ could be an option, but the driver will use a lot of different APIs
> from different subsystems. Not the audiomix, but the future mixes.

Maybe Stephen could comment whether it's ok to push a combo driver
(e.g. clk&reset&syscon) In drivers/clk/imx.

From what we see, it seems already some similar combo drivers (clk&reset) there.

BTW, not sure if any technical block reasons to put in drivers/clk.
Maybe we can quickly try internally first.

Regards
Aisheng

> 
> > --
> > Lee Jones [李琼斯]
> > Linaro Services Technical Lead
> > Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook
> > | Twitter | Blog

Re: [PATCH v3 01/13] mfd: Add i.MX generic mix support

[Abel Vesa]

On 20-04-30 10:22:04, Aisheng Dong wrote:
> > From: Abel Vesa <abel.vesa@nxp.com>
> > Sent: Thursday, April 30, 2020 6:04 PM
> > To: Lee Jones <lee.jones@linaro.org>
> > On 20-04-24 07:27:27, Lee Jones wrote:
> > > On Thu, 23 Apr 2020, Aisheng Dong wrote:
> > >
> > > > > From: Abel Vesa <abel.vesa@nxp.com>
> > > > > Sent: Wednesday, April 22, 2020 5:19 PM On 20-04-17 09:07:47, Lee
> > > > > Jones wrote:
> > > > > > On Wed, 15 Apr 2020, Abel Vesa wrote:
> > > > > >
> > > > > > > Some of the i.MX SoCs have a IP for interfacing the dedicated
> > > > > > > IPs with clocks, resets and interrupts, plus some other specific control
> > registers.
> > > > > > > To allow the functionality to be split between drivers, this
> > > > > > > MFD driver is added that has only two purposes: register the
> > > > > > > devices and map the entire register addresses. Everything else
> > > > > > > is left to the dedicated drivers that will bind to the registered devices.
> > > > > > >
> > > > > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > > > > > > ---
> > > > > > >  drivers/mfd/Kconfig   | 11 +++++++++++
> > > > > > >  drivers/mfd/Makefile  |  1 +
> > > > > > >  drivers/mfd/imx-mix.c | 48
> > > > > > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > >  3 files changed, 60 insertions(+)  create mode 100644
> > > > > > > drivers/mfd/imx-mix.c
> > > > > >
> > > > > > For completeness - Arnd's reply to this patch:
> > > > > >
> > > > >
> > > > > I'm replying here to Arnd's reply.
> > > > >
> > > > > I'm trying to give here a whole picture of the entire problem
> > > > > while the documentation for i.MX8MP is _not yet_ public.
> > > > >
> > > > > Historically, each IP would have its own enclosure for all the related GPRs.
> > > > > Starting with i.MX8MP some GPRs (and some subparts) from the IP
> > > > > were placed inside these mixes.
> > > > >
> > > > > Audiomix for example, has multiple SAIs, a PLL, and some reset
> > > > > bits for EARC and some GPRs for AudioDSP. This means that i.MX8MP
> > > > > has 7 SAIs, 1 EARC and
> > > > > 1 AudioDSP.
> > > > > Future platforms might have different numbers of SAIs, EARCs or
> > AudioDSPs.
> > > > > The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> > > > > The i.MX8MP has at least 4 of these mixes.
> > > > >
> > > > > Now, the commonalities between all mixes are:
> > > > >  - have their own power domains
> > > > >  - driven by dedicated clock slice
> > > > >  - contain clocks and resets
> > > > >  - some very subsystem specific GPRs
> > > > >
> > > > > Knowing that each mix has its own power domain, AFAICT, it needs
> > > > > to be registered as a single device. Considering that it can have
> > > > > clocks (audiomix has gates, muxes and plls), I believe that needs
> > > > > a clock driver, even more so since the muxes need their parents
> > > > > from the platform clock driver. Same principle applies to reset
> > > > > bits. The subsystem specific GPRs can be registered as syscon
> > > > > devices and taken care of by its counterpart IP (e.g. the AudioDSP specific
> > regs would be taken care of by the DSP driver, if there is one).
> > > > >
> > > > > Now based on all of the above, by using MFD we take care of the
> > > > > power domain control for the entire mix, plus, the MFD doesn't
> > > > > have any kind of functionality by its own, relying on its children
> > > > > devices that are populated based on what is in the mix MFD devicetree
> > node.
> > > > >
> > > >
> > > > How about doing like this which maybe can address Arnd's concerns?
> > > > audiomix: audiomix@30e20000 {
> > > >         compatible = "fsl,imx8mp-audiomix", "syscon";
> > > >         reg = <0x30e20000 xxx>,
> > > >               <0x30e20xxx xxx>;
> > > >         reg-names = "audio", "reset", "...";
> > > >         #clock-cells = <1>;
> > > >         #reset-cells = <1>;
> > > >         power-domains = <&audiomix_pd>; }
> > > >
> > > > That means we have one combo driver registering two controllers
> > > > (clk/reset), both use the same power domain as audiomix.
> > > > And it can be easily extended to support more services provided by
> > > > audiomix over syscon if needed.
> > > > Then the 'dummy' MDF driver is not needed anymore.
> > > >
> > > > Jones & Arnd,
> > > > How do you think?
> > >
> > > Sounds okay in principle.  Anything that prevents the existence of a
> > > dummy (a.k.a. pointless) MFD must be seen as a positive move.
> > >
> > 
> > OK, I'll do it in a single driver and single dts node.
> > 
> > But there might be an issue with the placement of this new driver.
> > 
> > drivers/clk/imx/ could be an option, but the driver will use a lot of different APIs
> > from different subsystems. Not the audiomix, but the future mixes.
> 
> Maybe Stephen could comment whether it's ok to push a combo driver
> (e.g. clk&reset&syscon) In drivers/clk/imx.
> 
> From what we see, it seems already some similar combo drivers (clk&reset) there.
> 
> BTW, not sure if any technical block reasons to put in drivers/clk.
> Maybe we can quickly try internally first.
> 

Working on it already.

> Regards
> Aisheng
> 
> > 
> > > --
> > > Lee Jones [李琼斯]
> > > Linaro Services Technical Lead
> > > Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook
> > > | Twitter | Blog

[PATCH v3 02/13] Documentation: mfd: Add DT bindings for i.MX Mix

[Abel Vesa]

Documnent the i.MX Mix with its devicetree properties.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../devicetree/bindings/mfd/fsl,imx-mix.yaml       | 34 ++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml

diff --git a/Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml b/Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml
new file mode 100644
index 00000000..8b1870e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/fsl,imx-mix.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX mix
+
+description: |
+  i.MX mix is a conglomerate of different GPRs that are
+  usually dedicated to one subsystem. These GPRs can be
+  further split between different types of drivers, once
+  the MFD populates all the devices based on its devicetree
+  subnodes.
+
+maintainers:
+  - Abel Vesa <abel.vesa@nxp.com>
+
+properties:
+  reg:
+    maxItems: 1
+  compatible:
+    const: fsl,imx8mp-mix
+
+required:
+  - compatible
+  - reg
+
+examples:
+  - |
+    audiomix: mix@30e20000 {
+       compatible = "fsl,imx8mp-mix";
+       reg = <0x30e20000 0x10000>;
+    };
-- 
2.7.4

Re: [PATCH v3 02/13] Documentation: mfd: Add DT bindings for i.MX Mix

[Arnd Bergmann]

On Wed, Apr 15, 2020 at 10:05 AM Abel Vesa <abel.vesa@nxp.com> wrote:
>
> Documnent the i.MX Mix with its devicetree properties.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../devicetree/bindings/mfd/fsl,imx-mix.yaml       | 34 ++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml
>
> diff --git a/Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml b/Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml
> new file mode 100644
> index 00000000..8b1870e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml
> @@ -0,0 +1,34 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/fsl,imx-mix.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX mix
> +
> +description: |
> +  i.MX mix is a conglomerate of different GPRs that are
> +  usually dedicated to one subsystem. These GPRs can be
> +  further split between different types of drivers, once
> +  the MFD populates all the devices based on its devicetree
> +  subnodes.

This does not describe the hardware but the implementation in Linux.
Please rephrase it to not independent of the software that interprets
the DT nodes.

       Arnd

[PATCH v3 03/13] arm64: dts: imx8mp: Add AIPS 4 and 5

[Abel Vesa]

There are 5 AIPS maps in total, according to the RM. Add the missing
ones here.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9b1616e..c08156f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -318,7 +318,7 @@
 
 		aips2: bus@30400000 {
 			compatible = "fsl,aips-bus", "simple-bus";
-			reg = <0x305f0000 0x400000>;
+			reg = <0x305f0000 0x10000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
@@ -378,7 +378,7 @@
 
 		aips3: bus@30800000 {
 			compatible = "fsl,aips-bus", "simple-bus";
-			reg = <0x309f0000 0x400000>;
+			reg = <0x309f0000 0x10000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
@@ -641,6 +641,22 @@
 			};
 		};
 
+		aips4: bus@32c00000 {
+			compatible = "fsl,aips-bus", "simple-bus";
+			reg = <0x32c00000 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+		};
+
+		aips5: bus@30c00000 {
+			compatible = "fsl,aips-bus", "simple-bus";
+			reg = <0x30c00000 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+		};
+
 		gic: interrupt-controller@38800000 {
 			compatible = "arm,gic-v3";
 			reg = <0x38800000 0x10000>,
-- 
2.7.4

[PATCH v3 04/13] arm64: dts: imx8mp: Add audiomix node

[Abel Vesa]

Audiomix is a mix of multiple functionalities controlled by the audio IPs.
In order to split the functionality between the rightfull drivers, it
will be probled by the imx-mix MFD driver.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index c08156f..3e4c376 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -655,6 +655,11 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
+
+			audiomix: audiomix@30e20000 {
+				compatible = "fsl,imx8mp-mix";
+				reg = <0x30e20000 0x10000>;
+			};
 		};
 
 		gic: interrupt-controller@38800000 {
-- 
2.7.4

[PATCH v3 05/13] clk: imx: gate2: Allow single bit gating clock

[Abel Vesa]

Audiomix on i.MX8MP registers two gates that share the same enable count
but use the same bit to control the gate instead of two bits. By adding
the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
gate ops for enable, disable and is_enabled.
For the disable_unused, nothing happens if this flag is specified.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/clk/imx/clk-gate2.c | 31 +++++++++++++++++++++++--------
 drivers/clk/imx/clk.h       | 13 +++++++++++++
 2 files changed, 36 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index ce0060e..b87ab3c 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -41,21 +41,26 @@ static int clk_gate2_enable(struct clk_hw *hw)
 	struct clk_gate2 *gate = to_clk_gate2(hw);
 	u32 reg;
 	unsigned long flags;
+	int ret = 0;
 
 	spin_lock_irqsave(gate->lock, flags);
 
 	if (gate->share_count && (*gate->share_count)++ > 0)
 		goto out;
 
-	reg = readl(gate->reg);
-	reg &= ~(3 << gate->bit_idx);
-	reg |= gate->cgr_val << gate->bit_idx;
-	writel(reg, gate->reg);
+	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
+		ret = clk_gate_ops.enable(hw);
+	} else {
+		reg = readl(gate->reg);
+		reg &= ~(3 << gate->bit_idx);
+		reg |= gate->cgr_val << gate->bit_idx;
+		writel(reg, gate->reg);
+	}
 
 out:
 	spin_unlock_irqrestore(gate->lock, flags);
 
-	return 0;
+	return ret;
 }
 
 static void clk_gate2_disable(struct clk_hw *hw)
@@ -73,9 +78,13 @@ static void clk_gate2_disable(struct clk_hw *hw)
 			goto out;
 	}
 
-	reg = readl(gate->reg);
-	reg &= ~(3 << gate->bit_idx);
-	writel(reg, gate->reg);
+	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
+		clk_gate_ops.disable(hw);
+	} else {
+		reg = readl(gate->reg);
+		reg &= ~(3 << gate->bit_idx);
+		writel(reg, gate->reg);
+	}
 
 out:
 	spin_unlock_irqrestore(gate->lock, flags);
@@ -95,6 +104,9 @@ static int clk_gate2_is_enabled(struct clk_hw *hw)
 {
 	struct clk_gate2 *gate = to_clk_gate2(hw);
 
+	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
+		return clk_gate_ops.is_enabled(hw);
+
 	return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
 }
 
@@ -104,6 +116,9 @@ static void clk_gate2_disable_unused(struct clk_hw *hw)
 	unsigned long flags;
 	u32 reg;
 
+	if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
+		return;
+
 	spin_lock_irqsave(gate->lock, flags);
 
 	if (!gate->share_count || *gate->share_count == 0) {
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index f074dd8..01ff1db 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -5,6 +5,8 @@
 #include <linux/spinlock.h>
 #include <linux/clk-provider.h>
 
+#define IMX_CLK_GATE2_SINGLE_BIT	1
+
 extern spinlock_t imx_ccm_lock;
 
 void imx_check_clocks(struct clk *clks[], unsigned int count);
@@ -355,6 +357,17 @@ static inline struct clk_hw *imx_clk_hw_gate2_shared2(const char *name,
 				  &imx_ccm_lock, share_count);
 }
 
+static inline struct clk_hw *imx_dev_clk_hw_gate_shared(struct device *dev,
+				const char *name, const char *parent,
+				void __iomem *reg, u8 shift,
+				unsigned int *share_count)
+{
+	return clk_hw_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT |
+					CLK_OPS_PARENT_ENABLE, reg, shift, 0x3,
+					IMX_CLK_GATE2_SINGLE_BIT,
+					&imx_ccm_lock, share_count);
+}
+
 static inline struct clk *imx_clk_gate2_cgr(const char *name,
 		const char *parent, void __iomem *reg, u8 shift, u8 cgr_val)
 {
-- 
2.7.4

Re: [PATCH v3 05/13] clk: imx: gate2: Allow single bit gating clock

[Stephen Boyd]

Quoting Abel Vesa (2020-04-15 01:02:45)
> Audiomix on i.MX8MP registers two gates that share the same enable count
> but use the same bit to control the gate instead of two bits. By adding
> the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
> gate ops for enable, disable and is_enabled.
> For the disable_unused, nothing happens if this flag is specified.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---

Reviewed-by: Stephen Boyd <sboyd@kernel.org>

Re: [PATCH v3 05/13] clk: imx: gate2: Allow single bit gating clock

[Shawn Guo]

On Wed, Apr 15, 2020 at 11:02:45AM +0300, Abel Vesa wrote:
> Audiomix on i.MX8MP registers two gates that share the same enable count
> but use the same bit to control the gate instead of two bits. By adding
> the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
> gate ops for enable, disable and is_enabled.
> For the disable_unused, nothing happens if this flag is specified.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

Applied, thanks.

[PATCH v3 06/13] clk: imx: pll14xx: Add the device as argument when registering

[Abel Vesa]

In order to allow runtime PM, the device needs to be passed on
to the register function. Audiomix clock controller, used on
i.MX8MP and future platforms, registers a pll14xx and has runtime
PM support.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
---
 drivers/clk/imx/clk-pll14xx.c |  8 ++++----
 drivers/clk/imx/clk.h         | 13 ++++++++++---
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index a83bbbe..f9eb189 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -378,9 +378,9 @@ static const struct clk_ops clk_pll1443x_ops = {
 	.set_rate	= clk_pll1443x_set_rate,
 };
 
-struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
-				  void __iomem *base,
-				  const struct imx_pll14xx_clk *pll_clk)
+struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
+				const char *parent_name, void __iomem *base,
+				const struct imx_pll14xx_clk *pll_clk)
 {
 	struct clk_pll14xx *pll;
 	struct clk_hw *hw;
@@ -426,7 +426,7 @@ struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
 
 	hw = &pll->hw;
 
-	ret = clk_hw_register(NULL, hw);
+	ret = clk_hw_register(dev, hw);
 	if (ret) {
 		pr_err("%s: failed to register pll %s %d\n",
 			__func__, name, ret);
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 01ff1db..fcd9952a 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -133,9 +133,9 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
 #define imx_clk_pll14xx(name, parent_name, base, pll_clk) \
 	to_clk(imx_clk_hw_pll14xx(name, parent_name, base, pll_clk))
 
-struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
-				  void __iomem *base,
-				  const struct imx_pll14xx_clk *pll_clk);
+struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
+				const char *parent_name, void __iomem *base,
+				const struct imx_pll14xx_clk *pll_clk);
 
 struct clk_hw *imx_clk_hw_pllv1(enum imx_pllv1_type type, const char *name,
 		const char *parent, void __iomem *base);
@@ -242,6 +242,13 @@ static inline struct clk *to_clk(struct clk_hw *hw)
 	return hw->clk;
 }
 
+static inline struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
+				  void __iomem *base,
+				  const struct imx_pll14xx_clk *pll_clk)
+{
+	return imx_dev_clk_hw_pll14xx(NULL, name, parent_name, base, pll_clk);
+}
+
 static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate)
 {
 	return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate);
-- 
2.7.4

Re: [PATCH v3 06/13] clk: imx: pll14xx: Add the device as argument when registering

[Shawn Guo]

On Wed, Apr 15, 2020 at 11:02:46AM +0300, Abel Vesa wrote:
> In order to allow runtime PM, the device needs to be passed on
> to the register function. Audiomix clock controller, used on
> i.MX8MP and future platforms, registers a pll14xx and has runtime
> PM support.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>

Applied, thanks.

[PATCH v3 07/13] clk: imx: Add helpers for passing the device as argument

[Abel Vesa]

All the imx clocks that need to be registered by the audiomix need to
pass on the device so that the runtime PM support could work properly.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk.h | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index fcd9952a..b91b1b1 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -319,6 +319,13 @@ static inline struct clk_hw *imx_clk_hw_gate(const char *name, const char *paren
 				    shift, 0, &imx_ccm_lock);
 }
 
+static inline struct clk_hw *imx_dev_clk_hw_gate(struct device *dev, const char *name,
+						const char *parent, void __iomem *reg, u8 shift)
+{
+	return clk_hw_register_gate(dev, name, parent, CLK_SET_RATE_PARENT, reg,
+				    shift, 0, &imx_ccm_lock);
+}
+
 static inline struct clk_hw *imx_clk_hw_gate_dis(const char *name, const char *parent,
 		void __iomem *reg, u8 shift)
 {
@@ -431,6 +438,15 @@ static inline struct clk_hw *imx_clk_hw_mux(const char *name, void __iomem *reg,
 			width, 0, &imx_ccm_lock);
 }
 
+static inline struct clk_hw *imx_dev_clk_hw_mux(struct device *dev,
+			const char *name, void __iomem *reg, u8 shift,
+			u8 width, const char * const *parents, int num_parents)
+{
+	return clk_hw_register_mux(dev, name, parents, num_parents,
+			CLK_SET_RATE_NO_REPARENT | CLK_SET_PARENT_GATE,
+			reg, shift, width, 0, &imx_ccm_lock);
+}
+
 static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg,
 			u8 shift, u8 width, const char * const *parents,
 			int num_parents)
@@ -493,6 +509,19 @@ static inline struct clk_hw *imx_clk_hw_mux_flags(const char *name,
 				   reg, shift, width, 0, &imx_ccm_lock);
 }
 
+static inline struct clk_hw *imx_dev_clk_hw_mux_flags(struct device *dev,
+						  const char *name,
+						  void __iomem *reg, u8 shift,
+						  u8 width,
+						  const char * const *parents,
+						  int num_parents,
+						  unsigned long flags)
+{
+	return clk_hw_register_mux(dev, name, parents, num_parents,
+				   flags | CLK_SET_RATE_NO_REPARENT,
+				   reg, shift, width, 0, &imx_ccm_lock);
+}
+
 struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name,
 		struct clk *div, struct clk *mux, struct clk *pll,
 		struct clk *step);
-- 
2.7.4

Re: [PATCH v3 07/13] clk: imx: Add helpers for passing the device as argument

[Shawn Guo]

On Wed, Apr 15, 2020 at 11:02:47AM +0300, Abel Vesa wrote:
> All the imx clocks that need to be registered by the audiomix need to
> pass on the device so that the runtime PM support could work properly.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>

Applied, thanks.

[PATCH v3 08/13] dt-bindings: clocks: imx8mp: Add ids for audiomix clocks

[Abel Vesa]

Add all the clock ids for the audiomix clocks.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
---
 include/dt-bindings/clock/imx8mp-clock.h | 62 ++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index 47ab082..305433f 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -298,4 +298,66 @@
 
 #define IMX8MP_CLK_END				289
 
+#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG		0
+#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1		1
+#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2		2
+#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3		3
+#define IMX8MP_CLK_AUDIOMIX_SAI2_IPG		4
+#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1		5
+#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2		6
+#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3		7
+#define IMX8MP_CLK_AUDIOMIX_SAI3_IPG		8
+#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1		9
+#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2		10
+#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3		11
+#define IMX8MP_CLK_AUDIOMIX_SAI5_IPG		12
+#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1		13
+#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2		14
+#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3		15
+#define IMX8MP_CLK_AUDIOMIX_SAI6_IPG		16
+#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1		17
+#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2		18
+#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3		19
+#define IMX8MP_CLK_AUDIOMIX_SAI7_IPG		20
+#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1		21
+#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2		22
+#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3		23
+#define IMX8MP_CLK_AUDIOMIX_ASRC_IPG		24
+#define IMX8MP_CLK_AUDIOMIX_PDM_IPG		25
+#define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT		26
+#define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT		27
+#define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT		28
+#define IMX8MP_CLK_AUDIOMIX_DSP_ROOT		29
+#define IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT		30
+#define IMX8MP_CLK_AUDIOMIX_EARC_IPG		31
+#define IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG		32
+#define IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG		33
+#define IMX8MP_CLK_AUDIOMIX_EDMA_ROOT		34
+#define IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT		35
+#define IMX8MP_CLK_AUDIOMIX_MU2_ROOT		36
+#define IMX8MP_CLK_AUDIOMIX_MU3_ROOT		37
+#define IMX8MP_CLK_AUDIOMIX_EARC_PHY		38
+#define IMX8MP_CLK_AUDIOMIX_PDM_ROOT		39
+#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL	40
+#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL	41
+#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL	42
+#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL	43
+#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL	44
+#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL	45
+#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK1_SEL	46
+#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK2_SEL	47
+#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL	48
+#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL	49
+#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL	50
+#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL	51
+#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL	52
+#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL	53
+#define IMX8MP_CLK_AUDIOMIX_PDM_SEL		54
+#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL	55
+#define IMX8MP_CLK_AUDIOMIX_SAI_PLL		56
+#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS	57
+#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT		58
+
+#define IMX8MP_CLK_AUDIOMIX_END			59
+
 #endif
-- 
2.7.4

Re: [PATCH v3 08/13] dt-bindings: clocks: imx8mp: Add ids for audiomix clocks

[Shawn Guo]

On Wed, Apr 15, 2020 at 11:02:48AM +0300, Abel Vesa wrote:
> Add all the clock ids for the audiomix clocks.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> Acked-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>

Applied, thanks.

[PATCH v3 09/13] clk: imx: Add audiomix clock controller support

[Abel Vesa]

The imx-mix MFD driver registers some devices, one of which, in case of
audiomix, maps correctly to a clock controller type. This driver registers
a clock controller for that.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/clk/imx/Makefile       |   2 +-
 drivers/clk/imx/clk-audiomix.c | 175 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 176 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/imx/clk-audiomix.c

diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 928f874c..afa54c1 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -27,7 +27,7 @@ obj-$(CONFIG_MXC_CLK_SCU) += \
 
 obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o
 obj-$(CONFIG_CLK_IMX8MN) += clk-imx8mn.o
-obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o
+obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o clk-audiomix.o
 obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o
 obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o
 
diff --git a/drivers/clk/imx/clk-audiomix.c b/drivers/clk/imx/clk-audiomix.c
new file mode 100644
index 00000000..aa48b06
--- /dev/null
+++ b/drivers/clk/imx/clk-audiomix.c
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+
+#include "clk.h"
+
+static int shared_count_pdm;
+static struct clk_hw **hws;
+static struct clk_hw_onecell_data *clk_hw_data;
+static uint32_t audiomix_clk_saved_regs[14];
+static struct clk *clk_audio_root;
+static struct clk *clk_audio_ahb;
+static struct clk *clk_audio_axi_div;
+
+static const struct imx_pll14xx_rate_table imx_audiomix_sai_pll_tbl[] = {
+	PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
+};
+
+static const struct imx_pll14xx_clk imx_audiomix_sai_pll = {
+	.type = PLL_1443X,
+	.rate_table = imx_audiomix_sai_pll_tbl,
+};
+
+static const char * const imx_sai_mclk2_sels[] = {"sai1", "sai2", "sai3", "dummy",
+					"sai5", "sai6", "sai7", "dummy",
+					"dummy", "dummy", "dummy",
+					"dummy", "dummy", "dummy", "dummy"};
+static const char * const imx_sai1_mclk1_sels[] = {"sai1", "dummy", };
+static const char * const imx_sai2_mclk1_sels[] = {"sai2", "dummy", };
+static const char * const imx_sai3_mclk1_sels[] = {"sai3", "dummy", };
+static const char * const imx_sai5_mclk1_sels[] = {"sai5", "dummy", };
+static const char * const imx_sai6_mclk1_sels[] = {"sai6", "dummy", };
+static const char * const imx_sai7_mclk1_sels[] = {"sai7", "dummy", };
+static const char * const imx_pdm_sels[] = {"pdm", "sai_pll_div2", "dummy", "dummy" };
+static const char * const imx_sai_pll_ref_sels[] = {"osc_24m", "dummy", "dummy", "dummy", };
+static const char * const imx_sai_pll_bypass_sels[] = {"sai_pll", "sai_pll_ref_sel", };
+
+static int imx_audiomix_clk_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	void __iomem *base;
+
+	clk_audio_root = devm_clk_get(dev, "audio_root");
+	if (IS_ERR(clk_audio_root))
+		return PTR_ERR(clk_audio_root);
+
+	clk_audio_ahb = devm_clk_get(dev, "audio_ahb");
+	if (IS_ERR(clk_audio_ahb))
+		return PTR_ERR(clk_audio_ahb);
+
+	clk_audio_axi_div = devm_clk_get(dev, "audio_axi_div");
+	if (IS_ERR(clk_audio_axi_div))
+		return PTR_ERR(clk_audio_axi_div);
+
+	base = dev_get_drvdata(dev->parent);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
+				IMX8MP_CLK_AUDIOMIX_END), GFP_KERNEL);
+	if (WARN_ON(!clk_hw_data))
+		return -ENOMEM;
+
+	clk_prepare_enable(clk_audio_ahb);
+	clk_prepare_enable(clk_audio_root);
+	clk_prepare_enable(clk_audio_axi_div);
+
+	clk_hw_data->num = IMX8MP_CLK_AUDIOMIX_END;
+	hws = clk_hw_data->hws;
+
+	hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL] = imx_dev_clk_hw_mux(dev, "sai_pll_ref_sel", base + 0x400, 0, 2, imx_sai_pll_ref_sels, ARRAY_SIZE(imx_sai_pll_ref_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL] = imx_dev_clk_hw_pll14xx(dev, "sai_pll", "sai_pll_ref_sel", base + 0x400, &imx_audiomix_sai_pll);
+
+	hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = imx_dev_clk_hw_mux_flags(dev, "sai_pll_bypass", base + 0x400, 4, 1, imx_sai_pll_bypass_sels, ARRAY_SIZE(imx_sai_pll_bypass_sels), CLK_SET_RATE_PARENT);
+
+	hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = imx_dev_clk_hw_gate(dev, "sai_pll_out", "sai_pll_bypass", base + 0x400, 13);
+
+	hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL] = imx_dev_clk_hw_mux_flags(dev, "sai1_mclk1_sel", base + 0x300, 0, 1, imx_sai1_mclk1_sels, ARRAY_SIZE(imx_sai1_mclk1_sels), CLK_SET_RATE_PARENT);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai1_mclk2_sel", base + 0x300, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL] = imx_dev_clk_hw_mux_flags(dev, "sai2_mclk1_sel", base + 0x304, 0, 1, imx_sai2_mclk1_sels, ARRAY_SIZE(imx_sai2_mclk1_sels), CLK_SET_RATE_PARENT);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai2_mclk2_sel", base + 0x304, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL] = imx_dev_clk_hw_mux_flags(dev, "sai3_mclk1_sel", base + 0x308, 0, 1, imx_sai3_mclk1_sels, ARRAY_SIZE(imx_sai3_mclk1_sels), CLK_SET_RATE_PARENT);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai3_mclk2_sel", base + 0x308, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL] = imx_dev_clk_hw_mux(dev, "sai5_mclk1_sel", base + 0x30C, 0, 1, imx_sai5_mclk1_sels, ARRAY_SIZE(imx_sai5_mclk1_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai5_mclk2_sel", base + 0x30C, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL] = imx_dev_clk_hw_mux(dev, "sai6_mclk1_sel", base + 0x310, 0, 1, imx_sai6_mclk1_sels, ARRAY_SIZE(imx_sai6_mclk1_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai6_mclk2_sel", base + 0x310, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL] = imx_dev_clk_hw_mux(dev, "sai7_mclk1_sel", base + 0x314, 0, 1, imx_sai7_mclk1_sels, ARRAY_SIZE(imx_sai7_mclk1_sels));
+	hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai7_mclk2_sel", base + 0x314, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels));
+
+	hws[IMX8MP_CLK_AUDIOMIX_SAI1_IPG]    = imx_dev_clk_hw_gate(dev, "sai1_ipg_clk",   "ipg_audio_root", base, 0);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1]  = imx_dev_clk_hw_gate(dev, "sai1_mclk1_clk", "sai1_mclk1_sel", base, 1);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2]  = imx_dev_clk_hw_gate(dev, "sai1_mclk2_clk", "sai1_mclk2_sel", base, 2);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3]  = imx_dev_clk_hw_gate(dev, "sai1_mclk3_clk", "sai_pll_out", base, 3);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI2_IPG]    = imx_dev_clk_hw_gate(dev, "sai2_ipg_clk",   "ipg_audio_root", base, 4);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1]  = imx_dev_clk_hw_gate(dev, "sai2_mclk1_clk", "sai2_mclk1_sel", base, 5);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2]  = imx_dev_clk_hw_gate(dev, "sai2_mclk2_clk", "sai2_mclk2_sel", base, 6);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3]  = imx_dev_clk_hw_gate(dev, "sai2_mclk3_clk", "sai_pll_out", base, 7);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI3_IPG]    = imx_dev_clk_hw_gate(dev, "sai3_ipg_clk",   "ipg_audio_root", base, 8);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1]  = imx_dev_clk_hw_gate(dev, "sai3_mclk1_clk", "sai3_mclk1_sel", base, 9);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2]  = imx_dev_clk_hw_gate(dev, "sai3_mclk2_clk", "sai3_mclk2_sel", base, 10);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3]  = imx_dev_clk_hw_gate(dev, "sai3_mclk3_clk", "sai_pll_out", base, 11);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI5_IPG]    = imx_dev_clk_hw_gate(dev, "sai5_ipg_clk",   "ipg_audio_root", base, 12);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1]  = imx_dev_clk_hw_gate(dev, "sai5_mclk1_clk", "sai5_mclk1_sel", base, 13);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2]  = imx_dev_clk_hw_gate(dev, "sai5_mclk2_clk", "sai5_mclk2_sel", base, 14);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3]  = imx_dev_clk_hw_gate(dev, "sai5_mclk3_clk", "sai_pll_out", base, 15);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI6_IPG]    = imx_dev_clk_hw_gate(dev, "sai6_ipg_clk",   "ipg_audio_root", base, 16);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1]  = imx_dev_clk_hw_gate(dev, "sai6_mclk1_clk", "sai6_mclk1_sel", base, 17);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2]  = imx_dev_clk_hw_gate(dev, "sai6_mclk2_clk", "sai6_mclk2_sel", base, 18);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3]  = imx_dev_clk_hw_gate(dev, "sai6_mclk3_clk", "sai_pll_out", base, 19);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI7_IPG]    = imx_dev_clk_hw_gate(dev, "sai7_ipg_clk",   "ipg_audio_root", base, 20);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1]  = imx_dev_clk_hw_gate(dev, "sai7_mclk1_clk", "sai7_mclk1_sel", base, 21);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2]  = imx_dev_clk_hw_gate(dev, "sai7_mclk2_clk", "sai7_mclk2_sel", base, 22);
+	hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3]  = imx_dev_clk_hw_gate(dev, "sai7_mclk3_clk", "sai_pll_out", base, 23);
+	hws[IMX8MP_CLK_AUDIOMIX_ASRC_IPG]    = imx_dev_clk_hw_gate(dev, "asrc_ipg_clk",   "ipg_audio_root", base, 24);
+	hws[IMX8MP_CLK_AUDIOMIX_PDM_IPG]     = imx_dev_clk_hw_gate_shared(dev, "pdm_ipg_clk", "ipg_audio_root", base, 25, &shared_count_pdm);
+	hws[IMX8MP_CLK_AUDIOMIX_PDM_ROOT]    = imx_dev_clk_hw_gate_shared(dev, "pdm_root_clk", "pdm", base, 25, &shared_count_pdm);
+
+	hws[IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT]  = imx_dev_clk_hw_gate(dev, "sdma2_root_clk", "ipg_audio_root", base, 26);
+	hws[IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT]  = imx_dev_clk_hw_gate(dev, "sdma3_root_clk", "ipg_audio_root", base, 27);
+	hws[IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT]  = imx_dev_clk_hw_gate(dev, "spba2_root_clk", "ipg_audio_root", base, 28);
+	hws[IMX8MP_CLK_AUDIOMIX_DSP_ROOT]    = imx_dev_clk_hw_gate(dev, "dsp_root_clk",   "ipg_audio_root", base, 29);
+	hws[IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT] = imx_dev_clk_hw_gate(dev, "dsp_dbg_clk",    "ipg_audio_root", base, 30);
+	hws[IMX8MP_CLK_AUDIOMIX_EARC_IPG]    = imx_dev_clk_hw_gate(dev, "earc_ipg_clk",   "ipg_audio_root", base, 31);
+
+	hws[IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG]  = imx_dev_clk_hw_gate(dev, "ocram_a_ipg_clk", "ipg_audio_root", base + 4, 0);
+	hws[IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG] = imx_dev_clk_hw_gate(dev, "aud2htx_ipg_clk", "ipg_audio_root", base + 4, 1);
+	hws[IMX8MP_CLK_AUDIOMIX_EDMA_ROOT]   = imx_dev_clk_hw_gate(dev, "edma_root_clk",   "ipg_audio_root", base + 4, 2);
+	hws[IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT] = imx_dev_clk_hw_gate(dev, "aud_pll_clk",  "ipg_audio_root", base + 4, 3);
+	hws[IMX8MP_CLK_AUDIOMIX_MU2_ROOT]    = imx_dev_clk_hw_gate(dev, "mu2_root_clk", "ipg_audio_root", base + 4, 4);
+	hws[IMX8MP_CLK_AUDIOMIX_MU3_ROOT]    = imx_dev_clk_hw_gate(dev, "mu3_root_clk", "ipg_audio_root", base + 4, 5);
+	hws[IMX8MP_CLK_AUDIOMIX_EARC_PHY]    = imx_dev_clk_hw_gate(dev, "earc_phy_clk", "ipg_audio_root", base + 4, 6);
+
+	hws[IMX8MP_CLK_AUDIOMIX_PDM_SEL] = imx_dev_clk_hw_mux(dev, "pdm_sel", base + 0x318, 1, 4, imx_pdm_sels, ARRAY_SIZE(imx_pdm_sels));
+
+	/* unbypass the pll */
+	clk_hw_set_parent(hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS],
+				hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL]);
+
+	imx_check_clk_hws(hws, IMX8MP_CLK_AUDIOMIX_END);
+
+	of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
+				clk_hw_data);
+
+	return 0;
+}
+
+static const struct of_device_id imx_audiomix_clk_of_match[] = {
+	{ .compatible = "fsl,imx8mp-audiomix-clk" },
+	{ /* Sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, imx_audiomix_clk_of_match);
+
+
+static struct platform_driver imx_audiomix_clk_driver = {
+	.probe = imx_audiomix_clk_probe,
+	.driver = {
+		.name = "imx-audiomix-clk",
+		.of_match_table = of_match_ptr(imx_audiomix_clk_of_match),
+	},
+};
+module_platform_driver(imx_audiomix_clk_driver);
-- 
2.7.4

Re: [PATCH v3 09/13] clk: imx: Add audiomix clock controller support

[Stephen Boyd]

Quoting Abel Vesa (2020-04-15 01:02:49)
> diff --git a/drivers/clk/imx/clk-audiomix.c b/drivers/clk/imx/clk-audiomix.c
> new file mode 100644
> index 00000000..aa48b06
> --- /dev/null
> +++ b/drivers/clk/imx/clk-audiomix.c
> @@ -0,0 +1,175 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright 2019 NXP.
> + */
> +
> +#include <dt-bindings/clock/imx8mp-clock.h>
> +#include <linux/clk.h>

Include <linux/clk-provider.h> because this is a clk provider.

> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>

Is this include used?

> +#include <linux/slab.h>
> +#include <linux/types.h>
> +
> +#include "clk.h"
> +
> +static int shared_count_pdm;
> +static struct clk_hw **hws;
> +static struct clk_hw_onecell_data *clk_hw_data;
> +static uint32_t audiomix_clk_saved_regs[14];
> +static struct clk *clk_audio_root;
> +static struct clk *clk_audio_ahb;
> +static struct clk *clk_audio_axi_div;
> +
> +static const struct imx_pll14xx_rate_table imx_audiomix_sai_pll_tbl[] = {
> +       PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
> +};
> +
> +static const struct imx_pll14xx_clk imx_audiomix_sai_pll = {
> +       .type = PLL_1443X,
> +       .rate_table = imx_audiomix_sai_pll_tbl,
> +};
> +
> +static const char * const imx_sai_mclk2_sels[] = {"sai1", "sai2", "sai3", "dummy",
> +                                       "sai5", "sai6", "sai7", "dummy",
> +                                       "dummy", "dummy", "dummy",
> +                                       "dummy", "dummy", "dummy", "dummy"};
> +static const char * const imx_sai1_mclk1_sels[] = {"sai1", "dummy", };
> +static const char * const imx_sai2_mclk1_sels[] = {"sai2", "dummy", };
> +static const char * const imx_sai3_mclk1_sels[] = {"sai3", "dummy", };
> +static const char * const imx_sai5_mclk1_sels[] = {"sai5", "dummy", };
> +static const char * const imx_sai6_mclk1_sels[] = {"sai6", "dummy", };
> +static const char * const imx_sai7_mclk1_sels[] = {"sai7", "dummy", };
> +static const char * const imx_pdm_sels[] = {"pdm", "sai_pll_div2", "dummy", "dummy" };
> +static const char * const imx_sai_pll_ref_sels[] = {"osc_24m", "dummy", "dummy", "dummy", };
> +static const char * const imx_sai_pll_bypass_sels[] = {"sai_pll", "sai_pll_ref_sel", };
> +
> +static int imx_audiomix_clk_probe(struct platform_device *pdev)
[..]
> +
> +       /* unbypass the pll */
> +       clk_hw_set_parent(hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS],
> +                               hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL]);
> +
> +       imx_check_clk_hws(hws, IMX8MP_CLK_AUDIOMIX_END);
> +
> +       of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
> +                               clk_hw_data);

What if this fails?

> +
> +       return 0;
> +}
> +
> +static const struct of_device_id imx_audiomix_clk_of_match[] = {
> +       { .compatible = "fsl,imx8mp-audiomix-clk" },
> +       { /* Sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, imx_audiomix_clk_of_match);
> +
> +

Nitpick: Remove double newline?

> +static struct platform_driver imx_audiomix_clk_driver = {
> +       .probe = imx_audiomix_clk_probe,
> +       .driver = {
> +               .name = "imx-audiomix-clk",
> +               .of_match_table = of_match_ptr(imx_audiomix_clk_of_match),

Add suppress_bind_attr here so that this can't be removed from
userspace?

> +       },
> +};
> +module_platform_driver(imx_audiomix_clk_driver);

[PATCH v3 10/13] arm64: dts: imx8mp: Add audiomix clock controller node

[Abel Vesa]

Add the audiomix clock controller as part of the audiomix MFD.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 3e4c376..03ace7f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -659,6 +659,17 @@
 			audiomix: audiomix@30e20000 {
 				compatible = "fsl,imx8mp-mix";
 				reg = <0x30e20000 0x10000>;
+
+				audiomix_clk: clock-controller {
+					compatible = "fsl,imx8mp-audiomix-clk";
+					#clock-cells = <1>;
+					clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
+						 <&clk IMX8MP_CLK_AUDIO_AHB>,
+						 <&clk IMX8MP_CLK_AUDIO_AXI_DIV>;
+					clock-names = "audio_root",
+						      "audio_ahb",
+						      "audio_axi_div";
+				};
 			};
 		};
 
-- 
2.7.4

[PATCH v3 11/13] dt-bindings: reset: imx8mp: Add ids for audiomix reset

[Abel Vesa]

Add all the reset ids for the audiomix reset.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 include/dt-bindings/reset/imx-audiomix-reset.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 include/dt-bindings/reset/imx-audiomix-reset.h

diff --git a/include/dt-bindings/reset/imx-audiomix-reset.h b/include/dt-bindings/reset/imx-audiomix-reset.h
new file mode 100644
index 00000000..67392c3
--- /dev/null
+++ b/include/dt-bindings/reset/imx-audiomix-reset.h
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2019 NXP.
+ */
+
+#ifndef DT_BINDING_RESET_IMX_AUDIOMIX_H
+#define DT_BINDING_RESET_IMX_AUDIOMIX_H
+
+#define IMX_AUDIOMIX_EARC_RESET		0x0
+#define IMX_AUDIOMIX_EARC_PHY_RESET	0x1
+
+#define IMX_AUDIOMIX_RESET_NUM		2
+
+#endif
+
-- 
2.7.4

Re: [PATCH v3 11/13] dt-bindings: reset: imx8mp: Add ids for audiomix reset

[Arnd Bergmann]

On Wed, Apr 15, 2020 at 10:04 AM Abel Vesa <abel.vesa@nxp.com> wrote:
>
> Add all the reset ids for the audiomix reset.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  include/dt-bindings/reset/imx-audiomix-reset.h | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>  create mode 100644 include/dt-bindings/reset/imx-audiomix-reset.h
>
> diff --git a/include/dt-bindings/reset/imx-audiomix-reset.h b/include/dt-bindings/reset/imx-audiomix-reset.h
> new file mode 100644
> index 00000000..67392c3
> --- /dev/null
> +++ b/include/dt-bindings/reset/imx-audiomix-reset.h
> @@ -0,0 +1,15 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright 2019 NXP.
> + */
> +
> +#ifndef DT_BINDING_RESET_IMX_AUDIOMIX_H
> +#define DT_BINDING_RESET_IMX_AUDIOMIX_H
> +
> +#define IMX_AUDIOMIX_EARC_RESET                0x0
> +#define IMX_AUDIOMIX_EARC_PHY_RESET    0x1
> +
> +#define IMX_AUDIOMIX_RESET_NUM         2
> +

This list doesn't seem necessary, as the number you pass ends up
simply being the bit index in a single register.

In a case like this you should better not have macros at all, those
are only needed when there is no easy way to the numbers in
the DT into something the driver can make sense of.

       Arnd

[PATCH v3 12/13] reset: imx: Add audiomix reset controller support

[Abel Vesa]

The imx-mix MFD driver registers some devices, one of which, in case of
audiomix, maps correctly to a reset controller type. This driver registers
a reset controller for that. For now, only the EARC specific resets are added.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/reset/Kconfig              |   7 +++
 drivers/reset/Makefile             |   1 +
 drivers/reset/reset-imx-audiomix.c | 117 +++++++++++++++++++++++++++++++++++++
 3 files changed, 125 insertions(+)
 create mode 100644 drivers/reset/reset-imx-audiomix.c

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d9efbfd..2f8d9b3 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -81,6 +81,13 @@ config RESET_INTEL_GW
 	  Say Y to control the reset signals provided by reset controller.
 	  Otherwise, say N.
 
+config RESET_IMX_AUDIOMIX
+	bool "i.MX Audiomix Reset Driver" if COMPILE_TEST
+	depends on HAS_IOMEM
+	default ARCH_MXC
+	help
+	  This enables the audiomix reset controller driver for i.MX SoCs.
+
 config RESET_LANTIQ
 	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
 	default SOC_TYPE_XWAY
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 249ed35..cf23d38 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
 obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
 obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
+obj-$(CONFIG_RESET_IMX_AUDIOMIX) += reset-imx-audiomix.o
 obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
 obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
 obj-$(CONFIG_RESET_MESON) += reset-meson.o
diff --git a/drivers/reset/reset-imx-audiomix.c b/drivers/reset/reset-imx-audiomix.c
new file mode 100644
index 00000000..9533e41
--- /dev/null
+++ b/drivers/reset/reset-imx-audiomix.c
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include <dt-bindings/reset/imx-audiomix-reset.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#define IMX_AUDIOMIX_EARC_CTRL_REG	0x200
+
+#define IMX_AUDIOMIX_EARC_RESET_BIT	0x0
+#define IMX_AUDIOMIX_EARC_PHY_RESET_BIT	0x1
+
+struct imx_audiomix_reset_data {
+	void __iomem *base;
+	struct reset_controller_dev rcdev;
+	spinlock_t lock;
+};
+
+static int imx_audiomix_reset_set(struct reset_controller_dev *rcdev,
+			  unsigned long id, bool assert)
+{
+	struct imx_audiomix_reset_data *drvdata = container_of(rcdev,
+			struct imx_audiomix_reset_data, rcdev);
+	void __iomem *reg_addr = drvdata->base;
+	unsigned long flags;
+	unsigned int offset;
+	u32 reg;
+
+	switch (id) {
+	case IMX_AUDIOMIX_EARC_PHY_RESET:
+		reg_addr += IMX_AUDIOMIX_EARC_CTRL_REG;
+		offset = IMX_AUDIOMIX_EARC_PHY_RESET_BIT;
+		break;
+	case IMX_AUDIOMIX_EARC_RESET:
+		reg_addr += IMX_AUDIOMIX_EARC_CTRL_REG;
+		offset = IMX_AUDIOMIX_EARC_RESET_BIT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (assert) {
+		spin_lock_irqsave(&drvdata->lock, flags);
+		reg = readl(reg_addr);
+		writel(reg & ~BIT(offset), reg_addr);
+		spin_unlock_irqrestore(&drvdata->lock, flags);
+	} else {
+		spin_lock_irqsave(&drvdata->lock, flags);
+		reg = readl(reg_addr);
+		writel(reg | BIT(offset), reg_addr);
+		spin_unlock_irqrestore(&drvdata->lock, flags);
+	}
+
+	return 0;
+}
+
+static int imx_audiomix_reset_assert(struct reset_controller_dev *rcdev,
+			     unsigned long id)
+{
+	return imx_audiomix_reset_set(rcdev, id, true);
+}
+
+static int imx_audiomix_reset_deassert(struct reset_controller_dev *rcdev,
+			       unsigned long id)
+{
+	return imx_audiomix_reset_set(rcdev, id, false);
+}
+
+static const struct reset_control_ops imx_audiomix_reset_ops = {
+	.assert		= imx_audiomix_reset_assert,
+	.deassert	= imx_audiomix_reset_deassert,
+};
+
+static int imx_audiomix_reset_probe(struct platform_device *pdev)
+{
+	struct imx_audiomix_reset_data *drvdata;
+	struct device *dev = &pdev->dev;
+
+	drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
+	if (drvdata == NULL)
+		return -ENOMEM;
+
+	drvdata->base = dev_get_drvdata(dev->parent);
+
+	platform_set_drvdata(pdev, drvdata);
+
+	spin_lock_init(&drvdata->lock);
+
+	drvdata->rcdev.owner     = THIS_MODULE;
+	drvdata->rcdev.nr_resets = IMX_AUDIOMIX_RESET_NUM;
+	drvdata->rcdev.ops       = &imx_audiomix_reset_ops;
+	drvdata->rcdev.of_node   = dev->of_node;
+	drvdata->rcdev.dev	 = dev;
+
+	return devm_reset_controller_register(dev, &drvdata->rcdev);
+}
+
+static const struct of_device_id imx_audiomix_reset_dt_ids[] = {
+	{ .compatible = "fsl,imx8mp-audiomix-reset", },
+	{ /* sentinel */ },
+};
+
+static struct platform_driver imx_audiomix_reset_driver = {
+	.probe	= imx_audiomix_reset_probe,
+	.driver = {
+		.name		= KBUILD_MODNAME,
+		.of_match_table	= imx_audiomix_reset_dt_ids,
+	},
+};
+module_platform_driver(imx_audiomix_reset_driver);
-- 
2.7.4

Re: [PATCH v3 12/13] reset: imx: Add audiomix reset controller support

[Philipp Zabel]

Hi Abel,

On Wed, 2020-04-15 at 11:02 +0300, Abel Vesa wrote:
> The imx-mix MFD driver registers some devices, one of which, in case of
> audiomix, maps correctly to a reset controller type. This driver registers
> a reset controller for that. For now, only the EARC specific resets are added.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  drivers/reset/Kconfig              |   7 +++
>  drivers/reset/Makefile             |   1 +
>  drivers/reset/reset-imx-audiomix.c | 117 +++++++++++++++++++++++++++++++++++++
>  3 files changed, 125 insertions(+)
>  create mode 100644 drivers/reset/reset-imx-audiomix.c
> 
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index d9efbfd..2f8d9b3 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -81,6 +81,13 @@ config RESET_INTEL_GW
>  	  Say Y to control the reset signals provided by reset controller.
>  	  Otherwise, say N.
>  
> +config RESET_IMX_AUDIOMIX
> +	bool "i.MX Audiomix Reset Driver" if COMPILE_TEST
> +	depends on HAS_IOMEM
> +	default ARCH_MXC
> +	help
> +	  This enables the audiomix reset controller driver for i.MX SoCs.
> +
>  config RESET_LANTIQ
>  	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
>  	default SOC_TYPE_XWAY
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 249ed35..cf23d38 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
>  obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
>  obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
>  obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
> +obj-$(CONFIG_RESET_IMX_AUDIOMIX) += reset-imx-audiomix.o
>  obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
>  obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
>  obj-$(CONFIG_RESET_MESON) += reset-meson.o
> diff --git a/drivers/reset/reset-imx-audiomix.c b/drivers/reset/reset-imx-audiomix.c
> new file mode 100644
> index 00000000..9533e41
> --- /dev/null
> +++ b/drivers/reset/reset-imx-audiomix.c
> @@ -0,0 +1,117 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright 2019 NXP.
> + */
> +
> +#include <dt-bindings/reset/imx-audiomix-reset.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +
> +#define IMX_AUDIOMIX_EARC_CTRL_REG	0x200
> +
> +#define IMX_AUDIOMIX_EARC_RESET_BIT	0x0
> +#define IMX_AUDIOMIX_EARC_PHY_RESET_BIT	0x1
> +
> +struct imx_audiomix_reset_data {
> +	void __iomem *base;
> +	struct reset_controller_dev rcdev;
> +	spinlock_t lock;
> +};
> +
> +static int imx_audiomix_reset_set(struct reset_controller_dev *rcdev,
> +			  unsigned long id, bool assert)
> +{
> +	struct imx_audiomix_reset_data *drvdata = container_of(rcdev,
> +			struct imx_audiomix_reset_data, rcdev);
> +	void __iomem *reg_addr = drvdata->base;
> +	unsigned long flags;
> +	unsigned int offset;
> +	u32 reg;
> +
> +	switch (id) {
> +	case IMX_AUDIOMIX_EARC_PHY_RESET:
> +		reg_addr += IMX_AUDIOMIX_EARC_CTRL_REG;
> +		offset = IMX_AUDIOMIX_EARC_PHY_RESET_BIT;
> +		break;
> +	case IMX_AUDIOMIX_EARC_RESET:
> +		reg_addr += IMX_AUDIOMIX_EARC_CTRL_REG;
> +		offset = IMX_AUDIOMIX_EARC_RESET_BIT;
> +		break;

This switch is not necessary. Since reg_addr is the same for both bits,
you can just set it directly, once. And since (IMX_AUDIOMIX_EARC_RESET
== IMX_AUDIOMIX_EARC_RESET_BIT) and (IMX_AUDIOMIX_EARC_PHY_RESET ==
IMX_AUDIOMIX_EARC_PHY_RESET_BIT), you can just use BIT(id) instead of
BIT(offset) below.

> +	default:
> +		return -EINVAL;

This is already catched by the core, which doesn't allow
(id >= rcdev->nr_resets).

> +	}
> +
> +	if (assert) {
> +		spin_lock_irqsave(&drvdata->lock, flags);
> +		reg = readl(reg_addr);
> +		writel(reg & ~BIT(offset), reg_addr);
> +		spin_unlock_irqrestore(&drvdata->lock, flags);
> +	} else {
> +		spin_lock_irqsave(&drvdata->lock, flags);
> +		reg = readl(reg_addr);
> +		writel(reg | BIT(offset), reg_addr);
> +		spin_unlock_irqrestore(&drvdata->lock, flags);
> +	}

regards
Philipp

[PATCH v3 13/13] arm64: dts: imx8mp: Add audiomix reset controller node

[Abel Vesa]

Add the audiomix reset controller as part of the audiomix MFD.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 03ace7f..882c91ff 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -670,6 +670,11 @@
 						      "audio_ahb",
 						      "audio_axi_div";
 				};
+
+				audiomix_reset: reset-controller {
+					compatible = "fsl,imx8mp-audiomix-reset";
+					#reset-cells = <1>;
+				};
 			};
 		};
 
-- 
2.7.4