From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@suse.de>,
Alexandre Chartre <alexandre.chartre@oracle.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
x86 <x86@kernel.org>, LKML <linux-kernel@vger.kernel.org>
Subject: [tip: x86/mm] x86/tlb: Uninline nmi_uaccess_okay()
Date: Sun, 26 Apr 2020 18:42:48 -0000 [thread overview]
Message-ID: <158792656847.28353.4934739152990460407.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20200421092600.052543007@linutronix.de>
The following commit has been merged into the x86/mm branch of tip:
Commit-ID: af5c40c6ee057c5354930abdc4d34be013d0e9e0
Gitweb: https://git.kernel.org/tip/af5c40c6ee057c5354930abdc4d34be013d0e9e0
Author: Thomas Gleixner <tglx@linutronix.de>
AuthorDate: Tue, 21 Apr 2020 11:20:40 +02:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Sun, 26 Apr 2020 18:47:05 +02:00
x86/tlb: Uninline nmi_uaccess_okay()
cpu_tlbstate is exported because various TLB-related functions need
access to it, but cpu_tlbstate is sensitive information which should
only be accessed by well-contained kernel functions and not be directly
exposed to modules.
nmi_access_ok() is the last inline function which requires access to
cpu_tlbstate. Move it into the TLB code.
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200421092600.052543007@linutronix.de
---
arch/x86/include/asm/tlbflush.h | 33 +--------------------------------
arch/x86/mm/tlb.c | 32 +++++++++++++++++++++++++++++++-
2 files changed, 33 insertions(+), 32 deletions(-)
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 917deea..1c17f5a 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -247,38 +247,7 @@ struct tlb_state {
};
DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
-/*
- * Blindly accessing user memory from NMI context can be dangerous
- * if we're in the middle of switching the current user task or
- * switching the loaded mm. It can also be dangerous if we
- * interrupted some kernel code that was temporarily using a
- * different mm.
- */
-static inline bool nmi_uaccess_okay(void)
-{
- struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
- struct mm_struct *current_mm = current->mm;
-
- VM_WARN_ON_ONCE(!loaded_mm);
-
- /*
- * The condition we want to check is
- * current_mm->pgd == __va(read_cr3_pa()). This may be slow, though,
- * if we're running in a VM with shadow paging, and nmi_uaccess_okay()
- * is supposed to be reasonably fast.
- *
- * Instead, we check the almost equivalent but somewhat conservative
- * condition below, and we rely on the fact that switch_mm_irqs_off()
- * sets loaded_mm to LOADED_MM_SWITCHING before writing to CR3.
- */
- if (loaded_mm != current_mm)
- return false;
-
- VM_WARN_ON_ONCE(current_mm->pgd != __va(read_cr3_pa()));
-
- return true;
-}
-
+bool nmi_uaccess_okay(void);
#define nmi_uaccess_okay nmi_uaccess_okay
void cr4_update_irqsoff(unsigned long set, unsigned long clear);
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index aabf8c7..45426ae 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -1094,6 +1094,38 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
put_cpu();
}
+/*
+ * Blindly accessing user memory from NMI context can be dangerous
+ * if we're in the middle of switching the current user task or
+ * switching the loaded mm. It can also be dangerous if we
+ * interrupted some kernel code that was temporarily using a
+ * different mm.
+ */
+bool nmi_uaccess_okay(void)
+{
+ struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
+ struct mm_struct *current_mm = current->mm;
+
+ VM_WARN_ON_ONCE(!loaded_mm);
+
+ /*
+ * The condition we want to check is
+ * current_mm->pgd == __va(read_cr3_pa()). This may be slow, though,
+ * if we're running in a VM with shadow paging, and nmi_uaccess_okay()
+ * is supposed to be reasonably fast.
+ *
+ * Instead, we check the almost equivalent but somewhat conservative
+ * condition below, and we rely on the fact that switch_mm_irqs_off()
+ * sets loaded_mm to LOADED_MM_SWITCHING before writing to CR3.
+ */
+ if (loaded_mm != current_mm)
+ return false;
+
+ VM_WARN_ON_ONCE(current_mm->pgd != __va(read_cr3_pa()));
+
+ return true;
+}
+
static ssize_t tlbflush_read_file(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
next prev parent reply other threads:[~2020-04-26 18:43 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-21 9:20 [patch V2 00/16] x86/tlb: Unexport per-CPU tlbstate Thomas Gleixner
2020-04-21 9:20 ` [patch V2 01/16] x86/tlb: Uninline __get_current_cr3_fast() Thomas Gleixner
2020-04-21 17:04 ` Andy Lutomirski
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 02/16] x86/cpu: Uninline CR4 accessors Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] x86/cpu: Export native_write_cr4() only when CONFIG_LKTDM=m tip-bot2 for Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] x86/cpu: Uninline CR4 accessors tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 03/16] x86/cr4: Sanitize CR4.PCE update Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 04/16] x86/alternatives: Move temporary_mm helpers into C Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 05/16] x86/tlb: Move __flush_tlb() out of line Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 06/16] x86/tlb: Move __flush_tlb_global() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 07/16] x86/tlb: Move __flush_tlb_one_user() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 08/16] x86/tlb: Move __flush_tlb_one_kernel() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 09/16] x86/tlb: Move flush_tlb_others() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 10/16] x86/tlb: Move __flush_tlb_all() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 11/16] x86/tlb: Move paravirt_tlb_remove_table() to the usage site Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 12/16] x86/tlb: Move cr4_set_bits_and_update_boot() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 13/16] x86/tlb: Uninline nmi_uaccess_okay() Thomas Gleixner
2020-04-26 18:42 ` tip-bot2 for Thomas Gleixner [this message]
2020-04-21 9:20 ` [patch V2 14/16] x86/tlb: Move PCID helpers where they are used Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 15/16] xen/privcmd: Remove unneeded asm/tlb.h include Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 16/16] x86/tlb: Restrict access to tlbstate Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
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