From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Christoph Hellwig <hch@lst.de>,
Kees Cook <keescook@chromium.org>,
Alexandre Chartre <alexandre.chartre@oracle.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
Thomas Lendacky <Thomas.Lendacky@amd.com>,
Juergen Gross <jgross@suse.com>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>
Subject: [patch V2 12/16] x86/tlb: Move cr4_set_bits_and_update_boot() to the usage site
Date: Tue, 21 Apr 2020 11:20:39 +0200 [thread overview]
Message-ID: <20200421092559.940978251@linutronix.de> (raw)
In-Reply-To: 20200421092027.591582014@linutronix.de
No point in having this exposed.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/include/asm/tlbflush.h | 14 --------------
arch/x86/mm/init.c | 13 +++++++++++++
2 files changed, 13 insertions(+), 14 deletions(-)
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -322,23 +322,9 @@ static inline void cr4_clear_bits(unsign
local_irq_restore(flags);
}
-/*
- * Save some of cr4 feature set we're using (e.g. Pentium 4MB
- * enable and PPro Global page enable), so that any CPU's that boot
- * up after us can get the correct flags. This should only be used
- * during boot on the boot cpu.
- */
extern unsigned long mmu_cr4_features;
extern u32 *trampoline_cr4_features;
-static inline void cr4_set_bits_and_update_boot(unsigned long mask)
-{
- mmu_cr4_features |= mask;
- if (trampoline_cr4_features)
- *trampoline_cr4_features = mmu_cr4_features;
- cr4_set_bits(mask);
-}
-
extern void initialize_tlbstate_and_flush(void);
#define TLB_FLUSH_ALL -1UL
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -172,6 +172,19 @@ struct map_range {
static int page_size_mask;
+/*
+ * Save some of cr4 feature set we're using (e.g. Pentium 4MB
+ * enable and PPro Global page enable), so that any CPU's that boot
+ * up after us can get the correct flags. Invoked on the boot CPU.
+ */
+static inline void cr4_set_bits_and_update_boot(unsigned long mask)
+{
+ mmu_cr4_features |= mask;
+ if (trampoline_cr4_features)
+ *trampoline_cr4_features = mmu_cr4_features;
+ cr4_set_bits(mask);
+}
+
static void __init probe_page_size_mask(void)
{
/*
next prev parent reply other threads:[~2020-04-21 9:27 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-21 9:20 [patch V2 00/16] x86/tlb: Unexport per-CPU tlbstate Thomas Gleixner
2020-04-21 9:20 ` [patch V2 01/16] x86/tlb: Uninline __get_current_cr3_fast() Thomas Gleixner
2020-04-21 17:04 ` Andy Lutomirski
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 02/16] x86/cpu: Uninline CR4 accessors Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] x86/cpu: Export native_write_cr4() only when CONFIG_LKTDM=m tip-bot2 for Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] x86/cpu: Uninline CR4 accessors tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 03/16] x86/cr4: Sanitize CR4.PCE update Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 04/16] x86/alternatives: Move temporary_mm helpers into C Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 05/16] x86/tlb: Move __flush_tlb() out of line Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 06/16] x86/tlb: Move __flush_tlb_global() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 07/16] x86/tlb: Move __flush_tlb_one_user() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 08/16] x86/tlb: Move __flush_tlb_one_kernel() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 09/16] x86/tlb: Move flush_tlb_others() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 10/16] x86/tlb: Move __flush_tlb_all() " Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 11/16] x86/tlb: Move paravirt_tlb_remove_table() to the usage site Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` Thomas Gleixner [this message]
2020-04-26 18:42 ` [tip: x86/mm] x86/tlb: Move cr4_set_bits_and_update_boot() " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 13/16] x86/tlb: Uninline nmi_uaccess_okay() Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 14/16] x86/tlb: Move PCID helpers where they are used Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 15/16] xen/privcmd: Remove unneeded asm/tlb.h include Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
2020-04-21 9:20 ` [patch V2 16/16] x86/tlb: Restrict access to tlbstate Thomas Gleixner
2020-04-26 18:42 ` [tip: x86/mm] " tip-bot2 for Thomas Gleixner
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