From: Fenghua Yu <fenghua.yu@intel.com>
To: "Thomas Gleixner" <tglx@linutronix.de>,
"Peter Zijlstra" <peterz@infradead.org>,
"Borislav Petkov" <bp@alien8.de>,
"Ingo Molnar" <mingo@redhat.com>,
"Tony Luck" <tony.luck@intel.com>
Cc: "x86" <x86@kernel.org>,
"linux-kernel" <linux-kernel@vger.kernel.org>,
Fenghua Yu <fenghua.yu@intel.com>
Subject: [PATCH] x86/split_lock: Add Icelake microserver CPU model
Date: Thu, 30 Apr 2020 16:46:35 -0700 [thread overview]
Message-ID: <1588290395-2677-1-git-send-email-fenghua.yu@intel.com> (raw)
Icelake microserver CPU supports split lock detection while it doesn't
have the split lock enumeration bit in IA32_CORE_CAPABILITIES.
Enumerate the feature by model number.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
---
arch/x86/kernel/cpu/intel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index a19a680542ce..b59bc4ab2425 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -1135,6 +1135,7 @@ void switch_to_sld(unsigned long tifn)
static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, 0),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, 0),
+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, 0),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, 1),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, 1),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, 1),
--
2.19.1
next reply other threads:[~2020-04-30 23:47 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 23:46 Fenghua Yu [this message]
2020-05-14 16:55 ` [PATCH] x86/split_lock: Add Icelake microserver CPU model Fenghua Yu
2020-05-14 18:35 ` [tip: x86/splitlock] " tip-bot2 for Fenghua Yu
2020-05-28 19:12 ` [tip: x86/splitlock] x86/split_lock: Add Icelake microserver and Tigerlake CPU models tip-bot2 for Fenghua Yu
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