Re: [PATCH] x86/split_lock: Add Icelake microserver CPU model

From: Fenghua Yu <fenghua.yu@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Borislav Petkov <bp@alien8.de>, Ingo Molnar <mingo@redhat.com>,
	Tony Luck <tony.luck@intel.com>
Cc: x86 <x86@kernel.org>, linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86/split_lock: Add Icelake microserver CPU model
Date: Thu, 14 May 2020 09:55:13 -0700	[thread overview]
Message-ID: <20200514165510.GH242333@romley-ivt3.sc.intel.com> (raw)
In-Reply-To: <1588290395-2677-1-git-send-email-fenghua.yu@intel.com>

On Thu, Apr 30, 2020 at 04:46:35PM -0700, Fenghua Yu wrote:
> Icelake microserver CPU supports split lock detection while it doesn't
> have the split lock enumeration bit in IA32_CORE_CAPABILITIES.
> 
> Enumerate the feature by model number.
> 
> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
> Reviewed-by: Tony Luck <tony.luck@intel.com>
> ---
>  arch/x86/kernel/cpu/intel.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
> index a19a680542ce..b59bc4ab2425 100644
> --- a/arch/x86/kernel/cpu/intel.c
> +++ b/arch/x86/kernel/cpu/intel.c
> @@ -1135,6 +1135,7 @@ void switch_to_sld(unsigned long tifn)
>  static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {
>  	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		0),
>  	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L,		0),
> +	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,		0),
>  	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT,	1),
>  	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,	1),
>  	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L,	1),

Hi, Thomas,

Any comment on this patch? Will you accept this patch?

Thanks.

-Fenghua