From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
tsbogend@alpha.franken.de, paulburton@kernel.org,
jiaxun.yang@flygoat.com, chenhc@lemote.com, tglx@linutronix.de,
robh+dt@kernel.org, daniel.lezcano@linaro.org,
keescook@chromium.org, paul@crapouillou.net, krzk@kernel.org,
hns@goldelico.com, ebiederm@xmission.com,
dongsheng.qiu@ingenic.com, yanfei.li@ingenic.com,
sernia.zhou@foxmail.com, zhenwenjin@gmail.com
Subject: [PATCH v7 2/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP.
Date: Thu, 14 May 2020 02:46:13 +0800 [thread overview]
Message-ID: <1589395578-87441-4-git-send-email-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <1589395578-87441-1-git-send-email-zhouyanjie@wanyeetech.com>
Modify DTS, change tcu channel from 2 to 3, channel #0 and #1 for
per core local timer, #2 for clocksource.
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
Notes:
v1->v2:
No change.
v2->v3:
No change.
v3->v4:
Rebase on top of kernel 5.6-rc1.
v4->v5:
Move [5/6] in v4 to this patch, to ensure that we can
git-bisect without ending up with a broken kernel.
v5->v6:
No change.
v6->v7:
Remove unnecessary "ingenic,pwm-channels-mask".
arch/mips/boot/dts/ingenic/ci20.dts | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index db0ca25..06e3186 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -486,7 +486,12 @@
};
&tcu {
- /* 3 MHz for the system timer and clocksource */
- assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
- assigned-clock-rates = <3000000>, <3000000>;
+ /*
+ * 750 kHz for the system timers and clocksource,
+ * use channel #0 and #1 for the per cpu system timers,
+ * and use channel #2 for the clocksource.
+ */
+ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
+ <&tcu TCU_CLK_TIMER2>;
+ assigned-clock-rates = <750000>, <750000>, <750000>;
};
--
2.7.4
next prev parent reply other threads:[~2020-05-13 18:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-13 18:46 Introduce SMP support for CI20 (based on JZ4780) v7 周琰杰 (Zhou Yanjie)
2020-05-13 18:46 ` [PATCH v7 0/6] Introduce SMP support for CI20 (based on JZ4780) 周琰杰 (Zhou Yanjie)
2020-05-13 18:46 ` [PATCH v7 1/6] MIPS: JZ4780: Introduce SMP support 周琰杰 (Zhou Yanjie)
2020-05-13 18:46 ` 周琰杰 (Zhou Yanjie) [this message]
2020-05-13 18:46 ` [PATCH v7 3/6] clocksource: Ingenic: Add high resolution timer support for SMP 周琰杰 (Zhou Yanjie)
2020-05-14 14:10 ` kbuild test robot
2020-05-13 18:46 ` [PATCH v7 4/6] dt-bindings: MIPS: Document Ingenic SoCs binding 周琰杰 (Zhou Yanjie)
2020-05-13 18:46 ` [PATCH v7 5/6] MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2020-05-13 18:46 ` [PATCH v7 6/6] MIPS: CI20: Update defconfig to support SMP 周琰杰 (Zhou Yanjie)
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