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* [PATCH v2 0/2] Bug fixes for FPGA DFL
@ 2020-07-13  6:10 Xu Yilun
  2020-07-13  6:10 ` [PATCH v2 1/2] fpga: dfl: pci: reduce the scope of variable 'ret' Xu Yilun
  2020-07-13  6:10 ` [PATCH v2 2/2] fpga: dfl: fix bug in port reset handshake Xu Yilun
  0 siblings, 2 replies; 3+ messages in thread
From: Xu Yilun @ 2020-07-13  6:10 UTC (permalink / raw)
  To: mdf, linux-fpga, linux-kernel; +Cc: lgoncalv, trix, Xu Yilun

2 fix patches for FPGA DFL.

v2 adds Reviewed-by of Tom. No code change.

Matthew Gerlach (1):
  fpga: dfl: fix bug in port reset handshake

Xu Yilun (1):
  fpga: dfl: pci: reduce the scope of variable 'ret'

 drivers/fpga/dfl-afu-main.c | 3 ++-
 drivers/fpga/dfl-pci.c      | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

-- 
2.7.4


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH v2 1/2] fpga: dfl: pci: reduce the scope of variable 'ret'
  2020-07-13  6:10 [PATCH v2 0/2] Bug fixes for FPGA DFL Xu Yilun
@ 2020-07-13  6:10 ` Xu Yilun
  2020-07-13  6:10 ` [PATCH v2 2/2] fpga: dfl: fix bug in port reset handshake Xu Yilun
  1 sibling, 0 replies; 3+ messages in thread
From: Xu Yilun @ 2020-07-13  6:10 UTC (permalink / raw)
  To: mdf, linux-fpga, linux-kernel; +Cc: lgoncalv, trix, Xu Yilun

This is to fix lkp cppcheck warnings:

 drivers/fpga/dfl-pci.c:230:6: warning: The scope of the variable 'ret' can be reduced. [variableScope]
    int ret = 0;
        ^

 drivers/fpga/dfl-pci.c:230:10: warning: Variable 'ret' is assigned a value that is never used. [unreadVariable]
    int ret = 0;
            ^

Fixes: 3c2760b78f90 ("fpga: dfl: pci: fix return value of cci_pci_sriov_configure")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Acked-by: Wu Hao <hao.wu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
---
v2: Add Reviewed-by of Tom, no code change.
---
 drivers/fpga/dfl-pci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
index 4a14a24..73b5153 100644
--- a/drivers/fpga/dfl-pci.c
+++ b/drivers/fpga/dfl-pci.c
@@ -285,7 +285,6 @@ static int cci_pci_sriov_configure(struct pci_dev *pcidev, int num_vfs)
 {
 	struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
 	struct dfl_fpga_cdev *cdev = drvdata->cdev;
-	int ret = 0;
 
 	if (!num_vfs) {
 		/*
@@ -297,6 +296,8 @@ static int cci_pci_sriov_configure(struct pci_dev *pcidev, int num_vfs)
 		dfl_fpga_cdev_config_ports_pf(cdev);
 
 	} else {
+		int ret;
+
 		/*
 		 * before enable SRIOV, put released ports into VF access mode
 		 * first of all.
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH v2 2/2] fpga: dfl: fix bug in port reset handshake
  2020-07-13  6:10 [PATCH v2 0/2] Bug fixes for FPGA DFL Xu Yilun
  2020-07-13  6:10 ` [PATCH v2 1/2] fpga: dfl: pci: reduce the scope of variable 'ret' Xu Yilun
@ 2020-07-13  6:10 ` Xu Yilun
  1 sibling, 0 replies; 3+ messages in thread
From: Xu Yilun @ 2020-07-13  6:10 UTC (permalink / raw)
  To: mdf, linux-fpga, linux-kernel; +Cc: lgoncalv, trix, Matthew Gerlach, Xu Yilun

From: Matthew Gerlach <matthew.gerlach@linux.intel.com>

When putting the port in reset, driver must wait for the soft reset
acknowledgment bit instead of the soft reset bit.

Fixes: 47c1b19c160f (fpga: dfl: afu: add port ops support)
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Acked-by: Wu Hao <hao.wu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
---
v2: add Reviewed-by of Tom, no code change.
---
 drivers/fpga/dfl-afu-main.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c
index 7c84fee..753cda4 100644
--- a/drivers/fpga/dfl-afu-main.c
+++ b/drivers/fpga/dfl-afu-main.c
@@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev)
 	 * on this port and minimum soft reset pulse width has elapsed.
 	 * Driver polls port_soft_reset_ack to determine if reset done by HW.
 	 */
-	if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST,
+	if (readq_poll_timeout(base + PORT_HDR_CTRL, v,
+			       v & PORT_CTRL_SFTRST_ACK,
 			       RST_POLL_INVL, RST_POLL_TIMEOUT)) {
 		dev_err(&pdev->dev, "timeout, fail to reset device\n");
 		return -ETIMEDOUT;
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-07-13  6:14 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-07-13  6:10 [PATCH v2 0/2] Bug fixes for FPGA DFL Xu Yilun
2020-07-13  6:10 ` [PATCH v2 1/2] fpga: dfl: pci: reduce the scope of variable 'ret' Xu Yilun
2020-07-13  6:10 ` [PATCH v2 2/2] fpga: dfl: fix bug in port reset handshake Xu Yilun

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