From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Cc: <linux-kernel@vger.kernel.org>, <matthias.bgg@gmail.com>,
<drinkcat@chromium.org>, <hsinyi@chromium.org>,
Collabora Kernel ML <kernel@collabora.com>,
<fparent@baylibre.com>, Matthias Brugger <mbrugger@suse.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v3 04/16] soc: mediatek: pm-domains: Add bus protection protocol
Date: Tue, 27 Oct 2020 19:07:49 +0800 [thread overview]
Message-ID: <1603796869.16422.2.camel@mtksdaap41> (raw)
In-Reply-To: <20201026175526.2915399-5-enric.balletbo@collabora.com>
On Mon, 2020-10-26 at 18:55 +0100, Enric Balletbo i Serra wrote:
> From: Matthias Brugger <mbrugger@suse.com>
>
> Bus protection will need to update more then one register
> in infracfg. Add support for several operations.
>
> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/soc/mediatek/mt8173-pm-domains.h | 4 +--
> drivers/soc/mediatek/mtk-pm-domains.c | 36 +++++++++++++++++-------
> drivers/soc/mediatek/mtk-pm-domains.h | 4 ++-
> 3 files changed, 31 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h b/drivers/soc/mediatek/mt8173-pm-domains.h
> index a2a624bbd8b8..341cc287c8ce 100644
> --- a/drivers/soc/mediatek/mt8173-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8173-pm-domains.h
> @@ -34,7 +34,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> .ctl_offs = SPM_DIS_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> - .bp_infracfg = {
> + .bp_infracfg[0] = {
> .bus_prot_reg_update = true,
> .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 |
> MT8173_TOP_AXI_PROT_EN_MM_M1,
> @@ -76,7 +76,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> .ctl_offs = SPM_MFG_PWR_CON,
> .sram_pdn_bits = GENMASK(13, 8),
> .sram_pdn_ack_bits = GENMASK(21, 16),
> - .bp_infracfg = {
> + .bp_infracfg[0] = {
> .bus_prot_reg_update = true,
> .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MFG_S |
> MT8173_TOP_AXI_PROT_EN_MFG_M0 |
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index 16503d6db6a8..2121e05cb9a4 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -89,24 +89,40 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
>
> static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
> {
> - const struct scpsys_bus_prot_data *bp_data = &pd->data->bp_infracfg;
> + const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg;
> + int i, ret;
>
> - if (!bp_data->bus_prot_mask)
> - return 0;
> + for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
> + if (!bpd[i].bus_prot_mask)
> + break;
>
> - return mtk_infracfg_set_bus_protection(pd->infracfg, bp_data->bus_prot_mask,
> - bp_data->bus_prot_reg_update);
> + ret = mtk_infracfg_set_bus_protection(pd->infracfg,
> + bpd[i].bus_prot_mask,
> + bpd[i].bus_prot_reg_update);
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> }
>
> static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
> {
> - const struct scpsys_bus_prot_data *bp_data = &pd->data->bp_infracfg;
> + const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg;
> + int i, ret;
>
> - if (!bp_data->bus_prot_mask)
> - return 0;
> + for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
I thought it should be
for (i = SPM_MAX_BUS_PROT_DATA - 1; i > 0; i--) {
if (!bpd[i].bus_prot_mask)
continue;
...
> + if (!bpd[i].bus_prot_mask)
> + return 0;
>
> - return mtk_infracfg_clear_bus_protection(pd->infracfg, bp_data->bus_prot_mask,
> - bp_data->bus_prot_reg_update);
> + ret = mtk_infracfg_clear_bus_protection(pd->infracfg,
> + bpd[i].bus_prot_mask,
> + bpd[i].bus_prot_reg_update);
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> }
>
> static int scpsys_power_on(struct generic_pm_domain *genpd)
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> index 7c8efcb3cef2..e428fe23a7e3 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.h
> +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> @@ -32,6 +32,8 @@
> #define PWR_STATUS_AUDIO BIT(24)
> #define PWR_STATUS_USB BIT(25)
>
> +#define SPM_MAX_BUS_PROT_DATA 3
> +
#define SPM_MAX_BUS_PROT_DATA 5
to be compatible with MT8192
> struct scpsys_bus_prot_data {
> u32 bus_prot_mask;
> bool bus_prot_reg_update;
> @@ -52,7 +54,7 @@ struct scpsys_domain_data {
> u32 sram_pdn_bits;
> u32 sram_pdn_ack_bits;
> u8 caps;
> - const struct scpsys_bus_prot_data bp_infracfg;
> + const struct scpsys_bus_prot_data bp_infracfg[SPM_MAX_BUS_PROT_DATA];
> };
>
> struct scpsys_soc_data {
next prev parent reply other threads:[~2020-10-27 11:08 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 17:55 [PATCH v3 00/16] soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 01/16] dt-bindings: power: Add bindings for the Mediatek " Enric Balletbo i Serra
2020-10-28 13:55 ` Rob Herring
2020-10-28 13:57 ` Rob Herring
2020-10-26 17:55 ` [PATCH v3 02/16] soc: mediatek: Add MediaTek SCPSYS power domains Enric Balletbo i Serra
2020-10-27 0:55 ` Nicolas Boichat
2020-10-30 10:54 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 03/16] arm64: dts: mediatek: Add mt8173 power domain controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 04/16] soc: mediatek: pm-domains: Add bus protection protocol Enric Balletbo i Serra
2020-10-27 0:58 ` Nicolas Boichat
2020-10-27 11:07 ` Weiyi Lu [this message]
2020-10-30 10:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 05/16] soc: mediatek: pm_domains: Make bus protection generic Enric Balletbo i Serra
2020-10-27 2:41 ` Nicolas Boichat
2020-10-27 12:57 ` Fabien Parent
2020-10-29 14:49 ` Matthias Brugger
2020-10-26 17:55 ` [PATCH v3 06/16] soc: mediatek: pm-domains: Add SMI block as bus protection block Enric Balletbo i Serra
2020-10-27 2:44 ` Nicolas Boichat
2020-10-30 10:56 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 07/16] soc: mediatek: pm-domains: Add extra sram control Enric Balletbo i Serra
2020-10-27 2:47 ` Nicolas Boichat
2020-10-26 17:55 ` [PATCH v3 08/16] soc: mediatek: pm-domains: Add subsystem clocks Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 09/16] soc: mediatek: pm-domains: Allow bus protection to ignore clear ack Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 10/16] dt-bindings: power: Add MT8183 power domains Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 11/16] soc: mediatek: pm-domains: Add support for mt8183 Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 12/16] arm64: dts: mediatek: Add smi_common node for MT8183 Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 13/16] arm64: dts: mediatek: Add mt8183 power domains controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 14/16] dt-bindings: power: Add MT8192 power domains Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 15/16] soc: mediatek: pm-domains: Add default power off flag Enric Balletbo i Serra
2020-10-27 10:53 ` Matthias Brugger
2020-10-27 11:18 ` Weiyi Lu
2020-10-29 14:51 ` Matthias Brugger
2020-10-30 11:17 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 16/16] soc: mediatek: pm-domains: Add support for mt8192 Enric Balletbo i Serra
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