From: Nicolas Boichat <drinkcat@chromium.org>
To: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Cc: lkml <linux-kernel@vger.kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Hsin-Yi Wang <hsinyi@chromium.org>,
Collabora Kernel ML <kernel@collabora.com>,
Fabien Parent <fparent@baylibre.com>,
Weiyi Lu <weiyi.lu@mediatek.com>,
Matthias Brugger <mbrugger@suse.com>,
Joerg Roedel <jroedel@suse.de>,
Miles Chen <miles.chen@mediatek.com>,
linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v3 05/16] soc: mediatek: pm_domains: Make bus protection generic
Date: Tue, 27 Oct 2020 10:41:12 +0800 [thread overview]
Message-ID: <CANMq1KBXBEWwweuGFYGTbVrhYXgdjZuwhWVC6SedArFH2GJHoQ@mail.gmail.com> (raw)
In-Reply-To: <20201026175526.2915399-6-enric.balletbo@collabora.com>
On Tue, Oct 27, 2020 at 1:55 AM Enric Balletbo i Serra
<enric.balletbo@collabora.com> wrote:
>
> From: Matthias Brugger <mbrugger@suse.com>
>
> Bus protection is not exclusively done by calling the infracfg misc driver.
> Make the calls for setting and clearing the bus protection generic so
> that we can use other blocks for it as well.
>
> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> drivers/soc/mediatek/mtk-infracfg.c | 5 ---
> drivers/soc/mediatek/mtk-pm-domains.c | 53 +++++++++++++++++++++------
> include/linux/soc/mediatek/infracfg.h | 5 +++
> 3 files changed, 47 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-infracfg.c b/drivers/soc/mediatek/mtk-infracfg.c
> index 4a123796aad3..0590b68e0d78 100644
> --- a/drivers/soc/mediatek/mtk-infracfg.c
> +++ b/drivers/soc/mediatek/mtk-infracfg.c
> @@ -12,11 +12,6 @@
> #define MTK_POLL_DELAY_US 10
> #define MTK_POLL_TIMEOUT (jiffies_to_usecs(HZ))
>
> -#define INFRA_TOPAXI_PROTECTEN 0x0220
> -#define INFRA_TOPAXI_PROTECTSTA1 0x0228
> -#define INFRA_TOPAXI_PROTECTEN_SET 0x0260
> -#define INFRA_TOPAXI_PROTECTEN_CLR 0x0264
> -
> /**
> * mtk_infracfg_set_bus_protection - enable bus protection
> * @infracfg: The infracfg regmap
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index 2121e05cb9a4..92c61e59255b 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -87,18 +87,24 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
> MTK_POLL_TIMEOUT);
> }
>
> -static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
> +static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, struct regmap *regmap)
> {
> - const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg;
> int i, ret;
>
> for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
> - if (!bpd[i].bus_prot_mask)
> + u32 val, mask = bpd[i].bus_prot_mask;
> +
> + if (!mask)
> break;
>
> - ret = mtk_infracfg_set_bus_protection(pd->infracfg,
> - bpd[i].bus_prot_mask,
> - bpd[i].bus_prot_reg_update);
> + if (bpd[i].bus_prot_reg_update)
> + regmap_update_bits(regmap, INFRA_TOPAXI_PROTECTEN, mask, mask);
> + else
> + regmap_write(regmap, INFRA_TOPAXI_PROTECTEN_SET, mask);
> +
> + ret = regmap_read_poll_timeout(regmap, INFRA_TOPAXI_PROTECTSTA1,
> + val, (val & mask) == mask,
> + MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> if (ret)
> return ret;
> }
> @@ -106,18 +112,34 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
> return 0;
> }
>
> -static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
> +static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
> {
> const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg;
> + int ret;
> +
> + ret = _scpsys_bus_protect_enable(bpd, pd->infracfg);
> + return ret;
> +}
> +
> +static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
> + struct regmap *regmap)
> +{
> int i, ret;
>
> for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
> - if (!bpd[i].bus_prot_mask)
> + u32 val, mask = bpd[i].bus_prot_mask;
> +
> + if (!mask)
> return 0;
>
> - ret = mtk_infracfg_clear_bus_protection(pd->infracfg,
> - bpd[i].bus_prot_mask,
> - bpd[i].bus_prot_reg_update);
> + if (bpd[i].bus_prot_reg_update)
> + regmap_update_bits(regmap, INFRA_TOPAXI_PROTECTEN, mask, 0);
> + else
> + regmap_write(regmap, INFRA_TOPAXI_PROTECTEN_CLR, mask);
> +
> + ret = regmap_read_poll_timeout(regmap, INFRA_TOPAXI_PROTECTSTA1,
> + val, !(val & mask),
> + MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> if (ret)
> return ret;
> }
> @@ -125,6 +147,15 @@ static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
> return 0;
> }
>
> +static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
> +{
> + const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg;
More of a nit: The next patch gets rid of this line, so maybe you
don't need to add it here.
Also `int ret` isn't really needed, but I think that's ok since the
next CL needs to add another call.
> + int ret;
> +
> + ret = _scpsys_bus_protect_disable(bpd, pd->infracfg);
> + return ret;
> +}
> +
> static int scpsys_power_on(struct generic_pm_domain *genpd)
> {
> struct scpsys_domain *pd = container_of(genpd, struct scpsys_domain, genpd);
> diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h
> index 233463d789c6..5bcaab767f6a 100644
> --- a/include/linux/soc/mediatek/infracfg.h
> +++ b/include/linux/soc/mediatek/infracfg.h
> @@ -32,6 +32,11 @@
> #define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \
> BIT(7) | BIT(8))
>
> +#define INFRA_TOPAXI_PROTECTEN 0x0220
> +#define INFRA_TOPAXI_PROTECTSTA1 0x0228
> +#define INFRA_TOPAXI_PROTECTEN_SET 0x0260
> +#define INFRA_TOPAXI_PROTECTEN_CLR 0x0264
> +
> #define REG_INFRA_MISC 0xf00
> #define F_DDR_4GB_SUPPORT_EN BIT(13)
>
> --
> 2.28.0
>
next prev parent reply other threads:[~2020-10-27 2:41 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 17:55 [PATCH v3 00/16] soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 01/16] dt-bindings: power: Add bindings for the Mediatek " Enric Balletbo i Serra
2020-10-28 13:55 ` Rob Herring
2020-10-28 13:57 ` Rob Herring
2020-10-26 17:55 ` [PATCH v3 02/16] soc: mediatek: Add MediaTek SCPSYS power domains Enric Balletbo i Serra
2020-10-27 0:55 ` Nicolas Boichat
2020-10-30 10:54 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 03/16] arm64: dts: mediatek: Add mt8173 power domain controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 04/16] soc: mediatek: pm-domains: Add bus protection protocol Enric Balletbo i Serra
2020-10-27 0:58 ` Nicolas Boichat
2020-10-27 11:07 ` Weiyi Lu
2020-10-30 10:55 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 05/16] soc: mediatek: pm_domains: Make bus protection generic Enric Balletbo i Serra
2020-10-27 2:41 ` Nicolas Boichat [this message]
2020-10-27 12:57 ` Fabien Parent
2020-10-29 14:49 ` Matthias Brugger
2020-10-26 17:55 ` [PATCH v3 06/16] soc: mediatek: pm-domains: Add SMI block as bus protection block Enric Balletbo i Serra
2020-10-27 2:44 ` Nicolas Boichat
2020-10-30 10:56 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 07/16] soc: mediatek: pm-domains: Add extra sram control Enric Balletbo i Serra
2020-10-27 2:47 ` Nicolas Boichat
2020-10-26 17:55 ` [PATCH v3 08/16] soc: mediatek: pm-domains: Add subsystem clocks Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 09/16] soc: mediatek: pm-domains: Allow bus protection to ignore clear ack Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 10/16] dt-bindings: power: Add MT8183 power domains Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 11/16] soc: mediatek: pm-domains: Add support for mt8183 Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 12/16] arm64: dts: mediatek: Add smi_common node for MT8183 Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 13/16] arm64: dts: mediatek: Add mt8183 power domains controller Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 14/16] dt-bindings: power: Add MT8192 power domains Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 15/16] soc: mediatek: pm-domains: Add default power off flag Enric Balletbo i Serra
2020-10-27 10:53 ` Matthias Brugger
2020-10-27 11:18 ` Weiyi Lu
2020-10-29 14:51 ` Matthias Brugger
2020-10-30 11:17 ` Enric Balletbo i Serra
2020-10-26 17:55 ` [PATCH v3 16/16] soc: mediatek: pm-domains: Add support for mt8192 Enric Balletbo i Serra
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