[PATCH v3 0/4] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC

[PATCH v3 0/4] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC

[Hsin-Hsiung Wang]

This series adds support for new SoC MT6873/8192 to the pmic-wrap driver.

changes since v2:
- refine some coding style about PWRAP_CAP_ARB capacity for better code quality

Hsin-Hsiung Wang (4):
  soc: mediatek: pwrap: use BIT() macro
  soc: mediatek: pwrap: add arbiter capability
  dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
  soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs

 .../devicetree/bindings/soc/mediatek/pwrap.txt     |  1 +
 drivers/soc/mediatek/mtk-pmic-wrap.c               | 90 +++++++++++++++++++---
 2 files changed, 80 insertions(+), 11 deletions(-)

-- 
2.6.4

[PATCH v3 1/4] soc: mediatek: pwrap: use BIT() macro

[Hsin-Hsiung Wang]

Use a better BIT() marco for the bit definition.
No functional changes, cleanup only.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 5d34e8b..c897205 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -27,8 +27,8 @@
 #define PWRAP_GET_WACS_RDATA(x)		(((x) >> 0) & 0x0000ffff)
 #define PWRAP_GET_WACS_FSM(x)		(((x) >> 16) & 0x00000007)
 #define PWRAP_GET_WACS_REQ(x)		(((x) >> 19) & 0x00000001)
-#define PWRAP_STATE_SYNC_IDLE0		(1 << 20)
-#define PWRAP_STATE_INIT_DONE0		(1 << 21)
+#define PWRAP_STATE_SYNC_IDLE0		BIT(20)
+#define PWRAP_STATE_INIT_DONE0		BIT(21)
 
 /* macro for WACS FSM */
 #define PWRAP_WACS_FSM_IDLE		0x00
-- 
2.6.4

[PATCH v3 2/4] soc: mediatek: pwrap: add arbiter capability

[Hsin-Hsiung Wang]

Add arbiter capability for pwrap driver.
This patch is preparing for adding mt6873/8192 pwrap support.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
 1 file changed, 48 insertions(+), 9 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index c897205..149bf02 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -25,10 +25,12 @@
 
 /* macro for wrapper status */
 #define PWRAP_GET_WACS_RDATA(x)		(((x) >> 0) & 0x0000ffff)
+#define PWRAP_GET_WACS_ARB_FSM(x)	(((x) >> 1) & 0x00000007)
 #define PWRAP_GET_WACS_FSM(x)		(((x) >> 16) & 0x00000007)
 #define PWRAP_GET_WACS_REQ(x)		(((x) >> 19) & 0x00000001)
 #define PWRAP_STATE_SYNC_IDLE0		BIT(20)
 #define PWRAP_STATE_INIT_DONE0		BIT(21)
+#define PWRAP_STATE_INIT_DONE1		BIT(15)
 
 /* macro for WACS FSM */
 #define PWRAP_WACS_FSM_IDLE		0x00
@@ -74,6 +76,7 @@
 #define PWRAP_CAP_DCM		BIT(2)
 #define PWRAP_CAP_INT1_EN	BIT(3)
 #define PWRAP_CAP_WDT_SRC1	BIT(4)
+#define PWRAP_CAP_ARB		BIT(5)
 
 /* defines for slave device wrapper registers */
 enum dew_regs {
@@ -340,6 +343,8 @@ enum pwrap_regs {
 	PWRAP_DCM_DBC_PRD,
 	PWRAP_EINT_STA0_ADR,
 	PWRAP_EINT_STA1_ADR,
+	PWRAP_SWINF_2_WDATA_31_0,
+	PWRAP_SWINF_2_RDATA_31_0,
 
 	/* MT2701 only regs */
 	PWRAP_ADC_CMD_ADDR,
@@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
 
 static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
 {
-	u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+	u32 val;
+
+	val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+		return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
 
 	return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
 }
 
 static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
 {
-	u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+	u32 val;
+
+	val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+		return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
 
 	return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
 }
@@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
 static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
 {
 	int ret;
+	u32 val;
 
 	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
 	if (ret) {
@@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
 		return ret;
 	}
 
-	pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
+	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+		val = adr;
+	else
+		val = (adr >> 1) << 16;
+	pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
 
 	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
 	if (ret)
 		return ret;
 
-	*rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
+	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+		val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
+	else
+		val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+	*rdata = PWRAP_GET_WACS_RDATA(val);
 
 	pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
 
@@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
 		return ret;
 	}
 
-	pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
-		     PWRAP_WACS2_CMD);
+	if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
+		pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
+			     PWRAP_WACS2_CMD);
+	} else {
+		pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
+		pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
+	}
 
 	return 0;
 }
@@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
 static int pwrap_probe(struct platform_device *pdev)
 {
 	int ret, irq;
+	u32 mask_done;
 	struct pmic_wrapper *wrp;
 	struct device_node *np = pdev->dev.of_node;
 	const struct of_device_id *of_slave_id = NULL;
@@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
 		}
 	}
 
-	if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
+	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+		mask_done = PWRAP_STATE_INIT_DONE1;
+	else
+		mask_done = PWRAP_STATE_INIT_DONE0;
+
+	if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
 		dev_dbg(wrp->dev, "initialization isn't finished\n");
 		ret = -ENODEV;
 		goto err_out2;
 	}
 
 	/* Initialize watchdog, may not be done by the bootloader */
-	pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
+	if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+		pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
+
 	/*
 	 * Since STAUPD was not used on mt8173 platform,
 	 * so STAUPD of WDT_SRC which should be turned off
@@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
 	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
 		pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
 
-	pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
+	if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+		pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
+	else
+		pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
+
 	pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
 	/*
 	 * We add INT1 interrupt to handle starvation and request exception
-- 
2.6.4

[PATCH v3 3/4] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap

[Hsin-Hsiung Wang]

This adds dt-binding documentation of pwrap for Mediatek MT6873/8192
SoCs Platform.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index ecac2bb..8051c17 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -22,6 +22,7 @@ Required properties in pwrap device node.
 	"mediatek,mt6765-pwrap" for MT6765 SoCs
 	"mediatek,mt6779-pwrap" for MT6779 SoCs
 	"mediatek,mt6797-pwrap" for MT6797 SoCs
+	"mediatek,mt6873-pwrap" for MT6873/8192 SoCs
 	"mediatek,mt7622-pwrap" for MT7622 SoCs
 	"mediatek,mt8135-pwrap" for MT8135 SoCs
 	"mediatek,mt8173-pwrap" for MT8173 SoCs
-- 
2.6.4

[PATCH v3 4/4] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs

[Hsin-Hsiung Wang]

MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
 drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 149bf02..c73e92b 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -632,6 +632,17 @@ static int mt6797_regs[] = {
 	[PWRAP_DCM_DBC_PRD] =		0x1D4,
 };
 
+static int mt6873_regs[] = {
+	[PWRAP_INIT_DONE2] =		0x0,
+	[PWRAP_TIMER_EN] =		0x3E0,
+	[PWRAP_INT_EN] =		0x448,
+	[PWRAP_WACS2_CMD] =		0xC80,
+	[PWRAP_SWINF_2_WDATA_31_0] =	0xC84,
+	[PWRAP_SWINF_2_RDATA_31_0] =	0xC94,
+	[PWRAP_WACS2_VLDCLR] =		0xCA4,
+	[PWRAP_WACS2_RDATA] =		0xCA8,
+};
+
 static int mt7622_regs[] = {
 	[PWRAP_MUX_SEL] =		0x0,
 	[PWRAP_WRAP_EN] =		0x4,
@@ -1050,6 +1061,7 @@ enum pwrap_type {
 	PWRAP_MT6765,
 	PWRAP_MT6779,
 	PWRAP_MT6797,
+	PWRAP_MT6873,
 	PWRAP_MT7622,
 	PWRAP_MT8135,
 	PWRAP_MT8173,
@@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 	case PWRAP_MT7622:
 		pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
 		break;
+	case PWRAP_MT6873:
 	case PWRAP_MT8183:
 		break;
 	}
@@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
 	.init_soc_specific = NULL,
 };
 
+static struct pmic_wrapper_type pwrap_mt6873 = {
+	.regs = mt6873_regs,
+	.type = PWRAP_MT6873,
+	.arb_en_all = 0x777f,
+	.int_en_all = BIT(4) | BIT(5),
+	.int1_en_all = 0,
+	.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+	.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+	.caps = PWRAP_CAP_ARB,
+	.init_reg_clock = pwrap_common_init_reg_clock,
+	.init_soc_specific = NULL,
+};
+
 static const struct pmic_wrapper_type pwrap_mt7622 = {
 	.regs = mt7622_regs,
 	.type = PWRAP_MT7622,
@@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
 		.compatible = "mediatek,mt6797-pwrap",
 		.data = &pwrap_mt6797,
 	}, {
+		.compatible = "mediatek,mt6873-pwrap",
+		.data = &pwrap_mt6873,
+	}, {
 		.compatible = "mediatek,mt7622-pwrap",
 		.data = &pwrap_mt7622,
 	}, {
-- 
2.6.4

Re: [PATCH v3 2/4] soc: mediatek: pwrap: add arbiter capability

[Matthias Brugger]

On 21/09/2020 13:03, Hsin-Hsiung Wang wrote:
> Add arbiter capability for pwrap driver.

Can you provide a bit more verbose commit message, please.

> This patch is preparing for adding mt6873/8192 pwrap support.
> 
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
>   drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
>   1 file changed, 48 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index c897205..149bf02 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -25,10 +25,12 @@
>   
>   /* macro for wrapper status */
>   #define PWRAP_GET_WACS_RDATA(x)		(((x) >> 0) & 0x0000ffff)
> +#define PWRAP_GET_WACS_ARB_FSM(x)	(((x) >> 1) & 0x00000007)
>   #define PWRAP_GET_WACS_FSM(x)		(((x) >> 16) & 0x00000007)
>   #define PWRAP_GET_WACS_REQ(x)		(((x) >> 19) & 0x00000001)
>   #define PWRAP_STATE_SYNC_IDLE0		BIT(20)
>   #define PWRAP_STATE_INIT_DONE0		BIT(21)
> +#define PWRAP_STATE_INIT_DONE1		BIT(15)
>   
>   /* macro for WACS FSM */
>   #define PWRAP_WACS_FSM_IDLE		0x00
> @@ -74,6 +76,7 @@
>   #define PWRAP_CAP_DCM		BIT(2)
>   #define PWRAP_CAP_INT1_EN	BIT(3)
>   #define PWRAP_CAP_WDT_SRC1	BIT(4)
> +#define PWRAP_CAP_ARB		BIT(5)
>   
>   /* defines for slave device wrapper registers */
>   enum dew_regs {
> @@ -340,6 +343,8 @@ enum pwrap_regs {
>   	PWRAP_DCM_DBC_PRD,
>   	PWRAP_EINT_STA0_ADR,
>   	PWRAP_EINT_STA1_ADR,
> +	PWRAP_SWINF_2_WDATA_31_0,
> +	PWRAP_SWINF_2_RDATA_31_0,
>   
>   	/* MT2701 only regs */
>   	PWRAP_ADC_CMD_ADDR,
> @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
>   
>   static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
>   {
> -	u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +	u32 val;
> +
> +	val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +		return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
>   
>   	return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
>   }
>   
>   static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
>   {
> -	u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +	u32 val;
> +
> +	val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +		return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
>   
>   	return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
>   }
> @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
>   static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
>   {
>   	int ret;
> +	u32 val;
>   
>   	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
>   	if (ret) {
> @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
>   		return ret;
>   	}
>   
> -	pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +		val = adr;
> +	else
> +		val = (adr >> 1) << 16;
> +	pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
>   
>   	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
>   	if (ret)
>   		return ret;
>   
> -	*rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +		val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
> +	else
> +		val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> +	*rdata = PWRAP_GET_WACS_RDATA(val);
>   
>   	pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
>   
> @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
>   		return ret;
>   	}
>   
> -	pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
> -		     PWRAP_WACS2_CMD);
> +	if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {

Please switch if's so that we take the else branch on the arbiter not present 
case. Or the other way round, just make it uniform, where possible, of course.

> +		pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
> +			     PWRAP_WACS2_CMD);
> +	} else {
> +		pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
> +		pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
> +	}
>   
>   	return 0;
>   }
> @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
>   static int pwrap_probe(struct platform_device *pdev)
>   {
>   	int ret, irq;
> +	u32 mask_done;
>   	struct pmic_wrapper *wrp;
>   	struct device_node *np = pdev->dev.of_node;
>   	const struct of_device_id *of_slave_id = NULL;
> @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
>   		}
>   	}
>   
> -	if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
> +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +		mask_done = PWRAP_STATE_INIT_DONE1;
> +	else
> +		mask_done = PWRAP_STATE_INIT_DONE0;
> +
> +	if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
>   		dev_dbg(wrp->dev, "initialization isn't finished\n");
>   		ret = -ENODEV;
>   		goto err_out2;
>   	}
>   
>   	/* Initialize watchdog, may not be done by the bootloader */
> -	pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> +	if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> +		pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> +

Whats the connection between an arbiter being present and the watchdog?

Regards,
Matthias

Re: [PATCH v3 4/4] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs

[Fei Shao]

On Mon, Sep 21, 2020 at 11:03 AM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> power management. This patch adds pwrap master driver to
> access PMIC_MT6359.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
>  drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 149bf02..c73e92b 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
>         [PWRAP_DCM_DBC_PRD] =           0x1D4,
>  };
>
> +static int mt6873_regs[] = {
> +       [PWRAP_INIT_DONE2] =            0x0,
> +       [PWRAP_TIMER_EN] =              0x3E0,
> +       [PWRAP_INT_EN] =                0x448,
> +       [PWRAP_WACS2_CMD] =             0xC80,
> +       [PWRAP_SWINF_2_WDATA_31_0] =    0xC84,
> +       [PWRAP_SWINF_2_RDATA_31_0] =    0xC94,
> +       [PWRAP_WACS2_VLDCLR] =          0xCA4,
> +       [PWRAP_WACS2_RDATA] =           0xCA8,
> +};
> +
>  static int mt7622_regs[] = {
>         [PWRAP_MUX_SEL] =               0x0,
>         [PWRAP_WRAP_EN] =               0x4,
> @@ -1050,6 +1061,7 @@ enum pwrap_type {
>         PWRAP_MT6765,
>         PWRAP_MT6779,
>         PWRAP_MT6797,
> +       PWRAP_MT6873,
>         PWRAP_MT7622,
>         PWRAP_MT8135,
>         PWRAP_MT8173,
> @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
>         case PWRAP_MT7622:
>                 pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
>                 break;
> +       case PWRAP_MT6873:
>         case PWRAP_MT8183:
>                 break;
>         }
> @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
>         .init_soc_specific = NULL,
>  };
>
> +static struct pmic_wrapper_type pwrap_mt6873 = {
static const struct.

> +       .regs = mt6873_regs,
> +       .type = PWRAP_MT6873,
> +       .arb_en_all = 0x777f,
> +       .int_en_all = BIT(4) | BIT(5),
> +       .int1_en_all = 0,
> +       .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> +       .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> +       .caps = PWRAP_CAP_ARB,
> +       .init_reg_clock = pwrap_common_init_reg_clock,
> +       .init_soc_specific = NULL,
> +};
> +
>  static const struct pmic_wrapper_type pwrap_mt7622 = {
>         .regs = mt7622_regs,
>         .type = PWRAP_MT7622,
> @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
>                 .compatible = "mediatek,mt6797-pwrap",
>                 .data = &pwrap_mt6797,
>         }, {
> +               .compatible = "mediatek,mt6873-pwrap",
> +               .data = &pwrap_mt6873,
> +       }, {
>                 .compatible = "mediatek,mt7622-pwrap",
>                 .data = &pwrap_mt7622,
>         }, {

Re: [PATCH v3 2/4] soc: mediatek: pwrap: add arbiter capability

[Hsin-Hsiung Wang]

Hi,

On Mon, 2020-09-21 at 18:48 +0200, Matthias Brugger wrote:
> 
> On 21/09/2020 13:03, Hsin-Hsiung Wang wrote:
> > Add arbiter capability for pwrap driver.
> 
> Can you provide a bit more verbose commit message, please.
> 
Thanks for reviewing. I will update it in next patch.

> > This patch is preparing for adding mt6873/8192 pwrap support.
> > 
> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> > ---
> >   drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
> >   1 file changed, 48 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index c897205..149bf02 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -25,10 +25,12 @@
> >   
> >   /* macro for wrapper status */
> >   #define PWRAP_GET_WACS_RDATA(x)		(((x) >> 0) & 0x0000ffff)
> > +#define PWRAP_GET_WACS_ARB_FSM(x)	(((x) >> 1) & 0x00000007)
> >   #define PWRAP_GET_WACS_FSM(x)		(((x) >> 16) & 0x00000007)
> >   #define PWRAP_GET_WACS_REQ(x)		(((x) >> 19) & 0x00000001)
> >   #define PWRAP_STATE_SYNC_IDLE0		BIT(20)
> >   #define PWRAP_STATE_INIT_DONE0		BIT(21)
> > +#define PWRAP_STATE_INIT_DONE1		BIT(15)
> >   
> >   /* macro for WACS FSM */
> >   #define PWRAP_WACS_FSM_IDLE		0x00
> > @@ -74,6 +76,7 @@
> >   #define PWRAP_CAP_DCM		BIT(2)
> >   #define PWRAP_CAP_INT1_EN	BIT(3)
> >   #define PWRAP_CAP_WDT_SRC1	BIT(4)
> > +#define PWRAP_CAP_ARB		BIT(5)
> >   
> >   /* defines for slave device wrapper registers */
> >   enum dew_regs {
> > @@ -340,6 +343,8 @@ enum pwrap_regs {
> >   	PWRAP_DCM_DBC_PRD,
> >   	PWRAP_EINT_STA0_ADR,
> >   	PWRAP_EINT_STA1_ADR,
> > +	PWRAP_SWINF_2_WDATA_31_0,
> > +	PWRAP_SWINF_2_RDATA_31_0,
> >   
> >   	/* MT2701 only regs */
> >   	PWRAP_ADC_CMD_ADDR,
> > @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
> >   
> >   static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
> >   {
> > -	u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > +	u32 val;
> > +
> > +	val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > +		return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
> >   
> >   	return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> >   }
> >   
> >   static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
> >   {
> > -	u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > +	u32 val;
> > +
> > +	val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > +		return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> >   
> >   	return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> >   }
> > @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
> >   static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> >   {
> >   	int ret;
> > +	u32 val;
> >   
> >   	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
> >   	if (ret) {
> > @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> >   		return ret;
> >   	}
> >   
> > -	pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> > +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > +		val = adr;
> > +	else
> > +		val = (adr >> 1) << 16;
> > +	pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
> >   
> >   	ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> >   	if (ret)
> >   		return ret;
> >   
> > -	*rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> > +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > +		val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
> > +	else
> > +		val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > +	*rdata = PWRAP_GET_WACS_RDATA(val);
> >   
> >   	pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
> >   
> > @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
> >   		return ret;
> >   	}
> >   
> > -	pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
> > -		     PWRAP_WACS2_CMD);
> > +	if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
> 
> Please switch if's so that we take the else branch on the arbiter not present 
> case. Or the other way round, just make it uniform, where possible, of course.
> 

Thanks, I will update it in next patch.

> > +		pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
> > +			     PWRAP_WACS2_CMD);
> > +	} else {
> > +		pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
> > +		pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
> > +	}
> >   
> >   	return 0;
> >   }
> > @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
> >   static int pwrap_probe(struct platform_device *pdev)
> >   {
> >   	int ret, irq;
> > +	u32 mask_done;
> >   	struct pmic_wrapper *wrp;
> >   	struct device_node *np = pdev->dev.of_node;
> >   	const struct of_device_id *of_slave_id = NULL;
> > @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
> >   		}
> >   	}
> >   
> > -	if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
> > +	if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > +		mask_done = PWRAP_STATE_INIT_DONE1;
> > +	else
> > +		mask_done = PWRAP_STATE_INIT_DONE0;
> > +
> > +	if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
> >   		dev_dbg(wrp->dev, "initialization isn't finished\n");
> >   		ret = -ENODEV;
> >   		goto err_out2;
> >   	}
> >   
> >   	/* Initialize watchdog, may not be done by the bootloader */
> > -	pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> > +	if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > +		pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> > +
> 
> Whats the connection between an arbiter being present and the watchdog?
> 

Thanks for reviewing.
The arbiter capability uses new design of pwrap.
This design cannot change the watch dog timer, So I add it here.
Is it better to use another capability to define it?

> Regards,
> Matthias

Re: [PATCH v3 4/4] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs

[Hsin-Hsiung Wang]

Hi,

On Tue, 2020-09-22 at 17:49 +0800, Fei Shao wrote:
> On Mon, Sep 21, 2020 at 11:03 AM Hsin-Hsiung Wang
> <hsin-hsiung.wang@mediatek.com> wrote:
> >
> > MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> > power management. This patch adds pwrap master driver to
> > access PMIC_MT6359.
> >
> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> > ---
> >  drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
> >  1 file changed, 29 insertions(+)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index 149bf02..c73e92b 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
> >         [PWRAP_DCM_DBC_PRD] =           0x1D4,
> >  };
> >
> > +static int mt6873_regs[] = {
> > +       [PWRAP_INIT_DONE2] =            0x0,
> > +       [PWRAP_TIMER_EN] =              0x3E0,
> > +       [PWRAP_INT_EN] =                0x448,
> > +       [PWRAP_WACS2_CMD] =             0xC80,
> > +       [PWRAP_SWINF_2_WDATA_31_0] =    0xC84,
> > +       [PWRAP_SWINF_2_RDATA_31_0] =    0xC94,
> > +       [PWRAP_WACS2_VLDCLR] =          0xCA4,
> > +       [PWRAP_WACS2_RDATA] =           0xCA8,
> > +};
> > +
> >  static int mt7622_regs[] = {
> >         [PWRAP_MUX_SEL] =               0x0,
> >         [PWRAP_WRAP_EN] =               0x4,
> > @@ -1050,6 +1061,7 @@ enum pwrap_type {
> >         PWRAP_MT6765,
> >         PWRAP_MT6779,
> >         PWRAP_MT6797,
> > +       PWRAP_MT6873,
> >         PWRAP_MT7622,
> >         PWRAP_MT8135,
> >         PWRAP_MT8173,
> > @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> >         case PWRAP_MT7622:
> >                 pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
> >                 break;
> > +       case PWRAP_MT6873:
> >         case PWRAP_MT8183:
> >                 break;
> >         }
> > @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
> >         .init_soc_specific = NULL,
> >  };
> >
> > +static struct pmic_wrapper_type pwrap_mt6873 = {
> static const struct.
> 

Thanks, I will update it in next patch.

> > +       .regs = mt6873_regs,
> > +       .type = PWRAP_MT6873,
> > +       .arb_en_all = 0x777f,
> > +       .int_en_all = BIT(4) | BIT(5),
> > +       .int1_en_all = 0,
> > +       .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> > +       .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> > +       .caps = PWRAP_CAP_ARB,
> > +       .init_reg_clock = pwrap_common_init_reg_clock,
> > +       .init_soc_specific = NULL,
> > +};
> > +
> >  static const struct pmic_wrapper_type pwrap_mt7622 = {
> >         .regs = mt7622_regs,
> >         .type = PWRAP_MT7622,
> > @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> >                 .compatible = "mediatek,mt6797-pwrap",
> >                 .data = &pwrap_mt6797,
> >         }, {
> > +               .compatible = "mediatek,mt6873-pwrap",
> > +               .data = &pwrap_mt6873,
> > +       }, {
> >                 .compatible = "mediatek,mt7622-pwrap",
> >                 .data = &pwrap_mt7622,
> >         }, {