From: Claudiu Beznea <claudiu.beznea@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>, <robh+dt@kernel.org>
Cc: <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Eugen Hristev <eugen.hristev@microchip.com>,
Claudiu Beznea <claudiu.beznea@microchip.com>
Subject: [PATCH v6 03/11] clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT
Date: Thu, 19 Nov 2020 17:43:09 +0200 [thread overview]
Message-ID: <1605800597-16720-4-git-send-email-claudiu.beznea@microchip.com> (raw)
In-Reply-To: <1605800597-16720-1-git-send-email-claudiu.beznea@microchip.com>
From: Eugen Hristev <eugen.hristev@microchip.com>
Allow SYSPLL and CPUPLL to be referenced as a PMC_TYPE_CORE clock
from phandle in DT.
Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[claudiu.beznea@microchip.com: adapt commit message, add CPU PLL]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
drivers/clk/at91/sama7g5.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 7ef7963126b6..d3c3469d47d9 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -117,7 +117,8 @@ static const struct {
.p = "cpupll_fracck",
.l = &pll_layout_divpmc,
.t = PLL_TYPE_DIV,
- .c = 1, },
+ .c = 1,
+ .eid = PMC_CPUPLL, },
},
[PLL_ID_SYS] = {
@@ -131,7 +132,8 @@ static const struct {
.p = "syspll_fracck",
.l = &pll_layout_divpmc,
.t = PLL_TYPE_DIV,
- .c = 1, },
+ .c = 1,
+ .eid = PMC_SYSPLL, },
},
[PLL_ID_DDR] = {
--
2.7.4
next prev parent reply other threads:[~2020-11-19 15:44 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-19 15:43 [PATCH v6 00/11] clk: at91: clk-master: re-factor master clock Claudiu Beznea
2020-11-19 15:43 ` [PATCH v6 01/11] clk: at91: sama7g5: fix compilation error Claudiu Beznea
2020-12-19 19:53 ` Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 02/11] dt-bindings: clock: at91: add sama7g5 pll defines Claudiu Beznea
2020-12-19 19:53 ` Stephen Boyd
2020-11-19 15:43 ` Claudiu Beznea [this message]
2020-12-19 19:53 ` [PATCH v6 03/11] clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 04/11] clk: at91: clk-master: add 5th divisor for mck master Claudiu Beznea
2020-12-19 19:53 ` Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 05/11] clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics Claudiu Beznea
2020-12-19 19:53 ` Stephen Boyd
2020-12-19 23:31 ` Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 06/11] clk: at91: clk-sam9x60-pll: allow runtime changes for pll Claudiu Beznea
2020-12-19 19:53 ` Stephen Boyd
2020-12-19 23:31 ` Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 07/11] clk: at91: sama7g5: remove mck0 from parent list of other clocks Claudiu Beznea
2020-12-19 23:32 ` Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 08/11] clk: at91: sama7g5: decrease lower limit for MCK0 rate Claudiu Beznea
2020-12-19 23:32 ` Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 09/11] clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz Claudiu Beznea
2020-12-19 23:32 ` Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 10/11] clk: at91: clk-master: re-factor master clock Claudiu Beznea
2020-12-19 23:32 ` Stephen Boyd
2020-11-19 15:43 ` [PATCH v6 11/11] clk: at91: sama7g5: register cpu clock Claudiu Beznea
2020-12-19 23:32 ` Stephen Boyd
2020-11-27 12:12 ` [PATCH v6 00/11] clk: at91: clk-master: re-factor master clock Claudiu.Beznea
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1605800597-16720-4-git-send-email-claudiu.beznea@microchip.com \
--to=claudiu.beznea@microchip.com \
--cc=alexandre.belloni@bootlin.com \
--cc=devicetree@vger.kernel.org \
--cc=eugen.hristev@microchip.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=ludovic.desroches@microchip.com \
--cc=mturquette@baylibre.com \
--cc=nicolas.ferre@microchip.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).