From: Krzysztof Kozlowski <krzk@kernel.org>
To: Dmitry Osipenko <digetx@gmail.com>,
Mikko Perttunen <cyndis@kapsi.fi>,
Nicolas Chauvet <kwizart@gmail.com>,
Georgi Djakov <georgi.djakov@linaro.org>,
Peter Geis <pgwipeout@gmail.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Viresh Kumar <vireshk@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Chanwoo Choi <cw00.choi@samsung.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org
Subject: Re: [PATCH v11 00/10] Introduce memory interconnect for NVIDIA Tegra SoCs
Date: Sat, 5 Dec 2020 15:09:11 +0100 [thread overview]
Message-ID: <160717730565.9414.18193998919736710677.b4-ty@kernel.org> (raw)
In-Reply-To: <20201203192439.16177-1-digetx@gmail.com>
On Thu, 3 Dec 2020 22:24:29 +0300, Dmitry Osipenko wrote:
> This series brings initial support for memory interconnect to Tegra20,
> Tegra30 and Tegra124 SoCs.
>
> For the starter only display controllers and devfreq devices are getting
> interconnect API support, others could be supported later on. The display
> controllers have the biggest demand for interconnect API right now because
> dynamic memory frequency scaling can't be done safely without taking into
> account bandwidth requirement from the displays. In particular this series
> fixes distorted display output on T30 Ouya and T124 TK1 devices.
>
> [...]
Applied, thanks!
[01/10] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property
[02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization
[03/10] memory: tegra30: Support interconnect framework
commit: 01a51facb74fb337ff9fe734caa85dd6e246ef48
Best regards,
--
Krzysztof Kozlowski <krzk@kernel.org>
next prev parent reply other threads:[~2020-12-05 15:18 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-03 19:24 [PATCH v11 00/10] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 01/10] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property Dmitry Osipenko
2020-12-04 15:46 ` Thierry Reding
2020-12-09 20:17 ` Rob Herring
2020-12-03 19:24 ` [PATCH v11 02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization Dmitry Osipenko
2020-12-04 16:20 ` Thierry Reding
2020-12-03 19:24 ` [PATCH v11 03/10] memory: tegra30: Support interconnect framework Dmitry Osipenko
2020-12-04 16:27 ` Thierry Reding
2020-12-03 19:24 ` [PATCH v11 04/10] memory: tegra124-emc: Make driver modular Dmitry Osipenko
2020-12-04 16:41 ` Thierry Reding
2020-12-05 19:52 ` Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 05/10] memory: tegra124-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 06/10] memory: tegra124: Support interconnect framework Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 07/10] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 08/10] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 09/10] PM / devfreq: tegra30: Support interconnect and OPPs from device-tree Dmitry Osipenko
2020-12-07 1:32 ` Chanwoo Choi
2020-12-07 22:11 ` Dmitry Osipenko
2020-12-03 19:24 ` [PATCH v11 10/10] PM / devfreq: tegra30: Separate configurations per-SoC generation Dmitry Osipenko
2020-12-07 1:33 ` Chanwoo Choi
2020-12-05 14:09 ` Krzysztof Kozlowski [this message]
2020-12-07 22:11 ` [PATCH v11 00/10] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
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