* [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate
@ 2021-01-25 10:19 Claudiu Beznea
2021-01-25 10:19 ` [PATCH 1/3] dt-bindings: pinctrl: at91-pio4: add slew-rate Claudiu Beznea
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Claudiu Beznea @ 2021-01-25 10:19 UTC (permalink / raw)
To: linus.walleij, robh+dt, nicolas.ferre, alexandre.belloni,
ludovic.desroches
Cc: linux-gpio, devicetree, linux-arm-kernel, linux-kernel, Claudiu Beznea
Hi,
This series adds support for slew rate on SAMA7G5. Along with this
patch 3/3 fixes some checkpatch.pl warnings.
Thank you,
Claudiu Beznea
Claudiu Beznea (3):
dt-bindings: pinctrl: at91-pio4: add slew-rate
pinctrl: at91-pio4: add support for slew-rate
pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of
'unsigned'"
.../bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 8 +-
drivers/pinctrl/pinctrl-at91-pio4.c | 137 +++++++++++++--------
2 files changed, 89 insertions(+), 56 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/3] dt-bindings: pinctrl: at91-pio4: add slew-rate 2021-01-25 10:19 [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea @ 2021-01-25 10:19 ` Claudiu Beznea 2021-01-27 9:48 ` Ludovic Desroches 2021-01-25 10:19 ` [PATCH 2/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea ` (2 subsequent siblings) 3 siblings, 1 reply; 8+ messages in thread From: Claudiu Beznea @ 2021-01-25 10:19 UTC (permalink / raw) To: linus.walleij, robh+dt, nicolas.ferre, alexandre.belloni, ludovic.desroches Cc: linux-gpio, devicetree, linux-arm-kernel, linux-kernel, Claudiu Beznea Document slew-rate DT binding for SAMA7G5. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- .../devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt index 265015bc0603..e2b861ce16d8 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt @@ -35,9 +35,11 @@ ioset settings. Use the macros from boot/dts/<soc>-pinfunc.h file to get the right representation of the pin. Optional properties: -- GENERIC_PINCONFIG: generic pinconfig options to use, bias-disable, -bias-pull-down, bias-pull-up, drive-open-drain, input-schmitt-enable, -input-debounce, output-low, output-high. +- GENERIC_PINCONFIG: generic pinconfig options to use: + - bias-disable, bias-pull-down, bias-pull-up, drive-open-drain, + input-schmitt-enable, input-debounce, output-low, output-high. + - for microchip,sama7g5-pinctrl only: + - slew-rate: 0 - disabled, 1 - enabled (default) - atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for high drive. The default value is low drive. -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] dt-bindings: pinctrl: at91-pio4: add slew-rate 2021-01-25 10:19 ` [PATCH 1/3] dt-bindings: pinctrl: at91-pio4: add slew-rate Claudiu Beznea @ 2021-01-27 9:48 ` Ludovic Desroches 0 siblings, 0 replies; 8+ messages in thread From: Ludovic Desroches @ 2021-01-27 9:48 UTC (permalink / raw) To: Claudiu Beznea Cc: linus.walleij, robh+dt, nicolas.ferre, alexandre.belloni, linux-gpio, devicetree, linux-arm-kernel, linux-kernel On Mon, Jan 25, 2021 at 12:19:12PM +0200, Claudiu Beznea wrote: > Document slew-rate DT binding for SAMA7G5. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Thanks > --- > .../devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt > index 265015bc0603..e2b861ce16d8 100644 > --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt > @@ -35,9 +35,11 @@ ioset settings. Use the macros from boot/dts/<soc>-pinfunc.h file to get the > right representation of the pin. > > Optional properties: > -- GENERIC_PINCONFIG: generic pinconfig options to use, bias-disable, > -bias-pull-down, bias-pull-up, drive-open-drain, input-schmitt-enable, > -input-debounce, output-low, output-high. > +- GENERIC_PINCONFIG: generic pinconfig options to use: > + - bias-disable, bias-pull-down, bias-pull-up, drive-open-drain, > + input-schmitt-enable, input-debounce, output-low, output-high. > + - for microchip,sama7g5-pinctrl only: > + - slew-rate: 0 - disabled, 1 - enabled (default) > - atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for > high drive. The default value is low drive. > > -- > 2.7.4 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/3] pinctrl: at91-pio4: add support for slew-rate 2021-01-25 10:19 [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea 2021-01-25 10:19 ` [PATCH 1/3] dt-bindings: pinctrl: at91-pio4: add slew-rate Claudiu Beznea @ 2021-01-25 10:19 ` Claudiu Beznea 2021-01-27 9:56 ` Ludovic Desroches 2021-01-25 10:19 ` [PATCH 3/3] pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'" Claudiu Beznea 2021-01-26 14:38 ` [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate Linus Walleij 3 siblings, 1 reply; 8+ messages in thread From: Claudiu Beznea @ 2021-01-25 10:19 UTC (permalink / raw) To: linus.walleij, robh+dt, nicolas.ferre, alexandre.belloni, ludovic.desroches Cc: linux-gpio, devicetree, linux-arm-kernel, linux-kernel, Claudiu Beznea SAMA7G5 supports slew rate configuration. Adapt the driver for this. For switching frequencies lower than 50MHz the slew rate needs to be enabled. Since most of the pins on SAMA7G5 fall into this category enabled the slew rate by default. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- drivers/pinctrl/pinctrl-at91-pio4.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index d267367d94b9..c59ab0bfb945 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -36,6 +36,7 @@ #define ATMEL_PIO_DIR_MASK BIT(8) #define ATMEL_PIO_PUEN_MASK BIT(9) #define ATMEL_PIO_PDEN_MASK BIT(10) +#define ATMEL_PIO_SR_MASK BIT(11) #define ATMEL_PIO_IFEN_MASK BIT(12) #define ATMEL_PIO_IFSCEN_MASK BIT(13) #define ATMEL_PIO_OPD_MASK BIT(14) @@ -76,10 +77,12 @@ * @nbanks: number of PIO banks * @last_bank_count: number of lines in the last bank (can be less than * the rest of the banks). + * @sr: slew rate support */ struct atmel_pioctrl_data { unsigned nbanks; unsigned last_bank_count; + unsigned int sr; }; struct atmel_group { @@ -117,6 +120,7 @@ struct atmel_pin { * @pm_suspend_backup: backup/restore register values on suspend/resume * @dev: device entry for the Atmel PIO controller. * @node: node of the Atmel PIO controller. + * @sr: slew rate support */ struct atmel_pioctrl { void __iomem *reg_base; @@ -138,6 +142,7 @@ struct atmel_pioctrl { } *pm_suspend_backup; struct device *dev; struct device_node *node; + unsigned int sr; }; static const char * const atmel_functions[] = { @@ -760,6 +765,13 @@ static int atmel_conf_pin_config_group_get(struct pinctrl_dev *pctldev, return -EINVAL; arg = 1; break; + case PIN_CONFIG_SLEW_RATE: + if (!atmel_pioctrl->sr) + return -EOPNOTSUPP; + if (!(res & ATMEL_PIO_SR_MASK)) + return -EINVAL; + arg = 1; + break; case ATMEL_PIN_CONFIG_DRIVE_STRENGTH: if (!(res & ATMEL_PIO_DRVSTR_MASK)) return -EINVAL; @@ -793,6 +805,10 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, dev_dbg(pctldev->dev, "%s: pin=%u, config=0x%lx\n", __func__, pin_id, configs[i]); + /* Keep slew rate enabled by default. */ + if (atmel_pioctrl->sr) + conf |= ATMEL_PIO_SR_MASK; + switch (param) { case PIN_CONFIG_BIAS_DISABLE: conf &= (~ATMEL_PIO_PUEN_MASK); @@ -850,6 +866,13 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, ATMEL_PIO_SODR); } break; + case PIN_CONFIG_SLEW_RATE: + if (!atmel_pioctrl->sr) + break; + /* And remove it if explicitly requested. */ + if (arg == 0) + conf &= ~ATMEL_PIO_SR_MASK; + break; case ATMEL_PIN_CONFIG_DRIVE_STRENGTH: switch (arg) { case ATMEL_PIO_DRVSTR_LO: @@ -901,6 +924,8 @@ static void atmel_conf_pin_config_dbg_show(struct pinctrl_dev *pctldev, seq_printf(s, "%s ", "open-drain"); if (conf & ATMEL_PIO_SCHMITT_MASK) seq_printf(s, "%s ", "schmitt"); + if (atmel_pioctrl->sr && (conf & ATMEL_PIO_SR_MASK)) + seq_printf(s, "%s ", "slew-rate"); if (conf & ATMEL_PIO_DRVSTR_MASK) { switch ((conf & ATMEL_PIO_DRVSTR_MASK) >> ATMEL_PIO_DRVSTR_OFFSET) { case ATMEL_PIO_DRVSTR_ME: @@ -994,6 +1019,7 @@ static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = { static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = { .nbanks = 5, .last_bank_count = 8, /* sama7g5 has only PE0 to PE7 */ + .sr = 1, }; static const struct of_device_id atmel_pctrl_of_match[] = { @@ -1039,6 +1065,7 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) atmel_pioctrl->npins -= ATMEL_PIO_NPINS_PER_BANK; atmel_pioctrl->npins += atmel_pioctrl_data->last_bank_count; } + atmel_pioctrl->sr = atmel_pioctrl_data->sr; atmel_pioctrl->reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(atmel_pioctrl->reg_base)) -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] pinctrl: at91-pio4: add support for slew-rate 2021-01-25 10:19 ` [PATCH 2/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea @ 2021-01-27 9:56 ` Ludovic Desroches 0 siblings, 0 replies; 8+ messages in thread From: Ludovic Desroches @ 2021-01-27 9:56 UTC (permalink / raw) To: Claudiu Beznea Cc: linus.walleij, robh+dt, nicolas.ferre, alexandre.belloni, linux-gpio, devicetree, linux-arm-kernel, linux-kernel On Mon, Jan 25, 2021 at 12:19:13PM +0200, Claudiu Beznea wrote: > SAMA7G5 supports slew rate configuration. Adapt the driver for this. > For switching frequencies lower than 50MHz the slew rate needs to > be enabled. Since most of the pins on SAMA7G5 fall into this category > enabled the slew rate by default. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > drivers/pinctrl/pinctrl-at91-pio4.c | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c > index d267367d94b9..c59ab0bfb945 100644 > --- a/drivers/pinctrl/pinctrl-at91-pio4.c > +++ b/drivers/pinctrl/pinctrl-at91-pio4.c > @@ -36,6 +36,7 @@ > #define ATMEL_PIO_DIR_MASK BIT(8) > #define ATMEL_PIO_PUEN_MASK BIT(9) > #define ATMEL_PIO_PDEN_MASK BIT(10) > +#define ATMEL_PIO_SR_MASK BIT(11) > #define ATMEL_PIO_IFEN_MASK BIT(12) > #define ATMEL_PIO_IFSCEN_MASK BIT(13) > #define ATMEL_PIO_OPD_MASK BIT(14) > @@ -76,10 +77,12 @@ > * @nbanks: number of PIO banks > * @last_bank_count: number of lines in the last bank (can be less than > * the rest of the banks). > + * @sr: slew rate support > */ > struct atmel_pioctrl_data { > unsigned nbanks; > unsigned last_bank_count; > + unsigned int sr; Hi Claudiu, Nitpicking: I tend to prefer a verbose name as slew_rate or even slew_rate_support. Otherwise, Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Regards Ludovic > }; > > struct atmel_group { > @@ -117,6 +120,7 @@ struct atmel_pin { > * @pm_suspend_backup: backup/restore register values on suspend/resume > * @dev: device entry for the Atmel PIO controller. > * @node: node of the Atmel PIO controller. > + * @sr: slew rate support > */ > struct atmel_pioctrl { > void __iomem *reg_base; > @@ -138,6 +142,7 @@ struct atmel_pioctrl { > } *pm_suspend_backup; > struct device *dev; > struct device_node *node; > + unsigned int sr; > }; > > static const char * const atmel_functions[] = { > @@ -760,6 +765,13 @@ static int atmel_conf_pin_config_group_get(struct pinctrl_dev *pctldev, > return -EINVAL; > arg = 1; > break; > + case PIN_CONFIG_SLEW_RATE: > + if (!atmel_pioctrl->sr) > + return -EOPNOTSUPP; > + if (!(res & ATMEL_PIO_SR_MASK)) > + return -EINVAL; > + arg = 1; > + break; > case ATMEL_PIN_CONFIG_DRIVE_STRENGTH: > if (!(res & ATMEL_PIO_DRVSTR_MASK)) > return -EINVAL; > @@ -793,6 +805,10 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, > dev_dbg(pctldev->dev, "%s: pin=%u, config=0x%lx\n", > __func__, pin_id, configs[i]); > > + /* Keep slew rate enabled by default. */ > + if (atmel_pioctrl->sr) > + conf |= ATMEL_PIO_SR_MASK; > + > switch (param) { > case PIN_CONFIG_BIAS_DISABLE: > conf &= (~ATMEL_PIO_PUEN_MASK); > @@ -850,6 +866,13 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, > ATMEL_PIO_SODR); > } > break; > + case PIN_CONFIG_SLEW_RATE: > + if (!atmel_pioctrl->sr) > + break; > + /* And remove it if explicitly requested. */ > + if (arg == 0) > + conf &= ~ATMEL_PIO_SR_MASK; > + break; > case ATMEL_PIN_CONFIG_DRIVE_STRENGTH: > switch (arg) { > case ATMEL_PIO_DRVSTR_LO: > @@ -901,6 +924,8 @@ static void atmel_conf_pin_config_dbg_show(struct pinctrl_dev *pctldev, > seq_printf(s, "%s ", "open-drain"); > if (conf & ATMEL_PIO_SCHMITT_MASK) > seq_printf(s, "%s ", "schmitt"); > + if (atmel_pioctrl->sr && (conf & ATMEL_PIO_SR_MASK)) > + seq_printf(s, "%s ", "slew-rate"); > if (conf & ATMEL_PIO_DRVSTR_MASK) { > switch ((conf & ATMEL_PIO_DRVSTR_MASK) >> ATMEL_PIO_DRVSTR_OFFSET) { > case ATMEL_PIO_DRVSTR_ME: > @@ -994,6 +1019,7 @@ static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = { > static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = { > .nbanks = 5, > .last_bank_count = 8, /* sama7g5 has only PE0 to PE7 */ > + .sr = 1, > }; > > static const struct of_device_id atmel_pctrl_of_match[] = { > @@ -1039,6 +1065,7 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) > atmel_pioctrl->npins -= ATMEL_PIO_NPINS_PER_BANK; > atmel_pioctrl->npins += atmel_pioctrl_data->last_bank_count; > } > + atmel_pioctrl->sr = atmel_pioctrl_data->sr; > > atmel_pioctrl->reg_base = devm_platform_ioremap_resource(pdev, 0); > if (IS_ERR(atmel_pioctrl->reg_base)) > -- > 2.7.4 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/3] pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'" 2021-01-25 10:19 [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea 2021-01-25 10:19 ` [PATCH 1/3] dt-bindings: pinctrl: at91-pio4: add slew-rate Claudiu Beznea 2021-01-25 10:19 ` [PATCH 2/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea @ 2021-01-25 10:19 ` Claudiu Beznea 2021-01-27 9:57 ` Ludovic Desroches 2021-01-26 14:38 ` [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate Linus Walleij 3 siblings, 1 reply; 8+ messages in thread From: Claudiu Beznea @ 2021-01-25 10:19 UTC (permalink / raw) To: linus.walleij, robh+dt, nicolas.ferre, alexandre.belloni, ludovic.desroches Cc: linux-gpio, devicetree, linux-arm-kernel, linux-kernel, Claudiu Beznea Fix "Prefer 'unsigned int' to bare use of 'unsigned'" checkpatch.pl warning. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- drivers/pinctrl/pinctrl-at91-pio4.c | 110 +++++++++++++++++++----------------- 1 file changed, 57 insertions(+), 53 deletions(-) diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index c59ab0bfb945..0206cbfcbebb 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -80,8 +80,8 @@ * @sr: slew rate support */ struct atmel_pioctrl_data { - unsigned nbanks; - unsigned last_bank_count; + unsigned int nbanks; + unsigned int last_bank_count; unsigned int sr; }; @@ -91,11 +91,11 @@ struct atmel_group { }; struct atmel_pin { - unsigned pin_id; - unsigned mux; - unsigned ioset; - unsigned bank; - unsigned line; + unsigned int pin_id; + unsigned int mux; + unsigned int ioset; + unsigned int bank; + unsigned int line; const char *device; }; @@ -125,16 +125,16 @@ struct atmel_pin { struct atmel_pioctrl { void __iomem *reg_base; struct clk *clk; - unsigned nbanks; + unsigned int nbanks; struct pinctrl_dev *pinctrl_dev; struct atmel_group *groups; const char * const *group_names; struct atmel_pin **pins; - unsigned npins; + unsigned int npins; struct gpio_chip *gpio_chip; struct irq_domain *irq_domain; int *irqs; - unsigned *pm_wakeup_sources; + unsigned int *pm_wakeup_sources; struct { u32 imr; u32 odsr; @@ -177,11 +177,11 @@ static void atmel_gpio_irq_ack(struct irq_data *d) */ } -static int atmel_gpio_irq_set_type(struct irq_data *d, unsigned type) +static int atmel_gpio_irq_set_type(struct irq_data *d, unsigned int type) { struct atmel_pioctrl *atmel_pioctrl = irq_data_get_irq_chip_data(d); struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; - unsigned reg; + unsigned int reg; atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_MSKR, BIT(pin->line)); @@ -268,7 +268,7 @@ static struct irq_chip atmel_gpio_irq_chip = { .irq_set_wake = atmel_gpio_irq_set_wake, }; -static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) { struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); @@ -316,11 +316,12 @@ static void atmel_gpio_irq_handler(struct irq_desc *desc) chained_irq_exit(chip, desc); } -static int atmel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +static int atmel_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) { struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); struct atmel_pin *pin = atmel_pioctrl->pins[offset]; - unsigned reg; + unsigned int reg; atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_MSKR, BIT(pin->line)); @@ -331,11 +332,11 @@ static int atmel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) return 0; } -static int atmel_gpio_get(struct gpio_chip *chip, unsigned offset) +static int atmel_gpio_get(struct gpio_chip *chip, unsigned int offset) { struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); struct atmel_pin *pin = atmel_pioctrl->pins[offset]; - unsigned reg; + unsigned int reg; reg = atmel_gpio_read(atmel_pioctrl, pin->bank, ATMEL_PIO_PDSR); @@ -369,12 +370,13 @@ static int atmel_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, return 0; } -static int atmel_gpio_direction_output(struct gpio_chip *chip, unsigned offset, +static int atmel_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) { struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); struct atmel_pin *pin = atmel_pioctrl->pins[offset]; - unsigned reg; + unsigned int reg; atmel_gpio_write(atmel_pioctrl, pin->bank, value ? ATMEL_PIO_SODR : ATMEL_PIO_CODR, @@ -389,7 +391,7 @@ static int atmel_gpio_direction_output(struct gpio_chip *chip, unsigned offset, return 0; } -static void atmel_gpio_set(struct gpio_chip *chip, unsigned offset, int val) +static void atmel_gpio_set(struct gpio_chip *chip, unsigned int offset, int val) { struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); struct atmel_pin *pin = atmel_pioctrl->pins[offset]; @@ -445,11 +447,11 @@ static struct gpio_chip atmel_gpio_chip = { /* --- PINCTRL --- */ static unsigned int atmel_pin_config_read(struct pinctrl_dev *pctldev, - unsigned pin_id) + unsigned int pin_id) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned bank = atmel_pioctrl->pins[pin_id]->bank; - unsigned line = atmel_pioctrl->pins[pin_id]->line; + unsigned int bank = atmel_pioctrl->pins[pin_id]->bank; + unsigned int line = atmel_pioctrl->pins[pin_id]->line; void __iomem *addr = atmel_pioctrl->reg_base + bank * ATMEL_PIO_BANK_OFFSET; @@ -461,11 +463,11 @@ static unsigned int atmel_pin_config_read(struct pinctrl_dev *pctldev, } static void atmel_pin_config_write(struct pinctrl_dev *pctldev, - unsigned pin_id, u32 conf) + unsigned int pin_id, u32 conf) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned bank = atmel_pioctrl->pins[pin_id]->bank; - unsigned line = atmel_pioctrl->pins[pin_id]->line; + unsigned int bank = atmel_pioctrl->pins[pin_id]->bank; + unsigned int line = atmel_pioctrl->pins[pin_id]->line; void __iomem *addr = atmel_pioctrl->reg_base + bank * ATMEL_PIO_BANK_OFFSET; @@ -483,7 +485,7 @@ static int atmel_pctl_get_groups_count(struct pinctrl_dev *pctldev) } static const char *atmel_pctl_get_group_name(struct pinctrl_dev *pctldev, - unsigned selector) + unsigned int selector) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); @@ -491,19 +493,20 @@ static const char *atmel_pctl_get_group_name(struct pinctrl_dev *pctldev, } static int atmel_pctl_get_group_pins(struct pinctrl_dev *pctldev, - unsigned selector, const unsigned **pins, - unsigned *num_pins) + unsigned int selector, + const unsigned int **pins, + unsigned int *num_pins) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); - *pins = (unsigned *)&atmel_pioctrl->groups[selector].pin; + *pins = (unsigned int *)&atmel_pioctrl->groups[selector].pin; *num_pins = 1; return 0; } static struct atmel_group * -atmel_pctl_find_group_by_pin(struct pinctrl_dev *pctldev, unsigned pin) +atmel_pctl_find_group_by_pin(struct pinctrl_dev *pctldev, unsigned int pin) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); int i; @@ -524,7 +527,7 @@ static int atmel_pctl_xlate_pinfunc(struct pinctrl_dev *pctldev, const char **func_name) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned pin_id, func_id; + unsigned int pin_id, func_id; struct atmel_group *grp; pin_id = ATMEL_GET_PIN_NO(pinfunc); @@ -554,10 +557,10 @@ static int atmel_pctl_xlate_pinfunc(struct pinctrl_dev *pctldev, static int atmel_pctl_dt_subnode_to_map(struct pinctrl_dev *pctldev, struct device_node *np, struct pinctrl_map **map, - unsigned *reserved_maps, - unsigned *num_maps) + unsigned int *reserved_maps, + unsigned int *num_maps) { - unsigned num_pins, num_configs, reserve; + unsigned int num_pins, num_configs, reserve; unsigned long *configs; struct property *pins; u32 pinfunc; @@ -628,10 +631,10 @@ static int atmel_pctl_dt_subnode_to_map(struct pinctrl_dev *pctldev, static int atmel_pctl_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np_config, struct pinctrl_map **map, - unsigned *num_maps) + unsigned int *num_maps) { struct device_node *np; - unsigned reserved_maps; + unsigned int reserved_maps; int ret; *map = NULL; @@ -679,13 +682,13 @@ static int atmel_pmx_get_functions_count(struct pinctrl_dev *pctldev) } static const char *atmel_pmx_get_function_name(struct pinctrl_dev *pctldev, - unsigned selector) + unsigned int selector) { return atmel_functions[selector]; } static int atmel_pmx_get_function_groups(struct pinctrl_dev *pctldev, - unsigned selector, + unsigned int selector, const char * const **groups, unsigned * const num_groups) { @@ -698,11 +701,11 @@ static int atmel_pmx_get_function_groups(struct pinctrl_dev *pctldev, } static int atmel_pmx_set_mux(struct pinctrl_dev *pctldev, - unsigned function, - unsigned group) + unsigned int function, + unsigned int group) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned pin; + unsigned int pin; u32 conf; dev_dbg(pctldev->dev, "enable function %s group %s\n", @@ -726,13 +729,13 @@ static const struct pinmux_ops atmel_pmxops = { }; static int atmel_conf_pin_config_group_get(struct pinctrl_dev *pctldev, - unsigned group, + unsigned int group, unsigned long *config) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); - unsigned param = pinconf_to_config_param(*config), arg = 0; + unsigned int param = pinconf_to_config_param(*config), arg = 0; struct atmel_group *grp = atmel_pioctrl->groups + group; - unsigned pin_id = grp->pin; + unsigned int pin_id = grp->pin; u32 res; res = atmel_pin_config_read(pctldev, pin_id); @@ -786,21 +789,21 @@ static int atmel_conf_pin_config_group_get(struct pinctrl_dev *pctldev, } static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, - unsigned group, + unsigned int group, unsigned long *configs, - unsigned num_configs) + unsigned int num_configs) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); struct atmel_group *grp = atmel_pioctrl->groups + group; - unsigned bank, pin, pin_id = grp->pin; + unsigned int bank, pin, pin_id = grp->pin; u32 mask, conf = 0; int i; conf = atmel_pin_config_read(pctldev, pin_id); for (i = 0; i < num_configs; i++) { - unsigned param = pinconf_to_config_param(configs[i]); - unsigned arg = pinconf_to_config_argument(configs[i]); + unsigned int param = pinconf_to_config_param(configs[i]); + unsigned int arg = pinconf_to_config_argument(configs[i]); dev_dbg(pctldev->dev, "%s: pin=%u, config=0x%lx\n", __func__, pin_id, configs[i]); @@ -900,7 +903,8 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, } static void atmel_conf_pin_config_dbg_show(struct pinctrl_dev *pctldev, - struct seq_file *s, unsigned pin_id) + struct seq_file *s, + unsigned int pin_id) { struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); u32 conf; @@ -1108,8 +1112,8 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) return -ENOMEM; for (i = 0 ; i < atmel_pioctrl->npins; i++) { struct atmel_group *group = atmel_pioctrl->groups + i; - unsigned bank = ATMEL_PIO_BANK(i); - unsigned line = ATMEL_PIO_LINE(i); + unsigned int bank = ATMEL_PIO_BANK(i); + unsigned int line = ATMEL_PIO_LINE(i); atmel_pioctrl->pins[i] = devm_kzalloc(dev, sizeof(**atmel_pioctrl->pins), GFP_KERNEL); -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'" 2021-01-25 10:19 ` [PATCH 3/3] pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'" Claudiu Beznea @ 2021-01-27 9:57 ` Ludovic Desroches 0 siblings, 0 replies; 8+ messages in thread From: Ludovic Desroches @ 2021-01-27 9:57 UTC (permalink / raw) To: Claudiu Beznea Cc: linus.walleij, robh+dt, nicolas.ferre, alexandre.belloni, linux-gpio, devicetree, linux-arm-kernel, linux-kernel On Mon, Jan 25, 2021 at 12:19:14PM +0200, Claudiu Beznea wrote: > Fix "Prefer 'unsigned int' to bare use of 'unsigned'" checkpatch.pl > warning. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Thanks > --- > drivers/pinctrl/pinctrl-at91-pio4.c | 110 +++++++++++++++++++----------------- > 1 file changed, 57 insertions(+), 53 deletions(-) > > diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c > index c59ab0bfb945..0206cbfcbebb 100644 > --- a/drivers/pinctrl/pinctrl-at91-pio4.c > +++ b/drivers/pinctrl/pinctrl-at91-pio4.c > @@ -80,8 +80,8 @@ > * @sr: slew rate support > */ > struct atmel_pioctrl_data { > - unsigned nbanks; > - unsigned last_bank_count; > + unsigned int nbanks; > + unsigned int last_bank_count; > unsigned int sr; > }; > > @@ -91,11 +91,11 @@ struct atmel_group { > }; > > struct atmel_pin { > - unsigned pin_id; > - unsigned mux; > - unsigned ioset; > - unsigned bank; > - unsigned line; > + unsigned int pin_id; > + unsigned int mux; > + unsigned int ioset; > + unsigned int bank; > + unsigned int line; > const char *device; > }; > > @@ -125,16 +125,16 @@ struct atmel_pin { > struct atmel_pioctrl { > void __iomem *reg_base; > struct clk *clk; > - unsigned nbanks; > + unsigned int nbanks; > struct pinctrl_dev *pinctrl_dev; > struct atmel_group *groups; > const char * const *group_names; > struct atmel_pin **pins; > - unsigned npins; > + unsigned int npins; > struct gpio_chip *gpio_chip; > struct irq_domain *irq_domain; > int *irqs; > - unsigned *pm_wakeup_sources; > + unsigned int *pm_wakeup_sources; > struct { > u32 imr; > u32 odsr; > @@ -177,11 +177,11 @@ static void atmel_gpio_irq_ack(struct irq_data *d) > */ > } > > -static int atmel_gpio_irq_set_type(struct irq_data *d, unsigned type) > +static int atmel_gpio_irq_set_type(struct irq_data *d, unsigned int type) > { > struct atmel_pioctrl *atmel_pioctrl = irq_data_get_irq_chip_data(d); > struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; > - unsigned reg; > + unsigned int reg; > > atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_MSKR, > BIT(pin->line)); > @@ -268,7 +268,7 @@ static struct irq_chip atmel_gpio_irq_chip = { > .irq_set_wake = atmel_gpio_irq_set_wake, > }; > > -static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned offset) > +static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) > { > struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); > > @@ -316,11 +316,12 @@ static void atmel_gpio_irq_handler(struct irq_desc *desc) > chained_irq_exit(chip, desc); > } > > -static int atmel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) > +static int atmel_gpio_direction_input(struct gpio_chip *chip, > + unsigned int offset) > { > struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); > struct atmel_pin *pin = atmel_pioctrl->pins[offset]; > - unsigned reg; > + unsigned int reg; > > atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_MSKR, > BIT(pin->line)); > @@ -331,11 +332,11 @@ static int atmel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) > return 0; > } > > -static int atmel_gpio_get(struct gpio_chip *chip, unsigned offset) > +static int atmel_gpio_get(struct gpio_chip *chip, unsigned int offset) > { > struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); > struct atmel_pin *pin = atmel_pioctrl->pins[offset]; > - unsigned reg; > + unsigned int reg; > > reg = atmel_gpio_read(atmel_pioctrl, pin->bank, ATMEL_PIO_PDSR); > > @@ -369,12 +370,13 @@ static int atmel_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, > return 0; > } > > -static int atmel_gpio_direction_output(struct gpio_chip *chip, unsigned offset, > +static int atmel_gpio_direction_output(struct gpio_chip *chip, > + unsigned int offset, > int value) > { > struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); > struct atmel_pin *pin = atmel_pioctrl->pins[offset]; > - unsigned reg; > + unsigned int reg; > > atmel_gpio_write(atmel_pioctrl, pin->bank, > value ? ATMEL_PIO_SODR : ATMEL_PIO_CODR, > @@ -389,7 +391,7 @@ static int atmel_gpio_direction_output(struct gpio_chip *chip, unsigned offset, > return 0; > } > > -static void atmel_gpio_set(struct gpio_chip *chip, unsigned offset, int val) > +static void atmel_gpio_set(struct gpio_chip *chip, unsigned int offset, int val) > { > struct atmel_pioctrl *atmel_pioctrl = gpiochip_get_data(chip); > struct atmel_pin *pin = atmel_pioctrl->pins[offset]; > @@ -445,11 +447,11 @@ static struct gpio_chip atmel_gpio_chip = { > > /* --- PINCTRL --- */ > static unsigned int atmel_pin_config_read(struct pinctrl_dev *pctldev, > - unsigned pin_id) > + unsigned int pin_id) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > - unsigned bank = atmel_pioctrl->pins[pin_id]->bank; > - unsigned line = atmel_pioctrl->pins[pin_id]->line; > + unsigned int bank = atmel_pioctrl->pins[pin_id]->bank; > + unsigned int line = atmel_pioctrl->pins[pin_id]->line; > void __iomem *addr = atmel_pioctrl->reg_base > + bank * ATMEL_PIO_BANK_OFFSET; > > @@ -461,11 +463,11 @@ static unsigned int atmel_pin_config_read(struct pinctrl_dev *pctldev, > } > > static void atmel_pin_config_write(struct pinctrl_dev *pctldev, > - unsigned pin_id, u32 conf) > + unsigned int pin_id, u32 conf) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > - unsigned bank = atmel_pioctrl->pins[pin_id]->bank; > - unsigned line = atmel_pioctrl->pins[pin_id]->line; > + unsigned int bank = atmel_pioctrl->pins[pin_id]->bank; > + unsigned int line = atmel_pioctrl->pins[pin_id]->line; > void __iomem *addr = atmel_pioctrl->reg_base > + bank * ATMEL_PIO_BANK_OFFSET; > > @@ -483,7 +485,7 @@ static int atmel_pctl_get_groups_count(struct pinctrl_dev *pctldev) > } > > static const char *atmel_pctl_get_group_name(struct pinctrl_dev *pctldev, > - unsigned selector) > + unsigned int selector) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > > @@ -491,19 +493,20 @@ static const char *atmel_pctl_get_group_name(struct pinctrl_dev *pctldev, > } > > static int atmel_pctl_get_group_pins(struct pinctrl_dev *pctldev, > - unsigned selector, const unsigned **pins, > - unsigned *num_pins) > + unsigned int selector, > + const unsigned int **pins, > + unsigned int *num_pins) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > > - *pins = (unsigned *)&atmel_pioctrl->groups[selector].pin; > + *pins = (unsigned int *)&atmel_pioctrl->groups[selector].pin; > *num_pins = 1; > > return 0; > } > > static struct atmel_group * > -atmel_pctl_find_group_by_pin(struct pinctrl_dev *pctldev, unsigned pin) > +atmel_pctl_find_group_by_pin(struct pinctrl_dev *pctldev, unsigned int pin) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > int i; > @@ -524,7 +527,7 @@ static int atmel_pctl_xlate_pinfunc(struct pinctrl_dev *pctldev, > const char **func_name) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > - unsigned pin_id, func_id; > + unsigned int pin_id, func_id; > struct atmel_group *grp; > > pin_id = ATMEL_GET_PIN_NO(pinfunc); > @@ -554,10 +557,10 @@ static int atmel_pctl_xlate_pinfunc(struct pinctrl_dev *pctldev, > static int atmel_pctl_dt_subnode_to_map(struct pinctrl_dev *pctldev, > struct device_node *np, > struct pinctrl_map **map, > - unsigned *reserved_maps, > - unsigned *num_maps) > + unsigned int *reserved_maps, > + unsigned int *num_maps) > { > - unsigned num_pins, num_configs, reserve; > + unsigned int num_pins, num_configs, reserve; > unsigned long *configs; > struct property *pins; > u32 pinfunc; > @@ -628,10 +631,10 @@ static int atmel_pctl_dt_subnode_to_map(struct pinctrl_dev *pctldev, > static int atmel_pctl_dt_node_to_map(struct pinctrl_dev *pctldev, > struct device_node *np_config, > struct pinctrl_map **map, > - unsigned *num_maps) > + unsigned int *num_maps) > { > struct device_node *np; > - unsigned reserved_maps; > + unsigned int reserved_maps; > int ret; > > *map = NULL; > @@ -679,13 +682,13 @@ static int atmel_pmx_get_functions_count(struct pinctrl_dev *pctldev) > } > > static const char *atmel_pmx_get_function_name(struct pinctrl_dev *pctldev, > - unsigned selector) > + unsigned int selector) > { > return atmel_functions[selector]; > } > > static int atmel_pmx_get_function_groups(struct pinctrl_dev *pctldev, > - unsigned selector, > + unsigned int selector, > const char * const **groups, > unsigned * const num_groups) > { > @@ -698,11 +701,11 @@ static int atmel_pmx_get_function_groups(struct pinctrl_dev *pctldev, > } > > static int atmel_pmx_set_mux(struct pinctrl_dev *pctldev, > - unsigned function, > - unsigned group) > + unsigned int function, > + unsigned int group) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > - unsigned pin; > + unsigned int pin; > u32 conf; > > dev_dbg(pctldev->dev, "enable function %s group %s\n", > @@ -726,13 +729,13 @@ static const struct pinmux_ops atmel_pmxops = { > }; > > static int atmel_conf_pin_config_group_get(struct pinctrl_dev *pctldev, > - unsigned group, > + unsigned int group, > unsigned long *config) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > - unsigned param = pinconf_to_config_param(*config), arg = 0; > + unsigned int param = pinconf_to_config_param(*config), arg = 0; > struct atmel_group *grp = atmel_pioctrl->groups + group; > - unsigned pin_id = grp->pin; > + unsigned int pin_id = grp->pin; > u32 res; > > res = atmel_pin_config_read(pctldev, pin_id); > @@ -786,21 +789,21 @@ static int atmel_conf_pin_config_group_get(struct pinctrl_dev *pctldev, > } > > static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, > - unsigned group, > + unsigned int group, > unsigned long *configs, > - unsigned num_configs) > + unsigned int num_configs) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > struct atmel_group *grp = atmel_pioctrl->groups + group; > - unsigned bank, pin, pin_id = grp->pin; > + unsigned int bank, pin, pin_id = grp->pin; > u32 mask, conf = 0; > int i; > > conf = atmel_pin_config_read(pctldev, pin_id); > > for (i = 0; i < num_configs; i++) { > - unsigned param = pinconf_to_config_param(configs[i]); > - unsigned arg = pinconf_to_config_argument(configs[i]); > + unsigned int param = pinconf_to_config_param(configs[i]); > + unsigned int arg = pinconf_to_config_argument(configs[i]); > > dev_dbg(pctldev->dev, "%s: pin=%u, config=0x%lx\n", > __func__, pin_id, configs[i]); > @@ -900,7 +903,8 @@ static int atmel_conf_pin_config_group_set(struct pinctrl_dev *pctldev, > } > > static void atmel_conf_pin_config_dbg_show(struct pinctrl_dev *pctldev, > - struct seq_file *s, unsigned pin_id) > + struct seq_file *s, > + unsigned int pin_id) > { > struct atmel_pioctrl *atmel_pioctrl = pinctrl_dev_get_drvdata(pctldev); > u32 conf; > @@ -1108,8 +1112,8 @@ static int atmel_pinctrl_probe(struct platform_device *pdev) > return -ENOMEM; > for (i = 0 ; i < atmel_pioctrl->npins; i++) { > struct atmel_group *group = atmel_pioctrl->groups + i; > - unsigned bank = ATMEL_PIO_BANK(i); > - unsigned line = ATMEL_PIO_LINE(i); > + unsigned int bank = ATMEL_PIO_BANK(i); > + unsigned int line = ATMEL_PIO_LINE(i); > > atmel_pioctrl->pins[i] = devm_kzalloc(dev, > sizeof(**atmel_pioctrl->pins), GFP_KERNEL); > -- > 2.7.4 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate 2021-01-25 10:19 [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea ` (2 preceding siblings ...) 2021-01-25 10:19 ` [PATCH 3/3] pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'" Claudiu Beznea @ 2021-01-26 14:38 ` Linus Walleij 3 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2021-01-26 14:38 UTC (permalink / raw) To: Claudiu Beznea, Nicolas Ferre, Ludovic Desroches Cc: Rob Herring, Alexandre Belloni, open list:GPIO SUBSYSTEM, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, Linux ARM, linux-kernel On Mon, Jan 25, 2021 at 11:19 AM Claudiu Beznea <claudiu.beznea@microchip.com> wrote: > This series adds support for slew rate on SAMA7G5. Along with this > patch 3/3 fixes some checkpatch.pl warnings. Nicolas/Ludovic, can one of you review and ACK this patch set? Yours, Linus Walleij ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-01-27 10:00 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-01-25 10:19 [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea 2021-01-25 10:19 ` [PATCH 1/3] dt-bindings: pinctrl: at91-pio4: add slew-rate Claudiu Beznea 2021-01-27 9:48 ` Ludovic Desroches 2021-01-25 10:19 ` [PATCH 2/3] pinctrl: at91-pio4: add support for slew-rate Claudiu Beznea 2021-01-27 9:56 ` Ludovic Desroches 2021-01-25 10:19 ` [PATCH 3/3] pinctrl: at91-pio4: fix "Prefer 'unsigned int' to bare use of 'unsigned'" Claudiu Beznea 2021-01-27 9:57 ` Ludovic Desroches 2021-01-26 14:38 ` [PATCH 0/3] pinctrl: at91-pio4: add support for slew-rate Linus Walleij
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